From: <pdel@fb.com>
Cc: <alistair@alistair23.me>, <peter.maydell@linaro.org>,
<clg@kaod.org>, <andrew@aj.id.au>, <joel@jms.id.au>,
<qemu-arm@nongnu.org>, <qemu-devel@nongnu.org>, <zhdaniel@fb.com>,
<patrick@stwcx.xyz>, Peter Delevoryas <pdel@fb.com>
Subject: [PATCH v2 0/2] hw/adc: Add basic Aspeed ADC model
Date: Sun, 3 Oct 2021 12:18:48 -0700 [thread overview]
Message-ID: <20211003191850.513658-1-pdel@fb.com> (raw)
From: Peter Delevoryas <pdel@fb.com>
v1: https://lore.kernel.org/qemu-devel/20211002214414.2858382-1-pdel@fbc.om/
v2:
- Added summary of changes above signed-off-by in commit message.
- Added #define's for ADC and ADC engine memory region sizes.
- Fixed "From: pdel@fbc.com"
Thanks,
Peter
Andrew Jeffery (2):
hw/adc: Add basic Aspeed ADC model
hw/arm: Integrate ADC model into Aspeed SoC
hw/adc/aspeed_adc.c | 422 ++++++++++++++++++++++++++++++++++++
hw/adc/meson.build | 1 +
hw/adc/trace-events | 3 +
hw/arm/aspeed_ast2600.c | 11 +
hw/arm/aspeed_soc.c | 11 +
include/hw/adc/aspeed_adc.h | 55 +++++
include/hw/arm/aspeed_soc.h | 2 +
7 files changed, 505 insertions(+)
create mode 100644 hw/adc/aspeed_adc.c
create mode 100644 include/hw/adc/aspeed_adc.h
Interdiff against v1:
diff --git a/hw/adc/aspeed_adc.c b/hw/adc/aspeed_adc.c
index 8a132ef375..fcd93d6853 100644
--- a/hw/adc/aspeed_adc.c
+++ b/hw/adc/aspeed_adc.c
@@ -17,6 +17,8 @@
#include "hw/adc/aspeed_adc.h"
#include "trace.h"
+#define ASPEED_ADC_MEMORY_REGION_SIZE 0x1000
+#define ASPEED_ADC_ENGINE_MEMORY_REGION_SIZE 0x100
#define ASPEED_ADC_ENGINE_CH_EN_MASK 0xffff0000
#define ASPEED_ADC_ENGINE_CH_EN(x) ((BIT(x)) << 16)
#define ASPEED_ADC_ENGINE_INIT BIT(8)
@@ -264,7 +266,7 @@ static void aspeed_adc_engine_realize(DeviceState *dev, Error **errp)
sysbus_init_irq(sbd, &s->irq);
memory_region_init_io(&s->mmio, OBJECT(s), &aspeed_adc_engine_ops, s, name,
- 0x100);
+ ASPEED_ADC_ENGINE_MEMORY_REGION_SIZE);
sysbus_init_mmio(sbd, &s->mmio);
}
@@ -344,7 +346,8 @@ static void aspeed_adc_realize(DeviceState *dev, Error **errp)
sysbus_init_irq(sbd, &s->irq);
- memory_region_init(&s->mmio, OBJECT(s), TYPE_ASPEED_ADC, 0x1000);
+ memory_region_init(&s->mmio, OBJECT(s), TYPE_ASPEED_ADC,
+ ASPEED_ADC_MEMORY_REGION_SIZE);
sysbus_init_mmio(sbd, &s->mmio);
@@ -356,7 +359,9 @@ static void aspeed_adc_realize(DeviceState *dev, Error **errp)
}
sysbus_connect_irq(SYS_BUS_DEVICE(eng), 0,
qdev_get_gpio_in(DEVICE(sbd), i));
- memory_region_add_subregion(&s->mmio, i * 0x100, &s->engines[i].mmio);
+ memory_region_add_subregion(&s->mmio,
+ i * ASPEED_ADC_ENGINE_MEMORY_REGION_SIZE,
+ &s->engines[i].mmio);
}
}
--
2.30.2
next reply other threads:[~2021-10-03 19:21 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-03 19:18 pdel [this message]
2021-10-03 19:18 ` [PATCH v2 1/2] hw/adc: Add basic Aspeed ADC model pdel
2021-10-04 7:49 ` Cédric Le Goater
2021-10-05 5:31 ` Peter Delevoryas
2021-10-05 7:33 ` Cédric Le Goater
2021-10-03 19:18 ` [PATCH v2 2/2] hw/arm: Integrate ADC model into Aspeed SoC pdel
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