From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: git@xen0n.name, Alistair.Francis@wdc.com, f4bug@amsat.org
Subject: [PATCH 1/8] tcg: Add TCG_TARGET_SIGNED_ADDR32
Date: Sun, 10 Oct 2021 10:43:54 -0700 [thread overview]
Message-ID: <20211010174401.141339-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20211010174401.141339-1-richard.henderson@linaro.org>
Define as 0 for all tcg hosts. Put this in a separate header,
because we'll want this in places that do not ordinarily have
access to all of tcg/tcg.h.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/aarch64/tcg-target-sa32.h | 1 +
tcg/arm/tcg-target-sa32.h | 1 +
tcg/i386/tcg-target-sa32.h | 1 +
tcg/mips/tcg-target-sa32.h | 1 +
tcg/ppc/tcg-target-sa32.h | 1 +
tcg/riscv/tcg-target-sa32.h | 1 +
tcg/s390x/tcg-target-sa32.h | 1 +
tcg/sparc/tcg-target-sa32.h | 1 +
tcg/tci/tcg-target-sa32.h | 1 +
9 files changed, 9 insertions(+)
create mode 100644 tcg/aarch64/tcg-target-sa32.h
create mode 100644 tcg/arm/tcg-target-sa32.h
create mode 100644 tcg/i386/tcg-target-sa32.h
create mode 100644 tcg/mips/tcg-target-sa32.h
create mode 100644 tcg/ppc/tcg-target-sa32.h
create mode 100644 tcg/riscv/tcg-target-sa32.h
create mode 100644 tcg/s390x/tcg-target-sa32.h
create mode 100644 tcg/sparc/tcg-target-sa32.h
create mode 100644 tcg/tci/tcg-target-sa32.h
diff --git a/tcg/aarch64/tcg-target-sa32.h b/tcg/aarch64/tcg-target-sa32.h
new file mode 100644
index 0000000000..cb185b1526
--- /dev/null
+++ b/tcg/aarch64/tcg-target-sa32.h
@@ -0,0 +1 @@
+#define TCG_TARGET_SIGNED_ADDR32 0
diff --git a/tcg/arm/tcg-target-sa32.h b/tcg/arm/tcg-target-sa32.h
new file mode 100644
index 0000000000..cb185b1526
--- /dev/null
+++ b/tcg/arm/tcg-target-sa32.h
@@ -0,0 +1 @@
+#define TCG_TARGET_SIGNED_ADDR32 0
diff --git a/tcg/i386/tcg-target-sa32.h b/tcg/i386/tcg-target-sa32.h
new file mode 100644
index 0000000000..cb185b1526
--- /dev/null
+++ b/tcg/i386/tcg-target-sa32.h
@@ -0,0 +1 @@
+#define TCG_TARGET_SIGNED_ADDR32 0
diff --git a/tcg/mips/tcg-target-sa32.h b/tcg/mips/tcg-target-sa32.h
new file mode 100644
index 0000000000..cb185b1526
--- /dev/null
+++ b/tcg/mips/tcg-target-sa32.h
@@ -0,0 +1 @@
+#define TCG_TARGET_SIGNED_ADDR32 0
diff --git a/tcg/ppc/tcg-target-sa32.h b/tcg/ppc/tcg-target-sa32.h
new file mode 100644
index 0000000000..cb185b1526
--- /dev/null
+++ b/tcg/ppc/tcg-target-sa32.h
@@ -0,0 +1 @@
+#define TCG_TARGET_SIGNED_ADDR32 0
diff --git a/tcg/riscv/tcg-target-sa32.h b/tcg/riscv/tcg-target-sa32.h
new file mode 100644
index 0000000000..cb185b1526
--- /dev/null
+++ b/tcg/riscv/tcg-target-sa32.h
@@ -0,0 +1 @@
+#define TCG_TARGET_SIGNED_ADDR32 0
diff --git a/tcg/s390x/tcg-target-sa32.h b/tcg/s390x/tcg-target-sa32.h
new file mode 100644
index 0000000000..cb185b1526
--- /dev/null
+++ b/tcg/s390x/tcg-target-sa32.h
@@ -0,0 +1 @@
+#define TCG_TARGET_SIGNED_ADDR32 0
diff --git a/tcg/sparc/tcg-target-sa32.h b/tcg/sparc/tcg-target-sa32.h
new file mode 100644
index 0000000000..cb185b1526
--- /dev/null
+++ b/tcg/sparc/tcg-target-sa32.h
@@ -0,0 +1 @@
+#define TCG_TARGET_SIGNED_ADDR32 0
diff --git a/tcg/tci/tcg-target-sa32.h b/tcg/tci/tcg-target-sa32.h
new file mode 100644
index 0000000000..cb185b1526
--- /dev/null
+++ b/tcg/tci/tcg-target-sa32.h
@@ -0,0 +1 @@
+#define TCG_TARGET_SIGNED_ADDR32 0
--
2.25.1
next prev parent reply other threads:[~2021-10-10 17:51 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-10 17:43 [PATCH 0/8] tcg: support 32-bit guest addresses as signed Richard Henderson
2021-10-10 17:43 ` Richard Henderson [this message]
2021-10-11 4:21 ` [PATCH 1/8] tcg: Add TCG_TARGET_SIGNED_ADDR32 WANG Xuerui
2021-10-11 9:55 ` Alex Bennée
2021-10-11 22:07 ` Philippe Mathieu-Daudé
2021-10-11 23:16 ` Alistair Francis
2021-10-10 17:43 ` [PATCH 2/8] accel/tcg: Split out g2h_tlbe Richard Henderson
2021-10-11 4:22 ` WANG Xuerui
2021-10-11 9:55 ` Alex Bennée
2021-10-11 21:48 ` Philippe Mathieu-Daudé
2021-10-11 23:19 ` Alistair Francis
2021-10-10 17:43 ` [PATCH 3/8] accel/tcg: Support TCG_TARGET_SIGNED_ADDR32 for softmmu Richard Henderson
2021-10-11 4:30 ` WANG Xuerui
2021-10-11 15:27 ` Richard Henderson
2021-10-10 17:43 ` [PATCH 4/8] accel/tcg: Add guest_base_signed_addr32 for user-only Richard Henderson
2021-10-11 22:06 ` Philippe Mathieu-Daudé
2021-10-13 7:07 ` Alistair Francis
2021-10-10 17:43 ` [PATCH 5/8] linux-user: Support TCG_TARGET_SIGNED_ADDR32 Richard Henderson
2021-10-11 10:22 ` Alex Bennée
2021-10-11 15:32 ` Richard Henderson
2021-10-10 17:43 ` [PATCH 6/8] tcg/aarch64: " Richard Henderson
2021-10-11 10:28 ` Alex Bennée
2021-10-11 15:24 ` Richard Henderson
2021-10-13 21:05 ` Richard Henderson
2021-10-10 17:44 ` [PATCH 7/8] target/mips: " Richard Henderson
2021-10-11 4:20 ` WANG Xuerui
2021-10-13 22:24 ` Richard Henderson
2021-10-10 17:44 ` [PATCH 8/8] target/riscv: " Richard Henderson
2021-10-11 22:00 ` Philippe Mathieu-Daudé
2021-10-13 7:08 ` Alistair Francis
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