From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH v4 06/10] target/arm: Split compute_fsr_fsc out of arm_deliver_fault
Date: Wed, 3 Nov 2021 00:03:48 -0400 [thread overview]
Message-ID: <20211103040352.373688-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20211103040352.373688-1-richard.henderson@linaro.org>
We will reuse this section of arm_deliver_fault for
raising pc alignment faults.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tlb_helper.c | 45 +++++++++++++++++++++++++----------------
1 file changed, 28 insertions(+), 17 deletions(-)
diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c
index 12a934e924..4cacb9658f 100644
--- a/target/arm/tlb_helper.c
+++ b/target/arm/tlb_helper.c
@@ -49,25 +49,11 @@ static inline uint32_t merge_syn_data_abort(uint32_t template_syn,
return syn;
}
-static void QEMU_NORETURN arm_deliver_fault(ARMCPU *cpu, vaddr addr,
- MMUAccessType access_type,
- int mmu_idx, ARMMMUFaultInfo *fi)
+static uint32_t compute_fsr_fsc(CPUARMState *env, ARMMMUFaultInfo *fi,
+ int target_el, int mmu_idx, uint32_t *ret_fsc)
{
- CPUARMState *env = &cpu->env;
- int target_el;
- bool same_el;
- uint32_t syn, exc, fsr, fsc;
ARMMMUIdx arm_mmu_idx = core_to_arm_mmu_idx(env, mmu_idx);
-
- target_el = exception_target_el(env);
- if (fi->stage2) {
- target_el = 2;
- env->cp15.hpfar_el2 = extract64(fi->s2addr, 12, 47) << 4;
- if (arm_is_secure_below_el3(env) && fi->s1ns) {
- env->cp15.hpfar_el2 |= HPFAR_NS;
- }
- }
- same_el = (arm_current_el(env) == target_el);
+ uint32_t fsr, fsc;
if (target_el == 2 || arm_el_is_aa64(env, target_el) ||
arm_s1_regime_using_lpae_format(env, arm_mmu_idx)) {
@@ -88,6 +74,31 @@ static void QEMU_NORETURN arm_deliver_fault(ARMCPU *cpu, vaddr addr,
fsc = 0x3f;
}
+ *ret_fsc = fsc;
+ return fsr;
+}
+
+static void QEMU_NORETURN arm_deliver_fault(ARMCPU *cpu, vaddr addr,
+ MMUAccessType access_type,
+ int mmu_idx, ARMMMUFaultInfo *fi)
+{
+ CPUARMState *env = &cpu->env;
+ int target_el;
+ bool same_el;
+ uint32_t syn, exc, fsr, fsc;
+
+ target_el = exception_target_el(env);
+ if (fi->stage2) {
+ target_el = 2;
+ env->cp15.hpfar_el2 = extract64(fi->s2addr, 12, 47) << 4;
+ if (arm_is_secure_below_el3(env) && fi->s1ns) {
+ env->cp15.hpfar_el2 |= HPFAR_NS;
+ }
+ }
+ same_el = (arm_current_el(env) == target_el);
+
+ fsr = compute_fsr_fsc(env, fi, target_el, mmu_idx, &fsc);
+
if (access_type == MMU_INST_FETCH) {
syn = syn_insn_abort(same_el, fi->ea, fi->s1ptw, fsc);
exc = EXCP_PREFETCH_ABORT;
--
2.25.1
next prev parent reply other threads:[~2021-11-03 4:11 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-03 4:03 [PATCH v4 00/10] target/arm: Fix insn exception priorities Richard Henderson
2021-11-03 4:03 ` [PATCH v4 01/10] target/arm: Hoist pc_next to a local variable in aarch64_tr_translate_insn Richard Henderson
2021-11-05 17:06 ` Peter Maydell
2021-11-03 4:03 ` [PATCH v4 02/10] target/arm: Hoist pc_next to a local variable in arm_tr_translate_insn Richard Henderson
2021-11-05 17:06 ` Peter Maydell
2021-11-03 4:03 ` [PATCH v4 03/10] target/arm: Hoist pc_next to a local variable in thumb_tr_translate_insn Richard Henderson
2021-11-05 17:06 ` Peter Maydell
2021-11-03 4:03 ` [PATCH v4 04/10] target/arm: Split arm_pre_translate_insn Richard Henderson
2021-11-05 17:06 ` Peter Maydell
2021-11-03 4:03 ` [PATCH v4 05/10] target/arm: Advance pc for arch single-step exception Richard Henderson
2021-11-05 17:07 ` Peter Maydell
2021-11-03 4:03 ` Richard Henderson [this message]
2021-11-05 17:09 ` [PATCH v4 06/10] target/arm: Split compute_fsr_fsc out of arm_deliver_fault Peter Maydell
2021-11-03 4:03 ` [PATCH v4 07/10] target/arm: Take an exception if PC is misaligned Richard Henderson
2021-11-05 17:13 ` Peter Maydell
2021-11-03 4:03 ` [PATCH v4 08/10] target/arm: Assert thumb pc is aligned Richard Henderson
2021-11-03 4:03 ` [PATCH v4 09/10] target/arm: Suppress bp for exceptions with more priority Richard Henderson
2021-11-03 4:03 ` [PATCH v4 10/10] tests/tcg: Add arm and aarch64 pc alignment tests Richard Henderson
2021-11-08 14:16 ` [PATCH v4 00/10] target/arm: Fix insn exception priorities Peter Maydell
2021-11-08 14:59 ` Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211103040352.373688-7-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).