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Thu, 23 Dec 2021 10:42:11 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E54FAAE05F; Thu, 23 Dec 2021 10:42:10 +0000 (GMT) Received: from li-e979b1cc-23ba-11b2-a85c-dfd230f6cf82 (unknown [9.171.57.19]) by d06av26.portsmouth.uk.ibm.com (Postfix) with SMTP; Thu, 23 Dec 2021 10:42:10 +0000 (GMT) Date: Thu, 23 Dec 2021 11:41:57 +0100 From: Halil Pasic To: Cornelia Huck Subject: Re: [PATCH qemu] s390x/css: fix PMCW invalid mask Message-ID: <20211223114157.514496aa.pasic@linux.ibm.com> In-Reply-To: <87h7b037vw.fsf@redhat.com> References: <20211216131657.1057978-1-nrb@linux.ibm.com> <87h7b037vw.fsf@redhat.com> Organization: IBM X-Mailer: Claws Mail 3.17.8 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: MhplyXkW_jhLb4ZooLEPM8MRr1QteLc9 X-Proofpoint-ORIG-GUID: m6sVMdyq05VAsN9mQ94deahcjOZjxWSw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-23_02,2021-12-22_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 mlxlogscore=999 phishscore=0 clxscore=1015 mlxscore=0 adultscore=0 priorityscore=1501 spamscore=0 impostorscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112230056 Received-SPF: pass client-ip=148.163.156.1; envelope-from=pasic@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, Nico Boehr , frankja@linux.ibm.com, pmorel@linux.ibm.com, qemu-devel@nongnu.org, Halil Pasic , borntraeger@de.ibm.com, qemu-s390x@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Wed, 22 Dec 2021 17:46:11 +0100 Cornelia Huck wrote: > On Thu, Dec 16 2021, Nico Boehr wrote: > > > Previously, we required bits 5, 6 and 7 to be zero (0x07 == 0b111). But, > > as per the principles of operation, bit 5 is ignored in MSCH and bits 0, > > 1, 6 and 7 need to be zero. > > > > As both PMCW_FLAGS_MASK_INVALID and ioinst_schib_valid() are only used > > by ioinst_handle_msch(), adjust the mask accordingly. > > > > Fixes: db1c8f53bfb1 ("s390: Channel I/O basic definitions.") > > Signed-off-by: Nico Boehr > > Reviewed-by: Pierre Morel > > Reviewed-by: Halil Pasic > > Reviewed-by: Janosch Frank > > --- > > include/hw/s390x/ioinst.h | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/include/hw/s390x/ioinst.h b/include/hw/s390x/ioinst.h > > index 3771fff9d44d..ea8d0f244492 100644 > > --- a/include/hw/s390x/ioinst.h > > +++ b/include/hw/s390x/ioinst.h > > @@ -107,7 +107,7 @@ QEMU_BUILD_BUG_MSG(sizeof(PMCW) != 28, "size of PMCW is wrong"); > > #define PMCW_FLAGS_MASK_MP 0x0004 > > #define PMCW_FLAGS_MASK_TF 0x0002 > > #define PMCW_FLAGS_MASK_DNV 0x0001 > > -#define PMCW_FLAGS_MASK_INVALID 0x0700 > > +#define PMCW_FLAGS_MASK_INVALID 0xc300 > > Removing bit 5 from this mask makes sense, at it is simply ignored. > > I'm a bit confused about bits 0 and 1, however. They are _QF and _W, > respectively (just out of the context here), which are in the same class > as _DNV (i.e. characteristics of the subchannel that cannot be modified > via msch). Looking at the PoP, I don't see what is supposed to happen if > the program tries to modify the dnv bit (maybe I'm simply overlooking > it.) I would naively assume that the w bit should behave in the same way > (as it does for message subchannels what dnv does for I/O subchannels, > and the rest of the values are not meaningful if it is not set), and > probably also the qf bit (as it doesn't make sense for the program to > turn QDIO capabilities on and off.) The main question is whether trying > to modify these bits causes an error or is ignored. The PoP suggests an > error (no idea if the internal architecture agrees, it hopefully does); > what happens for dnv? """ Bits 0, 1, 6, and 7 of word 1, and bits 0-28 of word 6 of the SCHIB operand must be zeros, and bits 9 and 10 of word 1 must not both be ones. When the extended-I/O-measurement-block facility is installed and a format-1 measurement block is specified, bits 26-31 of word 11 must be specified as zeros. """ (IBM z/Architecture Principles of Operation (SA22-7832-10), 14-8) The internal architecture agrees. DNV bit is ignored. Regarding why, I don't know. Probably for historic reasons. The PoP tells us that whatever is not listed as significant or checked and results in an operation exception if not appropriate is ignored: """ The remaining fields of the SCHIB are ignored and do not affect the processing of MODIFY SUBCHANNEL. (For further details, see “Subchannel-Information Block” on page 2 """ (same page) Regarding word 1 of the SCHIB the alignment between PoP and AR is perfect AFAICT. > > We support neither message subchannels nor QDIO in QEMU, so it's > probably not relevant right now; but it would still be good if we could > clarify the expected behaviour here :) > > > > > #define PMCW_CHARS_MASK_ST 0x00e00000 > > #define PMCW_CHARS_MASK_MBFC 0x00000004 > >