From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 0/6] target-arm queue
Date: Fri, 1 Apr 2022 16:00:49 +0100 [thread overview]
Message-ID: <20220401150055.421608-1-peter.maydell@linaro.org> (raw)
Some small arm bug fixes for rc3.
-- PMM
The following changes since commit 9b617b1bb4056e60b39be4c33be20c10928a6a5c:
Merge tag 'trivial-branch-for-7.0-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging (2022-04-01 10:23:27 +0100)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220401
for you to fetch changes up to a5b1e1ab662aa6dc42d5a913080fccbb8bf82e9b:
target/arm: Don't use DISAS_NORETURN in STXP !HAVE_CMPXCHG128 codegen (2022-04-01 15:35:49 +0100)
----------------------------------------------------------------
target-arm queue:
* target/arm: Fix some bugs in secure EL2 handling
* target/arm: Fix assert when !HAVE_CMPXCHG128
* MAINTAINERS: change Fred Konrad's email address
----------------------------------------------------------------
Frederic Konrad (1):
MAINTAINERS: change Fred Konrad's email address
Idan Horowitz (4):
target/arm: Fix MTE access checks for disabled SEL2
target/arm: Check VSTCR.SW when assigning the stage 2 output PA space
target/arm: Take VSTCR.SW, VTCR.NSW into account in final stage 2 walk
target/arm: Determine final stage 2 output PA space based on original IPA
Peter Maydell (1):
target/arm: Don't use DISAS_NORETURN in STXP !HAVE_CMPXCHG128 codegen
target/arm/internals.h | 2 +-
target/arm/helper.c | 18 +++++++++++++++---
target/arm/translate-a64.c | 7 ++++++-
.mailmap | 3 ++-
MAINTAINERS | 2 +-
5 files changed, 25 insertions(+), 7 deletions(-)
next reply other threads:[~2022-04-01 15:02 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-01 15:00 Peter Maydell [this message]
2022-04-01 15:00 ` [PULL 1/6] target/arm: Fix MTE access checks for disabled SEL2 Peter Maydell
2022-04-01 15:00 ` [PULL 2/6] target/arm: Check VSTCR.SW when assigning the stage 2 output PA space Peter Maydell
2022-04-01 15:00 ` [PULL 3/6] target/arm: Take VSTCR.SW, VTCR.NSW into account in final stage 2 walk Peter Maydell
2022-04-01 15:00 ` [PULL 4/6] target/arm: Determine final stage 2 output PA space based on original IPA Peter Maydell
2022-04-01 15:00 ` [PULL 5/6] MAINTAINERS: change Fred Konrad's email address Peter Maydell
2022-04-01 15:00 ` [PULL 6/6] target/arm: Don't use DISAS_NORETURN in STXP !HAVE_CMPXCHG128 codegen Peter Maydell
2022-04-02 8:35 ` [PULL 0/6] target-arm queue Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2023-07-31 14:15 Peter Maydell
2023-07-31 18:00 ` Richard Henderson
2021-04-06 12:26 Peter Maydell
2021-04-06 16:28 ` Peter Maydell
2020-03-30 13:36 Peter Maydell
2020-03-30 15:05 ` Peter Maydell
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