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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: laurent@vivier.eu
Subject: [PATCH v4 08/17] target/m68k: Fix address argument for EXCP_TRACE
Date: Sat, 30 Apr 2022 10:53:33 -0700	[thread overview]
Message-ID: <20220430175342.370628-9-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220430175342.370628-1-richard.henderson@linaro.org>

According to the M68040 Users Manual, section 8.4.3,
Six word stack frame (format 2), Trace (and others) is
supposed to record the next insn in PC and the address
of the trapping instruction in ADDRESS.

Create gen_raise_exception_format2 to record the trapping
pc in env->mmu.ar.  Update m68k_interrupt_all to pass the
value to do_stack_frame.  Update cpu_loop to handle EXCP_TRACE.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 linux-user/m68k/cpu_loop.c |  3 +++
 target/m68k/op_helper.c    |  2 +-
 target/m68k/translate.c    | 49 +++++++++++++++++++++++++-------------
 3 files changed, 36 insertions(+), 18 deletions(-)

diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c
index 45419d4471..000bb44cc3 100644
--- a/linux-user/m68k/cpu_loop.c
+++ b/linux-user/m68k/cpu_loop.c
@@ -53,6 +53,9 @@ void cpu_loop(CPUM68KState *env)
         case EXCP_DIV0:
             force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->mmu.ar);
             break;
+        case EXCP_TRACE:
+            force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_TRACE, env->mmu.ar);
+            break;
         case EXCP_TRAP0:
             {
                 abi_long ret;
diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
index 729ee0e934..3cb71c9140 100644
--- a/target/m68k/op_helper.c
+++ b/target/m68k/op_helper.c
@@ -397,13 +397,13 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw)
 
     case EXCP_ILLEGAL:
     case EXCP_TRAPCC:
-    case EXCP_TRACE:
         /* FIXME: addr is not only env->pc */
         do_stack_frame(env, &sp, 2, oldsr, env->pc, env->pc);
         break;
 
     case EXCP_CHK:
     case EXCP_DIV0:
+    case EXCP_TRACE:
         do_stack_frame(env, &sp, 2, oldsr, env->mmu.ar, env->pc);
         break;
 
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index d775345bfa..399d9232e4 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -114,6 +114,7 @@ typedef struct DisasContext {
     DisasContextBase base;
     CPUM68KState *env;
     target_ulong pc;
+    target_ulong pc_prev;
     CCOp cc_op; /* Current CC operation */
     int cc_op_synced;
     TCGv_i64 mactmp;
@@ -298,6 +299,21 @@ static void gen_raise_exception(int nr)
     tcg_temp_free_i32(tmp);
 }
 
+static void gen_raise_exception_format2(DisasContext *s, int nr,
+                                        target_ulong this_pc)
+{
+    /*
+     * Pass the address of the insn to the exception handler,
+     * for recording in the Format $2 (6-word) stack frame.
+     * Re-use mmu.ar for the purpose, since that's only valid
+     * after tlb_fill.
+     */
+    tcg_gen_st_i32(tcg_constant_i32(this_pc), cpu_env,
+                   offsetof(CPUM68KState, mmu.ar));
+    gen_raise_exception(nr);
+    s->base.is_jmp = DISAS_NORETURN;
+}
+
 static void gen_exception(DisasContext *s, uint32_t dest, int nr)
 {
     update_cc_op(s);
@@ -1494,12 +1510,13 @@ static void gen_exit_tb(DisasContext *s)
     } while (0)
 
 /* Generate a jump to an immediate address.  */
-static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest)
+static void gen_jmp_tb(DisasContext *s, int n, target_ulong dest,
+                       target_ulong src)
 {
     if (unlikely(s->ss_active)) {
         update_cc_op(s);
         tcg_gen_movi_i32(QREG_PC, dest);
-        gen_raise_exception(EXCP_TRACE);
+        gen_raise_exception_format2(s, EXCP_TRACE, src);
     } else if (translator_use_goto_tb(&s->base, dest)) {
         tcg_gen_goto_tb(n);
         tcg_gen_movi_i32(QREG_PC, dest);
@@ -1548,9 +1565,9 @@ DISAS_INSN(dbcc)
     tcg_gen_addi_i32(tmp, tmp, -1);
     gen_partset_reg(OS_WORD, reg, tmp);
     tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, -1, l1);
-    gen_jmp_tb(s, 1, base + offset);
+    gen_jmp_tb(s, 1, base + offset, s->base.pc_next);
     gen_set_label(l1);
-    gen_jmp_tb(s, 0, s->pc);
+    gen_jmp_tb(s, 0, s->pc, s->base.pc_next);
 }
 
 DISAS_INSN(undef_mac)
@@ -3096,13 +3113,13 @@ DISAS_INSN(branch)
         /* Bcc */
         TCGLabel *l1 = gen_new_label();
         gen_jmpcc(s, ((insn >> 8) & 0xf) ^ 1, l1);
-        gen_jmp_tb(s, 1, base + offset);
+        gen_jmp_tb(s, 1, base + offset, s->base.pc_next);
         gen_set_label(l1);
-        gen_jmp_tb(s, 0, s->pc);
+        gen_jmp_tb(s, 0, s->pc, s->base.pc_next);
     } else {
         /* Unconditional branch.  */
         update_cc_op(s);
-        gen_jmp_tb(s, 0, base + offset);
+        gen_jmp_tb(s, 0, base + offset, s->base.pc_next);
     }
 }
 
@@ -5485,9 +5502,9 @@ DISAS_INSN(fbcc)
     l1 = gen_new_label();
     update_cc_op(s);
     gen_fjmpcc(s, insn & 0x3f, l1);
-    gen_jmp_tb(s, 0, s->pc);
+    gen_jmp_tb(s, 0, s->pc, s->base.pc_next);
     gen_set_label(l1);
-    gen_jmp_tb(s, 1, base + offset);
+    gen_jmp_tb(s, 1, base + offset, s->base.pc_next);
 }
 
 DISAS_INSN(fscc)
@@ -6158,6 +6175,8 @@ static void m68k_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
 
     dc->env = env;
     dc->pc = dc->base.pc_first;
+    /* This value will always be filled in properly before m68k_tr_tb_stop. */
+    dc->pc_prev = 0xdeadbeef;
     dc->cc_op = CC_OP_DYNAMIC;
     dc->cc_op_synced = 1;
     dc->done_mac = 0;
@@ -6191,6 +6210,7 @@ static void m68k_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
     do_writebacks(dc);
     do_release(dc);
 
+    dc->pc_prev = dc->base.pc_next;
     dc->base.pc_next = dc->pc;
 
     if (dc->base.is_jmp == DISAS_NEXT) {
@@ -6225,17 +6245,12 @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
         break;
     case DISAS_TOO_MANY:
         update_cc_op(dc);
-        if (dc->ss_active) {
-            tcg_gen_movi_i32(QREG_PC, dc->pc);
-            gen_raise_exception(EXCP_TRACE);
-        } else {
-            gen_jmp_tb(dc, 0, dc->pc);
-        }
+        gen_jmp_tb(dc, 0, dc->pc, dc->pc_prev);
         break;
     case DISAS_JUMP:
         /* We updated CC_OP and PC in gen_jmp/gen_jmp_im.  */
         if (dc->ss_active) {
-            gen_raise_exception(EXCP_TRACE);
+            gen_raise_exception_format2(dc, EXCP_TRACE, dc->pc_prev);
         } else {
             tcg_gen_lookup_and_goto_ptr();
         }
@@ -6246,7 +6261,7 @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
          * other state that may require returning to the main loop.
          */
         if (dc->ss_active) {
-            gen_raise_exception(EXCP_TRACE);
+            gen_raise_exception_format2(dc, EXCP_TRACE, dc->pc_prev);
         } else {
             tcg_gen_exit_tb(NULL, 0);
         }
-- 
2.34.1



  parent reply	other threads:[~2022-04-30 18:03 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-30 17:53 [PATCH v4 00/17] target/m68k: Conditional traps + trap cleanup Richard Henderson
2022-04-30 17:53 ` [PATCH v4 01/17] target/m68k: Raise the TRAPn exception with the correct pc Richard Henderson
2022-04-30 17:53 ` [PATCH v4 02/17] target/m68k: Switch over exception type in m68k_interrupt_all Richard Henderson
2022-04-30 17:53 ` [PATCH v4 03/17] target/m68k: Fix coding style " Richard Henderson
2022-05-22 21:47   ` Philippe Mathieu-Daudé via
2022-05-25 18:32   ` Laurent Vivier
2022-04-30 17:53 ` [PATCH v4 04/17] linux-user/m68k: Handle EXCP_TRAP1 through EXCP_TRAP15 Richard Henderson
2022-05-25 19:18   ` Laurent Vivier
2022-04-30 17:53 ` [PATCH v4 05/17] target/m68k: Remove retaddr in m68k_interrupt_all Richard Henderson
2022-04-30 17:53 ` [PATCH v4 06/17] target/m68k: Fix address argument for EXCP_CHK Richard Henderson
2022-04-30 17:53 ` [PATCH v4 07/17] target/m68k: Fix pc, c flag, and address argument for EXCP_DIV0 Richard Henderson
2022-04-30 17:53 ` Richard Henderson [this message]
2022-05-25 21:58   ` [PATCH v4 08/17] target/m68k: Fix address argument for EXCP_TRACE Laurent Vivier
2022-04-30 17:53 ` [PATCH v4 09/17] target/m68k: Fix stack frame for EXCP_ILLEGAL Richard Henderson
2022-05-25 21:20   ` Laurent Vivier
2022-04-30 17:53 ` [PATCH v4 10/17] target/m68k: Implement TRAPcc Richard Henderson
2022-05-25 21:40   ` Laurent Vivier
2022-05-25 22:26     ` Richard Henderson
2022-05-26  0:15       ` Laurent Vivier
2022-05-27 15:47         ` Richard Henderson
2022-04-30 17:53 ` [PATCH v4 11/17] target/m68k: Implement TPF in terms of TRAPcc Richard Henderson
2022-05-22 21:52   ` Philippe Mathieu-Daudé via
2022-05-25 21:43   ` Laurent Vivier
2022-04-30 17:53 ` [PATCH v4 12/17] target/m68k: Implement TRAPV Richard Henderson
2022-05-25 21:47   ` Laurent Vivier
2022-04-30 17:53 ` [PATCH v4 13/17] target/m68k: Implement FTRAPcc Richard Henderson
2022-05-25 21:51   ` Laurent Vivier
2022-04-30 17:53 ` [PATCH v4 14/17] tests/tcg/m68k: Add trap.c Richard Henderson
2022-05-25 21:52   ` Laurent Vivier
2022-04-30 17:53 ` [PATCH v4 15/17] linux-user/strace: Fix print_syscall_err Richard Henderson
2022-05-25 19:23   ` Laurent Vivier
2022-04-30 17:53 ` [PATCH v4 16/17] linux-user/strace: Adjust get_thread_area for m68k Richard Henderson
2022-05-25 19:33   ` Laurent Vivier
2022-04-30 17:53 ` [PATCH v4 17/17] target/m68k: Mark helper_raise_exception as noreturn Richard Henderson
2022-05-22 21:48   ` Philippe Mathieu-Daudé via
2022-05-25 19:45   ` Laurent Vivier
2022-05-25 20:13     ` Richard Henderson
2022-05-25 21:54   ` Laurent Vivier
2022-05-21  5:22 ` [PATCH v4 00/17] target/m68k: Conditional traps + trap cleanup Richard Henderson

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