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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 01/21] target/arm: Normalize aarch64 gdbstub get/set function names
Date: Mon,  6 Mar 2023 15:34:15 +0000	[thread overview]
Message-ID: <20230306153435.490894-2-peter.maydell@linaro.org> (raw)
In-Reply-To: <20230306153435.490894-1-peter.maydell@linaro.org>

From: Richard Henderson <richard.henderson@linaro.org>

Make the form of the function names between fp and sve the same:
  - arm_gdb_*_svereg -> aarch64_gdb_*_sve_reg.
  - aarch64_fpu_gdb_*_reg -> aarch64_gdb_*_fpu_reg.

Reviewed-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/internals.h | 8 ++++----
 target/arm/gdbstub.c   | 9 +++++----
 target/arm/gdbstub64.c | 8 ++++----
 3 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/target/arm/internals.h b/target/arm/internals.h
index 3c7341e7741..f99d0d98413 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1344,10 +1344,10 @@ static inline uint64_t pmu_counter_mask(CPUARMState *env)
 }
 
 #ifdef TARGET_AARCH64
-int arm_gdb_get_svereg(CPUARMState *env, GByteArray *buf, int reg);
-int arm_gdb_set_svereg(CPUARMState *env, uint8_t *buf, int reg);
-int aarch64_fpu_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg);
-int aarch64_fpu_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg);
+int aarch64_gdb_get_sve_reg(CPUARMState *env, GByteArray *buf, int reg);
+int aarch64_gdb_set_sve_reg(CPUARMState *env, uint8_t *buf, int reg);
+int aarch64_gdb_get_fpu_reg(CPUARMState *env, GByteArray *buf, int reg);
+int aarch64_gdb_set_fpu_reg(CPUARMState *env, uint8_t *buf, int reg);
 void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp);
 void arm_cpu_sme_finalize(ARMCPU *cpu, Error **errp);
 void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c
index 2f806512d0a..cf1c01e3cf5 100644
--- a/target/arm/gdbstub.c
+++ b/target/arm/gdbstub.c
@@ -466,12 +466,13 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
          */
 #ifdef TARGET_AARCH64
         if (isar_feature_aa64_sve(&cpu->isar)) {
-            gdb_register_coprocessor(cs, arm_gdb_get_svereg, arm_gdb_set_svereg,
-                                     arm_gen_dynamic_svereg_xml(cs, cs->gdb_num_regs),
+            int nreg = arm_gen_dynamic_svereg_xml(cs, cs->gdb_num_regs);
+            gdb_register_coprocessor(cs, aarch64_gdb_get_sve_reg,
+                                     aarch64_gdb_set_sve_reg, nreg,
                                      "sve-registers.xml", 0);
         } else {
-            gdb_register_coprocessor(cs, aarch64_fpu_gdb_get_reg,
-                                     aarch64_fpu_gdb_set_reg,
+            gdb_register_coprocessor(cs, aarch64_gdb_get_fpu_reg,
+                                     aarch64_gdb_set_fpu_reg,
                                      34, "aarch64-fpu.xml", 0);
         }
 #endif
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index 07a6746944d..c598cb03759 100644
--- a/target/arm/gdbstub64.c
+++ b/target/arm/gdbstub64.c
@@ -72,7 +72,7 @@ int aarch64_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
     return 0;
 }
 
-int aarch64_fpu_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg)
+int aarch64_gdb_get_fpu_reg(CPUARMState *env, GByteArray *buf, int reg)
 {
     switch (reg) {
     case 0 ... 31:
@@ -92,7 +92,7 @@ int aarch64_fpu_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg)
     }
 }
 
-int aarch64_fpu_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg)
+int aarch64_gdb_set_fpu_reg(CPUARMState *env, uint8_t *buf, int reg)
 {
     switch (reg) {
     case 0 ... 31:
@@ -116,7 +116,7 @@ int aarch64_fpu_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg)
     }
 }
 
-int arm_gdb_get_svereg(CPUARMState *env, GByteArray *buf, int reg)
+int aarch64_gdb_get_sve_reg(CPUARMState *env, GByteArray *buf, int reg)
 {
     ARMCPU *cpu = env_archcpu(env);
 
@@ -164,7 +164,7 @@ int arm_gdb_get_svereg(CPUARMState *env, GByteArray *buf, int reg)
     return 0;
 }
 
-int arm_gdb_set_svereg(CPUARMState *env, uint8_t *buf, int reg)
+int aarch64_gdb_set_sve_reg(CPUARMState *env, uint8_t *buf, int reg)
 {
     ARMCPU *cpu = env_archcpu(env);
 
-- 
2.34.1



  reply	other threads:[~2023-03-06 16:34 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-06 15:34 [PULL 00/21] target-arm queue Peter Maydell
2023-03-06 15:34 ` Peter Maydell [this message]
2023-03-06 15:34 ` [PULL 02/21] target/arm: Unexport arm_gen_dynamic_sysreg_xml Peter Maydell
2023-03-06 15:34 ` [PULL 03/21] target/arm: Move arm_gen_dynamic_svereg_xml to gdbstub64.c Peter Maydell
2023-03-06 15:34 ` [PULL 04/21] target/arm: Split out output_vector_union_type Peter Maydell
2023-03-06 15:34 ` [PULL 05/21] target/arm: Simplify register counting in arm_gen_dynamic_svereg_xml Peter Maydell
2023-03-06 15:34 ` [PULL 06/21] target/arm: Hoist pred_width " Peter Maydell
2023-03-06 15:34 ` [PULL 07/21] target/arm: Fix svep width " Peter Maydell
2023-03-06 15:34 ` [PULL 08/21] target/arm: Add name argument to output_vector_union_type Peter Maydell
2023-03-06 15:34 ` [PULL 09/21] target/arm: Simplify iteration over bit widths Peter Maydell
2023-03-06 15:34 ` [PULL 10/21] target/arm: Create pauth_ptr_mask Peter Maydell
2023-03-06 15:34 ` [PULL 11/21] target/arm: Implement gdbstub pauth extension Peter Maydell
2023-03-06 15:34 ` [PULL 12/21] target/arm: Export arm_v7m_mrs_control Peter Maydell
2023-03-06 15:34 ` [PULL 13/21] target/arm: Export arm_v7m_get_sp_ptr Peter Maydell
2023-03-06 15:34 ` [PULL 14/21] target/arm: Implement gdbstub m-profile systemreg and secext Peter Maydell
2023-03-06 15:34 ` [PULL 15/21] target/arm: Handle m-profile in arm_is_secure Peter Maydell
2023-03-06 15:34 ` [PULL 16/21] target/arm: Stub arm_hcr_el2_eff for m-profile Peter Maydell
2023-03-06 15:34 ` [PULL 17/21] target/arm: Diagnose incorrect usage of arm_is_secure subroutines Peter Maydell
2023-03-06 15:34 ` [PULL 18/21] target/arm: Rewrite check_s2_mmu_setup Peter Maydell
2023-03-06 15:34 ` [PULL 19/21] hw: arm: Support direct boot for Linux/arm64 EFI zboot images Peter Maydell
2023-03-06 15:34 ` [PULL 20/21] hw: allwinner-i2c: Fix TWI_CNTR_INT_FLAG on SUN6i SoCs Peter Maydell
2023-03-06 15:34 ` [PULL 21/21] hw: arm: allwinner-h3: Fix and complete H3 i2c devices Peter Maydell
2023-03-07 12:42 ` [PULL 00/21] target-arm queue Peter Maydell

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