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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 2/7] linux-user/elfload.c: Correct SME feature names reported in cpuinfo
Date: Mon, 11 Sep 2023 14:53:35 +0100	[thread overview]
Message-ID: <20230911135340.1139553-3-peter.maydell@linaro.org> (raw)
In-Reply-To: <20230911135340.1139553-1-peter.maydell@linaro.org>

Some of the names we use for CPU features in linux-user's dummy
/proc/cpuinfo don't match the strings in the real kernel in
arch/arm64/kernel/cpuinfo.c. Specifically, the SME related
features have an underscore in the HWCAP_FOO define name,
but (like the SVE ones) they do not have an underscore in the
string in cpuinfo. Correct the errors.

Fixes: a55b9e7226708 ("linux-user: Emulate /proc/cpuinfo on aarch64 and arm")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 linux-user/elfload.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index a5b28fa3e7a..5ce009d7137 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -844,13 +844,13 @@ const char *elf_hwcap2_str(uint32_t bit)
     [__builtin_ctz(ARM_HWCAP2_A64_RPRES        )] = "rpres",
     [__builtin_ctz(ARM_HWCAP2_A64_MTE3         )] = "mte3",
     [__builtin_ctz(ARM_HWCAP2_A64_SME          )] = "sme",
-    [__builtin_ctz(ARM_HWCAP2_A64_SME_I16I64   )] = "sme_i16i64",
-    [__builtin_ctz(ARM_HWCAP2_A64_SME_F64F64   )] = "sme_f64f64",
-    [__builtin_ctz(ARM_HWCAP2_A64_SME_I8I32    )] = "sme_i8i32",
-    [__builtin_ctz(ARM_HWCAP2_A64_SME_F16F32   )] = "sme_f16f32",
-    [__builtin_ctz(ARM_HWCAP2_A64_SME_B16F32   )] = "sme_b16f32",
-    [__builtin_ctz(ARM_HWCAP2_A64_SME_F32F32   )] = "sme_f32f32",
-    [__builtin_ctz(ARM_HWCAP2_A64_SME_FA64     )] = "sme_fa64",
+    [__builtin_ctz(ARM_HWCAP2_A64_SME_I16I64   )] = "smei16i64",
+    [__builtin_ctz(ARM_HWCAP2_A64_SME_F64F64   )] = "smef64f64",
+    [__builtin_ctz(ARM_HWCAP2_A64_SME_I8I32    )] = "smei8i32",
+    [__builtin_ctz(ARM_HWCAP2_A64_SME_F16F32   )] = "smef16f32",
+    [__builtin_ctz(ARM_HWCAP2_A64_SME_B16F32   )] = "smeb16f32",
+    [__builtin_ctz(ARM_HWCAP2_A64_SME_F32F32   )] = "smef32f32",
+    [__builtin_ctz(ARM_HWCAP2_A64_SME_FA64     )] = "smefa64",
     };
 
     return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
-- 
2.34.1



  parent reply	other threads:[~2023-09-11 13:55 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-11 13:53 [PATCH 0/7] target/arm: hwcaps updates, FEAT_HBC Peter Maydell
2023-09-11 13:53 ` [PATCH 1/7] target/arm: Add ID_AA64ISAR2_EL1 Peter Maydell
2023-09-11 13:53 ` Peter Maydell [this message]
2023-09-11 14:51   ` [PATCH 2/7] linux-user/elfload.c: Correct SME feature names reported in cpuinfo Philippe Mathieu-Daudé
2023-09-11 13:53 ` [PATCH 3/7] linux-user/elfload.c: Add missing arm and arm64 hwcap values Peter Maydell
2023-09-11 14:59   ` Philippe Mathieu-Daudé
2023-09-11 15:04     ` Peter Maydell
2023-09-11 13:53 ` [PATCH 4/7] linux-user/elfload.c: Report previously missing arm32 hwcaps Peter Maydell
2023-09-11 13:53 ` [PATCH 5/7] target/arm: Update AArch64 ID register field definitions Peter Maydell
2023-09-11 14:36   ` Peter Maydell
2023-09-11 13:53 ` [PATCH 6/7] target/arm: Update user-mode ID reg mask values Peter Maydell
2023-09-21 15:03   ` Peter Maydell
2023-09-11 13:53 ` [PATCH 7/7] target/arm: Implement FEAT_HBC Peter Maydell
2023-09-11 15:01   ` Philippe Mathieu-Daudé
2023-09-12  0:44 ` [PATCH 0/7] target/arm: hwcaps updates, FEAT_HBC Richard Henderson

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