From: Gavin Shan <gshan@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Andrew Jones <drjones@redhat.com>,
jthierry@redhat.com, Alexey Kardashevskiy <aik@ozlabs.ru>,
Marc Zyngier <maz@kernel.org>,
Richard Henderson <richard.henderson@linaro.org>,
QEMU Developers <qemu-devel@nongnu.org>,
Eric Auger <eric.auger@redhat.com>,
qemu-arm <qemu-arm@nongnu.org>, Shan Gavin <shan.gavin@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [RESEND RFC PATCH v2 1/2] target/arm: Allow to inject SError interrupt
Date: Thu, 13 Feb 2020 14:49:21 +1100 [thread overview]
Message-ID: <21e4051a-4d06-03cb-6d8e-5331b5b570c4@redhat.com> (raw)
In-Reply-To: <CAFEAcA-RiVfrFFkxppB=z8x76rjorF-5onyGwVAdsHY7W1U88g@mail.gmail.com>
On 2/12/20 10:34 PM, Peter Maydell wrote:
> On Wed, 12 Feb 2020 at 06:39, Gavin Shan <gshan@redhat.com> wrote:
>> On 2/5/20 10:05 PM, Gavin Shan wrote:
>>> This allows to inject SError interrupt, which will be used on receiving
>>> QMP/HMP "nmi" command in next patch.
>>>
>>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>>> ---
>>> target/arm/cpu.c | 11 +++++++++++
>>> target/arm/cpu.h | 12 +++++++++---
>>> target/arm/helper.c | 4 ++++
>>> 3 files changed, 24 insertions(+), 3 deletions(-)
>>>
>>
>> Hi Peter, could you please take a look when you get a chance? I'm not sure
>> the implementation is good enough to inject SError. If there are somebody
>> else who can help to review, please let me know so that I can copy her/him
>> either.
>
> Yeah, this is on my list to look at; Richard Henderson also could
> have a look at it. From a quick scan I suspect you may be missing
> handling for AArch32.
>
[Thanks for copying Richard Henderson]
Yes, the functionality is only supported on aarch64 currently by intention
because the next patch enables it on "max" and "host" CPU models and both
of them are running in aarch64 mode.
https://patchwork.kernel.org/patch/11366119/
If you really want to get this supported for aarch32 either, I can do
it. However, it seems there is a long list of aarch32 CPU models, defined
in target/arm/cpu.c::arm_cpus. so which CPU models you prefer to see with
this supported? I think we might choose one or two popular CPU models if
you agree.
Thanks,
Gavin
next prev parent reply other threads:[~2020-02-13 3:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-05 11:05 [RESEND RFC PATCH v2 1/2] target/arm: Allow to inject SError interrupt Gavin Shan
2020-02-12 6:39 ` Gavin Shan
2020-02-12 11:34 ` Peter Maydell
2020-02-13 3:49 ` Gavin Shan [this message]
2020-02-13 5:39 ` Richard Henderson
2020-02-13 11:09 ` Gavin Shan
2020-02-13 10:31 ` Peter Maydell
2020-02-14 2:25 ` Gavin Shan
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