From: Zenghui Yu <yuzenghui@huawei.com>
To: Eric Auger <eric.auger@redhat.com>, <eric.auger.pro@gmail.com>,
<qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>,
<peter.maydell@linaro.org>
Cc: maz@kernel.org
Subject: Re: [Qemu-devel] [RFC 2/3] intc/arm_gic: Support PPI injection for more than 256 vpus
Date: Thu, 29 Aug 2019 10:53:54 +0800 [thread overview]
Message-ID: <29520007-f3fd-ed8d-f52b-2839f991556a@huawei.com> (raw)
In-Reply-To: <20190827160554.30995-3-eric.auger@redhat.com>
Hi Eric,
On 2019/8/28 0:05, Eric Auger wrote:
> Host kernels that expose the KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 capability
> allow injection of PPIs along with vcpu ids larger than 255. Let's
> encode the vpcu id on 12 bits according to the upgraded KVM_IRQ_LINE
> ABI when needed.
>
> Without that patch qemu exits with "kvm_set_irq: Invalid argument"
> message.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reported-by: Zenghui Yu <yuzenghui@huawei.com>
> ---
> hw/intc/arm_gic_kvm.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c
> index b56fda144f..889293e97f 100644
> --- a/hw/intc/arm_gic_kvm.c
> +++ b/hw/intc/arm_gic_kvm.c
> @@ -56,6 +56,7 @@ void kvm_arm_gic_set_irq(uint32_t num_irq, int irq, int level)
> * CPU number and interrupt number.
> */
> int kvm_irq, irqtype, cpu;
> + int cpu_idx1 = 0, cpu_idx2 = 0;
>
> if (irq < (num_irq - GIC_INTERNAL)) {
> /* External interrupt. The kernel numbers these like the GIC
> @@ -63,17 +64,20 @@ void kvm_arm_gic_set_irq(uint32_t num_irq, int irq, int level)
> * internal ones.
> */
> irqtype = KVM_ARM_IRQ_TYPE_SPI;
> - cpu = 0;
> irq += GIC_INTERNAL;
> } else {
> /* Internal interrupt: decode into (cpu, interrupt id) */
> irqtype = KVM_ARM_IRQ_TYPE_PPI;
> irq -= (num_irq - GIC_INTERNAL);
> cpu = irq / GIC_INTERNAL;
> + cpu_idx2 = cpu / 256;
> + cpu_idx1 = cpu % 256;
> irq %= GIC_INTERNAL;
> }
> - kvm_irq = (irqtype << KVM_ARM_IRQ_TYPE_SHIFT)
> - | (cpu << KVM_ARM_IRQ_VCPU_SHIFT) | irq;
> + kvm_irq = (irqtype << KVM_ARM_IRQ_TYPE_SHIFT) |
> + (cpu_idx1 << KVM_ARM_IRQ_VCPU_SHIFT) |
> + ((cpu_idx2 & KVM_ARM_IRQ_VCPU2_MASK) << KVM_ARM_IRQ_VCPU2_SHIFT) |
> + irq;
>
> kvm_set_irq(kvm_state, kvm_irq, !!level);
> }
>
For confirmation, should we also adjust the vcpu_index in
arm_cpu_kvm_set_irq(), just like above?
Thanks,
zenghui
next prev parent reply other threads:[~2019-08-29 4:58 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-27 16:05 [Qemu-devel] [RFC 0/3] KVM/ARM: Fix >256 vcpus Eric Auger
2019-08-27 16:05 ` [Qemu-devel] [RFC 1/3] linux headers: update for KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 Eric Auger
2019-08-27 16:05 ` [Qemu-devel] [RFC 2/3] intc/arm_gic: Support PPI injection for more than 256 vpus Eric Auger
2019-08-29 2:53 ` Zenghui Yu [this message]
2019-08-29 7:58 ` Auger Eric
2019-08-29 9:21 ` Auger Eric
2019-09-03 8:29 ` Peter Maydell
2019-09-03 8:40 ` Auger Eric
2019-09-06 10:14 ` Peter Maydell
2019-08-27 16:05 ` [Qemu-devel] [RFC 3/3] virt: Check KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 for smp_cpus > 256 Eric Auger
2019-08-28 3:28 ` Richard Henderson
2019-08-28 6:19 ` Auger Eric
2019-09-06 10:16 ` Peter Maydell
2019-08-29 2:06 ` [Qemu-devel] [RFC 0/3] KVM/ARM: Fix >256 vcpus Zenghui Yu
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