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X-Received-From: 2607:f8b0:4864:20::641 Subject: [Qemu-devel] [PATCH v8 18/21] cpu: TLB_FLAGS_MASK bit to force memory slow path X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tony Nguyen , Tony Nguyen , Paolo Bonzini , Richard Henderson , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fast path is taken when TLB_FLAGS_MASK is all zero. TLB_FORCE_SLOW is simply a TLB_FLAGS_MASK bit to force the slow path, there are no other side effects. Signed-off-by: Tony Nguyen Reviewed-by: Richard Henderson --- include/exec/cpu-all.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 536ea58f81..e496f9900f 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -331,12 +331,18 @@ CPUArchState *cpu_copy(CPUArchState *env); #define TLB_MMIO (1 << (TARGET_PAGE_BITS - 3)) /* Set if TLB entry must have MMU lookup repeated for every access */ #define TLB_RECHECK (1 << (TARGET_PAGE_BITS - 4)) +/* Set if TLB entry must take the slow path. */ +#define TLB_FORCE_SLOW (1 << (TARGET_PAGE_BITS - 5)) /* Use this mask to check interception with an alignment mask * in a TCG backend. */ -#define TLB_FLAGS_MASK (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_MMIO \ - | TLB_RECHECK) +#define TLB_FLAGS_MASK \ + (TLB_INVALID_MASK \ + | TLB_NOTDIRTY \ + | TLB_MMIO \ + | TLB_RECHECK \ + | TLB_FORCE_SLOW) /** * tlb_hit_page: return true if page aligned @addr is a hit against the -- 2.23.0