qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Markus Armbruster <armbru@redhat.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Eduardo Habkost <ehabkost@redhat.com>
Cc: Damien Hedde <damien.hedde@greensocs.com>,
	QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: Resetting non-qdev children in a 3-phase reset device
Date: Sat, 24 Apr 2021 01:28:56 +0200	[thread overview]
Message-ID: <3dcb8efa-8f6b-0f45-a753-cc58d3bf9855@amsat.org> (raw)
In-Reply-To: <2f4155ca-ee84-75f0-8b35-aac6b18ee4f0@amsat.org>

On 4/24/21 1:06 AM, Philippe Mathieu-Daudé wrote:
> On 4/22/21 4:20 PM, Philippe Mathieu-Daudé wrote:
>> On 4/22/21 3:21 PM, Markus Armbruster wrote:
>>> Peter Maydell <peter.maydell@linaro.org> writes:
> 
>>> Most qdevs plug into a qbus, but some don't.
>>>
>>> DeviceClass member @bus_type names the kind of bus the device plugs
>>> into.  It's a QOM type name.  Example: for a PCI device, it's
>>> TYPE_PCI_BUS, and the device must be plugged into an instance of a
>>> (subtype of) TYPE_PCI_BUS.
>>>
>>> If @bus_type is null, the device does not plug into any qbus.
>>>
>>> The qbus a device is plugged into is also called the parent bus.  Not to
>>> be confused with the QOM parent.
>>>
>>>>>             But even without parent they end in the /unattached
>>>>> container below /machine, so if the reset were there, the
>>>>> machine could still iterate over the /unattached children.
>>>>
>>>> ...yes, /unattached is what I was thinking about.
>>>>
>>>> My current half-thought-through view is that where we ought
>>>> to try to end up is something like:
>>>>
>>>>  * "real" buses should continue to propagate reset
>>>>    (A "real" bus is like PCI, SCSI, and other buses where the real
>>>>    hardware has a concept of a "bus reset" or where the power to the
>>>>    plugged device comes from the bus so that powercycling the
>>>>    controller naturally powercycles the devices. Sysbus is not a
>>>>    "real" bus; I haven't checked the others to see if we have any
>>>>    other non-real buses)
>>>>  * reset should follow the QOM tree for objects not on a "real" bus
>>>>    (that is, the qdev "reset this device" function should do
>>>>    "iterate through my QOM children and reset those which are not
>>>>    on a real bus" as well as its current "reset myself" and "reset
>>>>    every qbus I have")
>>>>  * instead of reset starting with the sysbus and working along the
>>>>    qbus hierarchy, we start by resetting the machine. That should
>>>>    include resetting all the QOM children of the machine. Any
>>>>    device which has a qbus should reset the qbus as part of its
>>>>    reset, but only "real" buses reset their children when reset.
>>>
>>> Sounds like an approximation of reset wire modelling :)
>>>
>>> In a real machine, the reset signal travels along "wires" (in quotes,
>>> because it need not be a dedicated wire, although it commonly is)
>>>
>>> We're not modelling these wires explicitly so far.  Instead, we make
>>> assumptions such as "reset flows along the qdev tree", which are close
>>> enough except when they aren't.
>>>
>>> What you propose is likely closer to reality than what we have now.
>>
>> Then maybe reality is easier to model =)
>>
>>> Do I make sense?
>>
>> I guess so. Now I wonder if Peter's approach is doable while still
>> having "incompletely QOMified devices".
>>
>> But if we can propagate reset tree via QOM, it is a good excuse
>> to finish QOM'ifying devices and enforce the API to prohibit non-QOM
>> ones.
>>
>> And remove the crutch in device_set_realized().
>>
>>>> That means that, for instance, if you reset an SoC container object
>>>> it will reset all the sub-devices within the SoC and the miscellaneous
>>>> bits of glue logic like OR gates it might also own[*]. It also means that
>>>> CPU objects should no longer need weird special casing, because they
>>>> are part of the QOM hierarchy and get reset that way.
>>>>
>>>> [*] Fun fact: TYPE_OR_IRQ inherits directly from TYPE_DEVICE which
>>>> means that pretty much no instances of it ever get reset.
>>>>
>>>> There is of course a massive unsolved problem with this idea, which
>>>> is the usual "how do we get there from here" one.
>>>>
>>>> (Eventually I think we might be able to collapse TYPE_SYS_BUS_DEVICE
>>>> down into TYPE_DEVICE: there is no particular reason why a TYPE_DEVICE
>>>> can have GPIO inputs and outputs but only a TYPE_SYS_BUS_DEVICE can
>>>> claim to have MMIO regions and IRQs. "Only sysbus devices get reset"
>>>> is a big part of why a lot of devices today are sysbus.)
> 
> Looking at qemu_register_reset() uses I found this commit:
> 
> commit 0c7322cfd3fd382c0096c2a9f00775818a878e13
> Date:   Mon Jun 29 08:21:10 2015 +0200
> 
>  watchdog/diag288: correctly register for system reset requests
> 
>  The diag288 watchdog is no sysbus device, therefore it doesn't get
>  triggered on resets automatically using dc->reset.
> 
>  Let's register the reset handler manually, so we get correctly notified
>  again when a system reset was requested. Also reset the watchdog on
>  subsystem resets that don't trigger a full system reset.
> 
> Why is the reset() handler in DeviceClass and not in SysbusDeviceClass
> if "Only sysbus devices get reset"? ...

Ah, probably because the problem is generic to all busses (ISA, ...)
and not just sysbus.

>>> Sysbus may habe been a design mistake.  It goes back the qdev design
>>> assumption "every device plugs into exactly one bus, every bus is part
>>> of exactly one device, and the main system bus is the root of this
>>> tree".  The assumption ceased to hold long ago, but we still have
>>> sysbus.
> 


  reply	other threads:[~2021-04-23 23:29 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-09 18:13 Resetting non-qdev children in a 3-phase reset device Peter Maydell
2021-04-18 20:16 ` Philippe Mathieu-Daudé
2021-04-19  9:03   ` Peter Maydell
2021-04-22 13:21     ` Markus Armbruster
2021-04-22 14:20       ` Philippe Mathieu-Daudé
2021-04-23 23:06         ` Philippe Mathieu-Daudé
2021-04-23 23:28           ` Philippe Mathieu-Daudé [this message]
2021-04-24  5:28             ` Markus Armbruster
2021-04-24 13:04               ` Philippe Mathieu-Daudé
2021-04-24 13:15                 ` Philippe Mathieu-Daudé
2021-04-25 18:33                 ` Peter Maydell
2021-04-26  5:19                   ` Markus Armbruster
2021-04-26  9:09                     ` Peter Maydell
2021-04-26  9:23                   ` Philippe Mathieu-Daudé
2021-04-26  9:33                     ` Peter Maydell
2021-04-26 11:14                       ` Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3dcb8efa-8f6b-0f45-a753-cc58d3bf9855@amsat.org \
    --to=f4bug@amsat.org \
    --cc=armbru@redhat.com \
    --cc=damien.hedde@greensocs.com \
    --cc=ehabkost@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).