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From: Auger Eric <eric.auger@redhat.com>
To: Kunkun Jiang <jiangkunkun@huawei.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	"open list:ARM SMMU" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>,
	shameerali.kolothum.thodi@huawei.com
Cc: Zenghui Yu <yuzenghui@huawei.com>,
	wanghaibin.wang@huawei.com, Keqian Zhu <zhukeqian1@huawei.com>,
	Peter Xu <peterx@redhat.com>
Subject: Re: [PATCH] hw/arm/smmuv3: Support 16K translation granule
Date: Wed, 7 Apr 2021 10:41:37 +0200	[thread overview]
Message-ID: <480ded69-5141-9eed-9326-365260d05fe0@redhat.com> (raw)
In-Reply-To: <20210331064713.1782-1-jiangkunkun@huawei.com>

Hi Kunkun,

On 3/31/21 8:47 AM, Kunkun Jiang wrote:
> The driver can query some bits in SMMUv3 IDR5 to learn which
> translation granules are supported. Arm recommends that SMMUv3
> implementations support at least 4K and 64K granules. But in
> the vSMMUv3, there seems to be no reason not to support 16K
> translation granule. In addition, if 16K is not supported,
> vSVA will failed to be enabled in the future for 16K guest
> kernel. So it'd better to support it.
> 
> Signed-off-by: Kunkun Jiang <jiangkunkun@huawei.com>

Looks good to me.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>

Thanks

Eric
> ---
>  hw/arm/smmuv3.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> index 3b87324ce2..0a483b0bab 100644
> --- a/hw/arm/smmuv3.c
> +++ b/hw/arm/smmuv3.c
> @@ -259,8 +259,9 @@ static void smmuv3_init_regs(SMMUv3State *s)
>      s->idr[3] = FIELD_DP32(s->idr[3], IDR3, RIL, 1);
>      s->idr[3] = FIELD_DP32(s->idr[3], IDR3, HAD, 1);
>  
> -   /* 4K and 64K granule support */
> +    /* 4K, 16K and 64K granule support */
>      s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN4K, 1);
> +    s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN16K, 1);
>      s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN64K, 1);
>      s->idr[5] = FIELD_DP32(s->idr[5], IDR5, OAS, SMMU_IDR5_OAS); /* 44 bits */
>  
> @@ -503,7 +504,8 @@ static int decode_cd(SMMUTransCfg *cfg, CD *cd, SMMUEventInfo *event)
>  
>          tg = CD_TG(cd, i);
>          tt->granule_sz = tg2granule(tg, i);
> -        if ((tt->granule_sz != 12 && tt->granule_sz != 16) || CD_ENDI(cd)) {
> +        if ((tt->granule_sz != 12 && tt->granule_sz != 14 &&
> +             tt->granule_sz != 16) || CD_ENDI(cd)) {
>              goto bad_cd;
>          }
>  
> 



  reply	other threads:[~2021-04-07  8:44 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-31  6:47 Kunkun Jiang
2021-04-07  8:41 ` Auger Eric [this message]
2021-04-19 14:15   ` Peter Maydell

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