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Wed, 20 Oct 2021 16:50:05 -0700 (PDT) Subject: Re: [PATCH v2 00/48] tcg: optimize redundant sign extensions To: =?UTF-8?Q?Alex_Benn=c3=a9e?= References: <20211007195456.1168070-1-richard.henderson@linaro.org> <87lf2nvfip.fsf@linaro.org> From: Richard Henderson Message-ID: <50502145-2e5c-198e-680f-7bcbdd6c590b@linaro.org> Date: Wed, 20 Oct 2021 16:50:04 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <87lf2nvfip.fsf@linaro.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x531.google.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-2.267, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, Matt Borgerson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/20/21 9:13 AM, Alex Bennée wrote: > > Richard Henderson writes: > >> Currently, we have support for optimizing redundant zero extensions, >> which I think was done with x86 and aarch64 in mind, which zero-extend >> all 32-bit operations into the 64-bit register. >> >> But targets like Alpha, MIPS, and RISC-V do sign-extensions instead. >> The last 5 patches address this. >> >> But before that, split the quite massive tcg_optimize function. > > BTW this reminded me of a discussion I was having on another thread: > > Subject: Re: TCG Floating Point Support (Work in Progress) > Date: Fri, 01 Oct 2021 09:03:41 +0100 > In-reply-to: > Message-ID: <87y27d5ezt.fsf@linaro.org> > > about a test harness of TCG. With the changes over the years are we any > closer to being able to lift the TCG code into a unit test so we can add > test cases that exercise and validate the optimiser decisions? Nope. I'm not even sure true unit testing is worthwhile. It would require inventing a "tcg front end", parser, etc. I could imagine, perhaps, something in which we input real asm and look at the optimized opcode dump. E.g. for x86_64, _start: mov %eax, %ebx mov %ebx, %ecx hlt should contain only one ext32u_i64 opcode. r~