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From: Richard Henderson <richard.henderson@linaro.org>
To: "Rémi Denis-Courmont" <remi.denis.courmont@huawei.com>,
	qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH 17/19] target/arm: add ARMv8.4-SEL2 extension
Date: Wed, 13 Jan 2021 07:35:09 -1000	[thread overview]
Message-ID: <55d19894-4435-6ba0-69c1-b9078127128f@linaro.org> (raw)
In-Reply-To: <4284476.LvFx2qVVIh@basile.remlab.net>

On 1/13/21 3:12 AM, Rémi Denis-Courmont wrote:
>>     if (arm_dc_feature(s, ARM_FEATURE_AARCH64) &&
>>         dc_isar_feature(aa64_sel2, s)) {
>>         ...
>>
> 
> Hmm, yeah. Should this be an ifdef on TARGET_AARCH64 instead?

No, I don't think so.  It's not performance critical that we avoid a single bit
test.

> Also do we need to revector the exception code, or leave it mostly duplicated 
> as is?

If you see a way to tidy that, great, please.  But I don't think it's required
for this patch set.


r~


  reply	other threads:[~2021-01-13 17:47 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-12 10:44 [PATCHv5 00/19] ARMv8.4-A Secure EL2 Rémi Denis-Courmont
2021-01-12 10:44 ` [PATCH 01/19] target/arm: remove redundant tests remi.denis.courmont
2021-01-12 10:44 ` [PATCH 02/19] target/arm: add arm_is_el2_enabled() helper remi.denis.courmont
2021-01-12 10:44 ` [PATCH 03/19] target/arm: use arm_is_el2_enabled() where applicable remi.denis.courmont
2021-01-12 10:44 ` [PATCH 04/19] target/arm: use arm_hcr_el2_eff() " remi.denis.courmont
2021-01-12 10:44 ` [PATCH 05/19] target/arm: factor MDCR_EL2 common handling remi.denis.courmont
2021-01-12 10:44 ` [PATCH 06/19] target/arm: declare new AA64PFR0 bit-fields remi.denis.courmont
2021-01-12 10:44 ` [PATCH 07/19] target/arm: add 64-bit S-EL2 to EL exception table remi.denis.courmont
2021-01-12 10:45 ` [PATCH 08/19] target/arm: add MMU stage 1 for Secure EL2 remi.denis.courmont
2021-01-12 10:45 ` [PATCH 09/19] target/arm: add ARMv8.4-SEL2 system registers remi.denis.courmont
2021-01-12 10:45 ` [PATCH 10/19] target/arm: handle VMID change in secure state remi.denis.courmont
2021-01-12 10:45 ` [PATCH 11/19] target/arm: do S1_ptw_translate() before address space lookup remi.denis.courmont
2021-01-12 10:45 ` [PATCH 12/19] target/arm: translate NS bit in page-walks remi.denis.courmont
2021-01-12 10:45 ` [PATCH 13/19] target/arm: generalize 2-stage page-walk condition remi.denis.courmont
2021-01-12 10:45 ` [PATCH 14/19] target/arm: secure stage 2 translation regime remi.denis.courmont
2021-01-12 21:02   ` Richard Henderson
2021-01-12 10:45 ` [PATCH 15/19] target/arm: set HPFAR_EL2.NS on secure stage 2 faults remi.denis.courmont
2021-01-12 10:45 ` [PATCH 16/19] target/arm: revector to run-time pick target EL remi.denis.courmont
2021-01-12 21:04   ` Richard Henderson
2021-01-12 10:45 ` [PATCH 17/19] target/arm: add ARMv8.4-SEL2 extension remi.denis.courmont
2021-01-12 21:30   ` Richard Henderson
2021-01-13 13:12     ` Rémi Denis-Courmont
2021-01-13 17:35       ` Richard Henderson [this message]
2021-01-12 10:45 ` [PATCH 18/19] target/arm: enable Secure EL2 in max CPU remi.denis.courmont
2021-01-12 10:45 ` [PATCH 19/19] target/arm: refactor vae1_tlbmask() remi.denis.courmont
2021-01-19 11:13 ` [PATCHv5 00/19] ARMv8.4-A Secure EL2 Peter Maydell

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