From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49913) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aS81J-0005d9-6m for qemu-devel@nongnu.org; Sat, 06 Feb 2016 13:55:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aS81I-0006mP-99 for qemu-devel@nongnu.org; Sat, 06 Feb 2016 13:55:45 -0500 References: <1454506721-11843-1-git-send-email-peter.maydell@linaro.org> <1454506721-11843-8-git-send-email-peter.maydell@linaro.org> From: Sergey Fedorov Message-ID: <56B641A9.8020406@gmail.com> Date: Sat, 6 Feb 2016 21:55:37 +0300 MIME-Version: 1.0 In-Reply-To: <1454506721-11843-8-git-send-email-peter.maydell@linaro.org> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 7/7] target-arm: Enable EL3 for Cortex-A53 and Cortex-A57 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell , qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , qemu-arm@nongnu.org, patches@linaro.org On 03.02.2016 16:38, Peter Maydell wrote: > Enable EL3 support for our Cortex-A53 and Cortex-A57 CPU models. > We have enough implemented now to be able to run real world code > at least to some extent (I can boot ARM Trusted Firmware to the > point where it pulls in OP-TEE and then falls over because it > doesn't have a UEFI image it can chain to). > > Signed-off-by: Peter Maydell Reviewed-by: Sergey Fedorov > --- > target-arm/cpu64.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c > index cc177bb..073677b5 100644 > --- a/target-arm/cpu64.c > +++ b/target-arm/cpu64.c > @@ -109,6 +109,7 @@ static void aarch64_a57_initfn(Object *obj) > set_feature(&cpu->env, ARM_FEATURE_V8_SHA256); > set_feature(&cpu->env, ARM_FEATURE_V8_PMULL); > set_feature(&cpu->env, ARM_FEATURE_CRC); > + set_feature(&cpu->env, ARM_FEATURE_EL3); > cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A57; > cpu->midr = 0x411fd070; > cpu->revidr = 0x00000000; > @@ -161,6 +162,7 @@ static void aarch64_a53_initfn(Object *obj) > set_feature(&cpu->env, ARM_FEATURE_V8_SHA256); > set_feature(&cpu->env, ARM_FEATURE_V8_PMULL); > set_feature(&cpu->env, ARM_FEATURE_CRC); > + set_feature(&cpu->env, ARM_FEATURE_EL3); > cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A53; > cpu->midr = 0x410fd034; > cpu->revidr = 0x00000000;