From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47518) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aU9Ys-00012x-Q3 for qemu-devel@nongnu.org; Fri, 12 Feb 2016 03:58:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aU9Yr-00019s-UO for qemu-devel@nongnu.org; Fri, 12 Feb 2016 03:58:46 -0500 References: <1455217909-28317-1-git-send-email-peter.maydell@linaro.org> <1455217909-28317-4-git-send-email-peter.maydell@linaro.org> From: Sergey Fedorov Message-ID: <56BD9EBE.80802@gmail.com> Date: Fri, 12 Feb 2016 11:58:38 +0300 MIME-Version: 1.0 In-Reply-To: <1455217909-28317-4-git-send-email-peter.maydell@linaro.org> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 3/4] target-arm: Combine user-only and softmmu get/set_r13_banked() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell , qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , qemu-arm@nongnu.org, patches@linaro.org On 11.02.2016 22:11, Peter Maydell wrote: > The user-mode versions of get/set_r13_banked() exist just to assert > if they're ever called -- the translate time code should never > emit calls to them because SRS from user mode always UNDEF. > There's no code in the softmmu versions that can't compile in > CONFIG_USER_ONLY, so combine the two functions rather than > having completely split versions under ifdefs. > > Signed-off-by: Peter Maydell Reviewed-by: Sergey Fedorov > --- > target-arm/op_helper.c | 25 ++++++------------------- > 1 file changed, 6 insertions(+), 19 deletions(-) > > diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c > index 053e9b6..05f97a7 100644 > --- a/target-arm/op_helper.c > +++ b/target-arm/op_helper.c > @@ -457,26 +457,11 @@ void HELPER(set_user_reg)(CPUARMState *env, uint32_t regno, uint32_t val) > } > } > > -#if defined(CONFIG_USER_ONLY) > -void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) > -{ > - ARMCPU *cpu = arm_env_get_cpu(env); > - > - cpu_abort(CPU(cpu), "banked r13 write\n"); > -} > - > -uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) > -{ > - ARMCPU *cpu = arm_env_get_cpu(env); > - > - cpu_abort(CPU(cpu), "banked r13 read\n"); > - return 0; > -} > - > -#else > - > void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) > { > +#if defined(CONFIG_USER_ONLY) > + g_assert_not_reached(); > +#endif > if ((env->uncached_cpsr & CPSR_M) == mode) { > env->regs[13] = val; > } else { > @@ -486,13 +471,15 @@ void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) > > uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) > { > +#if defined(CONFIG_USER_ONLY) > + g_assert_not_reached(); > +#endif > if ((env->uncached_cpsr & CPSR_M) == mode) { > return env->regs[13]; > } else { > return env->banked_r13[bank_number(mode)]; > } > } > -#endif > > void HELPER(access_check_cp_reg)(CPUARMState *env, void *rip, uint32_t syndrome, > uint32_t isread)