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From: Sergey Fedorov <serge.fdrv@gmail.com>
To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	qemu-devel@nongnu.org, peter.maydell@linaro.org
Cc: edgar.iglesias@xilinx.com, qemu-arm@nongnu.org,
	alex.bennee@linaro.org, rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH v1 3/9] target-arm: Add the thumb/IL flag to syn_data_abort
Date: Tue, 16 Feb 2016 22:04:38 +0300	[thread overview]
Message-ID: <56C372C6.4080909@gmail.com> (raw)
In-Reply-To: <1455287642-28166-4-git-send-email-edgar.iglesias@gmail.com>

On 12.02.2016 17:33, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
>  target-arm/internals.h | 4 +++-
>  target-arm/op_helper.c | 6 ++++--
>  2 files changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/target-arm/internals.h b/target-arm/internals.h
> index 70bec4a..b1c483b 100644
> --- a/target-arm/internals.h
> +++ b/target-arm/internals.h
> @@ -360,9 +360,11 @@ static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc)
>  }
>  
>  static inline uint32_t syn_data_abort(int same_el, int ea, int cm, int s1ptw,
> -                                      int wnr, int fsc)
> +                                      int wnr, int fsc,
> +                                      bool is_thumb)
>  {
>      return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT)
> +        | (is_thumb ? 0 : ARM_EL_IL)
>          | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc;
>  }
>  
> diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
> index bd48549..4e629e1 100644
> --- a/target-arm/op_helper.c
> +++ b/target-arm/op_helper.c
> @@ -115,7 +115,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
>              syn = syn_insn_abort(same_el, 0, fi.s1ptw, syn);
>              exc = EXCP_PREFETCH_ABORT;
>          } else {
> -            syn = syn_data_abort(same_el, 0, 0, fi.s1ptw, is_write == 1, syn);
> +            syn = syn_data_abort(same_el, 0, 0, fi.s1ptw, is_write == 1, syn,
> +                                 env->thumb);
>              if (is_write == 1 && arm_feature(env, ARM_FEATURE_V6)) {
>                  fsr |= (1 << 11);
>              }
> @@ -161,7 +162,8 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, int is_write,
>      }
>  
>      raise_exception(env, EXCP_DATA_ABORT,
> -                    syn_data_abort(same_el, 0, 0, 0, is_write == 1, 0x21),
> +                    syn_data_abort(same_el, 0, 0, 0, is_write == 1, 0x21,
> +                                   env->thumb),
>                      target_el);
>  }
>  

ESR_ELx.IL is about instruction length. Thumb instructions can be
32-bit-long. In such case, IL should be set to 1 even if env->thumb is
set. Additionally, a data abort exception for which the value of the ISV
bit is 0, should also set IL to 1, no matter what was the instruction
length. See ARM ARMv8 A.i, section D7.2.27 ESR_ELx, Exception Syndrome
Register (ELx).

Regards,
Sergey

  reply	other threads:[~2016-02-16 19:04 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-12 14:33 [Qemu-devel] [PATCH v1 0/9] arm: Steps towards EL2 support round 6 Edgar E. Iglesias
2016-02-12 14:33 ` [Qemu-devel] [PATCH v1 1/9] tcg: Add tcg_set_insn_param Edgar E. Iglesias
2016-02-12 14:33 ` [Qemu-devel] [PATCH v1 2/9] gen-icount: Use tcg_set_insn_param Edgar E. Iglesias
2016-02-12 14:33 ` [Qemu-devel] [PATCH v1 3/9] target-arm: Add the thumb/IL flag to syn_data_abort Edgar E. Iglesias
2016-02-16 19:04   ` Sergey Fedorov [this message]
2016-02-18  9:48     ` Edgar E. Iglesias
2016-02-12 14:33 ` [Qemu-devel] [PATCH v1 4/9] target-arm: Add more fields to the data abort syndrome generator Edgar E. Iglesias
2016-02-12 14:33 ` [Qemu-devel] [PATCH v1 5/9] target-arm/translate-a64.c: Use extract32 in disas_ldst_reg_imm9 Edgar E. Iglesias
2016-02-16 21:09   ` Sergey Fedorov
2016-02-12 14:33 ` [Qemu-devel] [PATCH v1 6/9] target-arm/translate-a64.c: Unify some of the ldst_reg decoding Edgar E. Iglesias
2016-02-16 21:11   ` Sergey Fedorov
2016-02-12 14:34 ` [Qemu-devel] [PATCH v1 7/9] target-arm: Add the ARMInsnSyndrome type Edgar E. Iglesias
2016-02-16 19:11   ` Peter Maydell
2016-02-12 14:34 ` [Qemu-devel] [PATCH v1 8/9] target-arm: A64: Create Instruction Syndromes for Data Aborts Edgar E. Iglesias
2016-02-16 19:13   ` Peter Maydell
2016-02-18  9:56     ` Edgar E. Iglesias
2016-02-18 11:42       ` Peter Maydell
2016-02-19 13:12         ` Edgar E. Iglesias
2016-02-12 14:34 ` [Qemu-devel] [PATCH v1 9/9] target-arm: Use isyn.swstep.ex to hold the is_ldex state Edgar E. Iglesias

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