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From: Sergey Fedorov <serge.fdrv@gmail.com>
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Date: Wed, 17 Feb 2016 00:09:13 +0300
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Subject: Re: [Qemu-devel] [PATCH v1 5/9] target-arm/translate-a64.c: Use
 extract32 in disas_ldst_reg_imm9
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To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, qemu-devel@nongnu.org, peter.maydell@linaro.org
Cc: edgar.iglesias@xilinx.com, qemu-arm@nongnu.org, alex.bennee@linaro.org, rth@twiddle.net

On 12.02.2016 17:33, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Use extract32 instead of open coding the bit masking when decoding
> is_signed and is_extended. This streamlines the decoding with some
> of the other ldst variants.
>
> No functional change.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>

> ---
>  target-arm/translate-a64.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
> index 7f65aea..bf31f8a 100644
> --- a/target-arm/translate-a64.c
> +++ b/target-arm/translate-a64.c
> @@ -2117,8 +2117,8 @@ static void disas_ldst_reg_imm9(DisasContext *s, uint32_t insn)
>              return;
>          }
>          is_store = (opc == 0);
> -        is_signed = opc & (1<<1);
> -        is_extended = (size < 3) && (opc & 1);
> +        is_signed = extract32(opc, 1, 1);
> +        is_extended = (size < 3) && extract32(opc, 0, 1);
>      }
>  
>      switch (idx) {