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From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Michael Rolnik <mrolnik@gmail.com>, qemu-devel@nongnu.org
Cc: thuth@redhat.com, Joaquin de Andres <me@xcancerberox.com.ar>,
	richard.henderson@linaro.org, dovgaluk@ispras.ru,
	imammedo@redhat.com, aleksandar.m.mail@gmail.com
Subject: Re: [PATCH v35 12/13] target/avr: Register AVR support with the rest of QEMU, the build system, and the WMAINTAINERS file
Date: Fri, 22 Nov 2019 13:04:11 +0100	[thread overview]
Message-ID: <5ac353f3-6981-1404-15b0-bbc26dfe021d@redhat.com> (raw)
In-Reply-To: <20191029212430.20617-13-mrolnik@gmail.com>

On 10/29/19 10:24 PM, Michael Rolnik wrote:
> Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
> ---
>   MAINTAINERS                     |  9 +++++++++
>   arch_init.c                     |  2 ++
>   configure                       |  7 +++++++
>   default-configs/avr-softmmu.mak |  5 +++++
>   include/disas/dis-asm.h         |  6 ++++++
>   include/sysemu/arch_init.h      |  1 +
>   qapi/machine.json               |  3 ++-
>   target/avr/Makefile.objs        | 33 +++++++++++++++++++++++++++++++++
>   tests/machine-none-test.c       |  1 +
>   9 files changed, 66 insertions(+), 1 deletion(-)
>   create mode 100644 default-configs/avr-softmmu.mak
>   create mode 100644 target/avr/Makefile.objs
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 5b27888533..01f951356f 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -163,6 +163,15 @@ S: Maintained
>   F: hw/arm/smmu*
>   F: include/hw/arm/smmu*
>   
> +AVR TCG CPUs
> +M: Michael Rolnik <mrolnik@gmail.com>
> +S: Maintained
> +F: target/avr/
> +F: hw/misc/avr_mask.c
> +F: hw/char/avr_usart.c
> +F: hw/timer/avr_timer16.c
> +F: hw/avr/
> +
>   CRIS TCG CPUs
>   M: Edgar E. Iglesias <edgar.iglesias@gmail.com>
>   S: Maintained
> diff --git a/arch_init.c b/arch_init.c
> index 705d0b94ad..6a741165b2 100644
> --- a/arch_init.c
> +++ b/arch_init.c
> @@ -89,6 +89,8 @@ int graphic_depth = 32;
>   #define QEMU_ARCH QEMU_ARCH_UNICORE32
>   #elif defined(TARGET_XTENSA)
>   #define QEMU_ARCH QEMU_ARCH_XTENSA
> +#elif defined(TARGET_AVR)
> +#define QEMU_ARCH QEMU_ARCH_AVR
>   #endif
>   
>   const uint32_t arch_type = QEMU_ARCH;
> diff --git a/configure b/configure
> index 3be9e92a24..e5dec62fde 100755
> --- a/configure
> +++ b/configure
> @@ -7516,6 +7516,10 @@ case "$target_name" in
>       mttcg="yes"
>       gdb_xml_files="aarch64-core.xml aarch64-fpu.xml arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml"
>     ;;
> +  avr)
> +    gdb_xml_files="avr-cpu.xml"
> +    target_compiler=$cross_cc_avr
> +  ;;
>     cris)
>     ;;
>     hppa)
> @@ -7735,6 +7739,9 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
>         disas_config "ARM_A64"
>       fi
>     ;;
> +  avr)
> +    disas_config "AVR"
> +  ;;
>     cris)
>       disas_config "CRIS"
>     ;;
> diff --git a/default-configs/avr-softmmu.mak b/default-configs/avr-softmmu.mak
> new file mode 100644
> index 0000000000..d1e1c28118
> --- /dev/null
> +++ b/default-configs/avr-softmmu.mak
> @@ -0,0 +1,5 @@
> +# Default configuration for avr-softmmu
> +
> +# Boards:
> +#
> +CONFIG_AVR_SAMPLE=y
> diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h
> index e9c7dd8eb4..8bedce17ac 100644
> --- a/include/disas/dis-asm.h
> +++ b/include/disas/dis-asm.h
> @@ -211,6 +211,12 @@ enum bfd_architecture
>   #define bfd_mach_m32r          0  /* backwards compatibility */
>     bfd_arch_mn10200,    /* Matsushita MN10200 */
>     bfd_arch_mn10300,    /* Matsushita MN10300 */
> +  bfd_arch_avr,       /* Atmel AVR microcontrollers.  */
> +#define bfd_mach_avr1          1
> +#define bfd_mach_avr2          2
> +#define bfd_mach_avr3          3
> +#define bfd_mach_avr4          4
> +#define bfd_mach_avr5          5
>     bfd_arch_cris,       /* Axis CRIS */
>   #define bfd_mach_cris_v0_v10   255
>   #define bfd_mach_cris_v32      32
> diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h
> index 62c6fe4cf1..893df26ce2 100644
> --- a/include/sysemu/arch_init.h
> +++ b/include/sysemu/arch_init.h
> @@ -24,6 +24,7 @@ enum {
>       QEMU_ARCH_NIOS2 = (1 << 17),
>       QEMU_ARCH_HPPA = (1 << 18),
>       QEMU_ARCH_RISCV = (1 << 19),
> +    QEMU_ARCH_AVR = (1 << 20),
>   };
>   
>   extern const uint32_t arch_type;
> diff --git a/qapi/machine.json b/qapi/machine.json
> index ca26779f1a..1fa2917ba9 100644
> --- a/qapi/machine.json
> +++ b/qapi/machine.json
> @@ -21,11 +21,12 @@
>   #        is true even for "qemu-system-x86_64".
>   #
>   # ppcemb: dropped in 3.1
> +# avr: since 4.2
>   #
>   # Since: 3.0
>   ##
>   { 'enum' : 'SysEmuTarget',
> -  'data' : [ 'aarch64', 'alpha', 'arm', 'cris', 'hppa', 'i386', 'lm32',
> +  'data' : [ 'aarch64', 'alpha', 'arm', 'avr', 'cris', 'hppa', 'i386', 'lm32',
>                'm68k', 'microblaze', 'microblazeel', 'mips', 'mips64',
>                'mips64el', 'mipsel', 'moxie', 'nios2', 'or1k', 'ppc',
>                'ppc64', 'riscv32', 'riscv64', 's390x', 'sh4',
> diff --git a/target/avr/Makefile.objs b/target/avr/Makefile.objs
> new file mode 100644
> index 0000000000..2976affd95
> --- /dev/null
> +++ b/target/avr/Makefile.objs
> @@ -0,0 +1,33 @@
> +#
> +#  QEMU AVR CPU
> +#
> +#  Copyright (c) 2019 Michael Rolnik
> +#
> +#  This library is free software; you can redistribute it and/or
> +#  modify it under the terms of the GNU Lesser General Public
> +#  License as published by the Free Software Foundation; either
> +#  version 2.1 of the License, or (at your option) any later version.
> +#
> +#  This library is distributed in the hope that it will be useful,
> +#  but WITHOUT ANY WARRANTY; without even the implied warranty of
> +#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> +#  Lesser General Public License for more details.
> +#
> +#  You should have received a copy of the GNU Lesser General Public
> +#  License along with this library; if not, see
> +#  <http://www.gnu.org/licenses/lgpl-2.1.html>
> +#
> +
> +DECODETREE = $(SRC_PATH)/scripts/decodetree.py
> +decode-y = $(SRC_PATH)/target/avr/insn.decode
> +
> +target/avr/decode_insn.inc.c: $(decode-y) $(DECODETREE)
> +	$(call quiet-command, \
> +	  $(PYTHON) $(DECODETREE) -o $@ --decode decode_insn --insnwidth 16 $<, \
> +	  "GEN", $(TARGET_DIR)$@)
> +
> +target/avr/translate.o: target/avr/decode_insn.inc.c
> +
> +obj-y += translate.o cpu.o helper.o
> +obj-y += gdbstub.o
> +obj-$(CONFIG_SOFTMMU) += machine.o
> diff --git a/tests/machine-none-test.c b/tests/machine-none-test.c
> index 5953d31755..3e5c74e73e 100644
> --- a/tests/machine-none-test.c
> +++ b/tests/machine-none-test.c
> @@ -27,6 +27,7 @@ static struct arch2cpu cpus_map[] = {
>       /* tested targets list */
>       { "arm", "cortex-a15" },
>       { "aarch64", "cortex-a57" },
> +    { "avr", "avr6-avr-cpu" },
>       { "x86_64", "qemu64,apic-id=0" },
>       { "i386", "qemu32,apic-id=0" },
>       { "alpha", "ev67" },
> 

Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>



  reply	other threads:[~2019-11-22 12:06 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-29 21:24 [PATCH v35 00/13] QEMU AVR 8 bit cores Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 01/13] target/avr: Add outward facing interfaces and core CPU logic Michael Rolnik
2019-11-21 18:55   ` Philippe Mathieu-Daudé
2019-11-21 19:44     ` Michael Rolnik
2019-11-21 19:53       ` Michael Rolnik
2019-11-22  7:46         ` Richard Henderson
2019-11-22  8:43           ` Aleksandar Markovic
2019-11-22 10:46             ` Philippe Mathieu-Daudé
2019-11-22 10:54               ` Michael Rolnik
2019-11-22 11:12                 ` Philippe Mathieu-Daudé
2019-11-21 20:55     ` Aleksandar Markovic
2019-11-22  5:33       ` Pavel Dovgalyuk
2019-11-22  7:47         ` Richard Henderson
2019-11-22 10:40       ` Philippe Mathieu-Daudé
2019-11-22 11:04         ` Aleksandar Markovic
2019-11-22 16:58   ` Aleksandar Markovic
2019-11-22 17:11   ` Aleksandar Markovic
2019-11-23 22:42     ` Michael Rolnik
2019-11-30 16:22       ` Aleksandar Markovic
2019-11-30 17:03         ` Michael Rolnik
2019-12-01  0:50           ` Aleksandar Markovic
2019-11-22 17:28   ` Aleksandar Markovic
2019-11-23 15:58     ` Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 02/13] target/avr: Add instruction helpers Michael Rolnik
2019-11-22 11:46   ` Philippe Mathieu-Daudé
2019-10-29 21:24 ` [PATCH v35 03/13] target/avr: Add instruction decoding Michael Rolnik
2019-11-22 11:46   ` Philippe Mathieu-Daudé
2019-10-29 21:24 ` [PATCH v35 04/13] target/avr: Add instruction translation - Registers definition Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 05/13] target/avr: Add instruction translation - Arithmetic and Logic Instructions Michael Rolnik
2019-11-05  8:39   ` Aleksandar Markovic
2019-11-05  9:46     ` Aleksandar Markovic
2019-11-05 13:23       ` Richard Henderson
2019-11-05 14:37         ` Aleksandar Markovic
2019-11-19 20:09           ` Michael Rolnik
2019-11-19 21:18             ` Aleksandar Markovic
2019-11-19 21:19               ` Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 06/13] target/avr: Add instruction translation - Branch Instructions Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 07/13] target/avr: Add instruction translation - Bit and Bit-test Instructions Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 08/13] target/avr: Add instruction translation - MCU Control Instructions Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 09/13] target/avr: Add instruction translation - CPU main translation function Michael Rolnik
2019-11-22 11:48   ` Philippe Mathieu-Daudé
2019-10-29 21:24 ` [PATCH v35 10/13] target/avr: Add limited support for USART and 16 bit timer peripherals Michael Rolnik
2019-11-22 12:02   ` Philippe Mathieu-Daudé
2019-11-22 14:41   ` Aleksandar Markovic
2019-11-22 15:41     ` Philippe Mathieu-Daudé
2019-11-25 15:07     ` Sarah Harris
2019-11-25 18:22       ` Aleksandar Markovic
2019-11-22 15:10   ` Aleksandar Markovic
2019-11-25 15:57     ` Sarah Harris
2019-11-25 18:57       ` Aleksandar Markovic
2019-11-28  9:31         ` Sarah Harris
2019-11-28 10:55           ` Aleksandar Markovic
2019-11-28 11:02             ` Aleksandar Markovic
2019-11-29  9:23               ` Sarah Harris
2019-11-22 16:48   ` Aleksandar Markovic
2019-11-23 15:37     ` Michael Rolnik
2019-11-25 15:56     ` Sarah Harris
2019-11-25 18:34       ` Aleksandar Markovic
2019-12-05 18:45   ` Aleksandar Markovic
2019-12-05 19:46     ` Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 11/13] target/avr: Add example board configuration Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 12/13] target/avr: Register AVR support with the rest of QEMU, the build system, and the WMAINTAINERS file Michael Rolnik
2019-11-22 12:04   ` Philippe Mathieu-Daudé [this message]
2019-11-22 13:55   ` Eric Blake
2019-11-24  1:14   ` Aleksandar Markovic
2019-10-29 21:24 ` [PATCH v35 13/13] target/avr: Add tests Michael Rolnik
2019-11-24  0:37   ` Aleksandar Markovic
2019-10-29 21:43 ` [PATCH v35 00/13] QEMU AVR 8 bit cores Aleksandar Markovic
2019-10-29 21:58   ` Michael Rolnik
2019-11-18 17:13 ` Philippe Mathieu-Daudé
2019-11-22 17:40 ` Aleksandar Markovic

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