From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD9FDC433E0 for ; Tue, 9 Jun 2020 17:54:16 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8361B20774 for ; Tue, 9 Jun 2020 17:54:16 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8361B20774 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bugs.launchpad.net Authentication-Results: mail.kernel.org; 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Tue, 9 Jun 2020 17:50:42 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Date: Tue, 09 Jun 2020 17:44:09 -0000 From: Laurent Vivier <1874073@bugs.launchpad.net> To: qemu-devel@nongnu.org X-Launchpad-Notification-Type: bug X-Launchpad-Bug: product=qemu; status=Confirmed; importance=Undecided; assignee=philmd@redhat.com; X-Launchpad-Bug-Information-Type: Public X-Launchpad-Bug-Private: no X-Launchpad-Bug-Security-Vulnerability: no X-Launchpad-Bug-Commenters: eblake laurent-vivier mliska philmd pmaydell X-Launchpad-Bug-Reporter: Martin Liska (mliska) X-Launchpad-Bug-Modifier: Laurent Vivier (laurent-vivier) References: <158747496330.1952.6391008472811579405.malonedeb@chaenomeles.canonical.com> <20200608160611.16966-1-philmd@redhat.com> Message-Id: <667551f6-96fb-19a3-828c-c8d0e1c41fb9@vivier.eu> Subject: [Bug 1874073] Re: [PATCH v2] hw/openrisc/openrisc_sim: Add assertion to silence GCC warning X-Launchpad-Message-Rationale: Subscriber (QEMU) @qemu-devel-ml X-Launchpad-Message-For: qemu-devel-ml Precedence: bulk X-Generated-By: Launchpad (canonical.com); Revision="ef9fc486e875d54078fa61cf91e898b895125d89"; Instance="production-secrets-lazr.conf" X-Launchpad-Hash: 5c07896bee7c7960c41382de896f436806a71476 Received-SPF: none client-ip=91.189.90.7; envelope-from=bounces@canonical.com; helo=indium.canonical.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 10:15:37 X-ACL-Warn: Detected OS = Linux 3.11 and newer [fuzzy] X-Spam_score_int: -65 X-Spam_score: -6.6 X-Spam_bar: ------ X-Spam_report: (-6.6 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Bug 1874073 <1874073@bugs.launchpad.net> Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Le 08/06/2020 =C3=A0 18:06, Philippe Mathieu-Daud=C3=A9 a =C3=A9crit=C2=A0: > When compiling with GCC 10 (Fedora 32) using CFLAGS=3D-O2 we get: > = > CC or1k-softmmu/hw/openrisc/openrisc_sim.o > hw/openrisc/openrisc_sim.c: In function =E2=80=98openrisc_sim_init=E2= =80=99: > hw/openrisc/openrisc_sim.c:87:42: error: =E2=80=98cpu_irqs[0]=E2=80=99 = may be used uninitialized in this function [-Werror=3Dmaybe-uninitialized] > 87 | sysbus_connect_irq(s, i, cpu_irqs[i][irq_pin]); > | ~~~~~~~~^~~ > = > While humans can tell smp_cpus will always be in the [1, 2] range, > (openrisc_sim_machine_init sets mc->max_cpus =3D 2), the compiler > can't. > = > Add an assertion to give the compiler a hint there's no use of > uninitialized data. > = > Buglink: https://bugs.launchpad.net/qemu/+bug/1874073 > Reported-by: Martin Li=C5=A1ka > Suggested-by: Peter Maydell > Reviewed-by: Thomas Huth > Tested-by: Eric Blake > Reviewed-by: Eric Blake > Signed-off-by: Philippe Mathieu-Daud=C3=A9 > --- > v2: Fixed typo in subject (eblake) > Supersedes: <20200608071409.17024-1-philmd@redhat.com> > --- > hw/openrisc/openrisc_sim.c | 1 + > 1 file changed, 1 insertion(+) > = > diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c > index d08ce61811..02f5259e5e 100644 > --- a/hw/openrisc/openrisc_sim.c > +++ b/hw/openrisc/openrisc_sim.c > @@ -134,6 +134,7 @@ static void openrisc_sim_init(MachineState *machine) > int n; > unsigned int smp_cpus =3D machine->smp.cpus; > = > + assert(smp_cpus >=3D 1 && smp_cpus <=3D 2); > for (n =3D 0; n < smp_cpus; n++) { > cpu =3D OPENRISC_CPU(cpu_create(machine->cpu_type)); > if (cpu =3D=3D NULL) { > = Applied to my trivial-patches branch. Thanks, Laurent -- = You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1874073 Title: openrisc_sim.c:87:42: error: 'cpu_irqs[0]' may be used uninitialized in this function [-Werror=3Dmaybe-uninitialized] Status in QEMU: Confirmed Bug description: I see the warning since gcc10: static void openrisc_sim_init(MachineState *machine): ... qemu_irq *cpu_irqs[2]; ... = serial_mm_init(get_system_memory(), 0x90000000, 0, serial_irq, 115200, serial_hd(0), DEVICE_NATIVE_ENDIAN); I would initialize cpu_irqs[2] with {}. To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1874073/+subscriptions From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36FA4C433E0 for ; Tue, 9 Jun 2020 18:01:14 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0F358206D5 for ; Tue, 9 Jun 2020 18:01:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0F358206D5 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=vivier.eu Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:49004 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jiiYj-0000uf-B4 for qemu-devel@archiver.kernel.org; Tue, 09 Jun 2020 14:01:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56316) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jiiIN-0004Cu-UR; Tue, 09 Jun 2020 13:44:19 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:60693) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jiiIM-000676-JG; Tue, 09 Jun 2020 13:44:19 -0400 Received: from [192.168.100.1] ([82.252.135.106]) by mrelayeu.kundenserver.de (mreue012 [213.165.67.103]) with ESMTPSA (Nemesis) id 1MS1G7-1jWqQq2Qfb-00TTkD; Tue, 09 Jun 2020 19:44:11 +0200 Subject: Re: [PATCH v2] hw/openrisc/openrisc_sim: Add assertion to silence GCC warning To: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , qemu-devel@nongnu.org, =?UTF-8?Q?Martin_Li=c5=a1ka?= , Eric Blake References: <20200608160611.16966-1-philmd@redhat.com> From: Laurent Vivier Autocrypt: addr=laurent@vivier.eu; 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envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 12:55:24 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , Jia Liu , qemu-trivial@nongnu.org, Markus Armbruster , 1874073@bugs.launchpad.net, Christophe de Dinechin , Stafford Horne Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Message-ID: <20200609174409.0L6vY2eiednYvdvl9BDsf3o7lDS1jurHH5TYJlFSdUY@z> Le 08/06/2020 à 18:06, Philippe Mathieu-Daudé a écrit : > When compiling with GCC 10 (Fedora 32) using CFLAGS=-O2 we get: > > CC or1k-softmmu/hw/openrisc/openrisc_sim.o > hw/openrisc/openrisc_sim.c: In function ‘openrisc_sim_init’: > hw/openrisc/openrisc_sim.c:87:42: error: ‘cpu_irqs[0]’ may be used uninitialized in this function [-Werror=maybe-uninitialized] > 87 | sysbus_connect_irq(s, i, cpu_irqs[i][irq_pin]); > | ~~~~~~~~^~~ > > While humans can tell smp_cpus will always be in the [1, 2] range, > (openrisc_sim_machine_init sets mc->max_cpus = 2), the compiler > can't. > > Add an assertion to give the compiler a hint there's no use of > uninitialized data. > > Buglink: https://bugs.launchpad.net/qemu/+bug/1874073 > Reported-by: Martin Liška > Suggested-by: Peter Maydell > Reviewed-by: Thomas Huth > Tested-by: Eric Blake > Reviewed-by: Eric Blake > Signed-off-by: Philippe Mathieu-Daudé > --- > v2: Fixed typo in subject (eblake) > Supersedes: <20200608071409.17024-1-philmd@redhat.com> > --- > hw/openrisc/openrisc_sim.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c > index d08ce61811..02f5259e5e 100644 > --- a/hw/openrisc/openrisc_sim.c > +++ b/hw/openrisc/openrisc_sim.c > @@ -134,6 +134,7 @@ static void openrisc_sim_init(MachineState *machine) > int n; > unsigned int smp_cpus = machine->smp.cpus; > > + assert(smp_cpus >= 1 && smp_cpus <= 2); > for (n = 0; n < smp_cpus; n++) { > cpu = OPENRISC_CPU(cpu_create(machine->cpu_type)); > if (cpu == NULL) { > Applied to my trivial-patches branch. Thanks, Laurent