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([2602:ae:1544:6601:6705:aa17:3641:e634]) by smtp.gmail.com with ESMTPSA id x16-20020aa784d0000000b006280676b8b4sm13962932pfn.220.2023.03.27.09.29.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 27 Mar 2023 09:29:13 -0700 (PDT) Message-ID: <6b21f385-96fd-78f4-bdba-ed552bf2464a@linaro.org> Date: Mon, 27 Mar 2023 09:29:11 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH v6 13/25] target/riscv: Introduce mmuidx_priv Content-Language: en-US To: LIU Zhiwei , qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, palmer@dabbelt.com, fei2.wu@intel.com References: <20230325105429.1142530-1-richard.henderson@linaro.org> <20230325105429.1142530-14-richard.henderson@linaro.org> From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 3/26/23 19:07, LIU Zhiwei wrote: >> +static inline int mmuidx_priv(int mmu_idx) >> +{ >> +    int ret = mmu_idx & 3; >> +    if (ret == MMUIdx_S_SUM) { >> +        ret = PRV_S; >> +    } >> +    return ret; >> +} >> + > > Can we remove the PRIV from the tb flags after we have this function? No, because this is the priv of the memory operation as modified by e.g. MPRV, not the true cpu priv. r~