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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id m14sm8880130edd.63.2021.03.09.06.18.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 09 Mar 2021 06:18:25 -0800 (PST) Subject: Re: [PATCH v2 1/3] target/arm: Restrict v8M IDAU to TCG To: Claudio Fontana , qemu-devel@nongnu.org References: <20210221222617.2579610-1-f4bug@amsat.org> <20210221222617.2579610-2-f4bug@amsat.org> <51ae2fad-f20e-27f2-2f7b-b7dca331dea3@suse.de> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <75ce7727-caec-fd63-b2e6-9344e22cfa75@amsat.org> Date: Tue, 9 Mar 2021 15:18:24 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 MIME-Version: 1.0 In-Reply-To: <51ae2fad-f20e-27f2-2f7b-b7dca331dea3@suse.de> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-x62d.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 3/9/21 2:41 PM, Claudio Fontana wrote: > On 2/21/21 11:26 PM, Philippe Mathieu-Daudé wrote: >> IDAU is specific to M-profile. KVM only supports A-profile. >> Restrict this interface to TCG, as it is pointless (and >> confusing) on a KVM-only build. >> >> Reviewed-by: Richard Henderson >> Reviewed-by: Peter Maydell >> Signed-off-by: Philippe Mathieu-Daudé > > > This one breaks the KVM tests hard though (most of them). > > I will try to figure out why. > > Ciao, > > Claudio > > >> --- >> target/arm/cpu.c | 7 ------- >> target/arm/cpu_tcg.c | 8 ++++++++ >> 2 files changed, 8 insertions(+), 7 deletions(-) >> >> diff --git a/target/arm/cpu.c b/target/arm/cpu.c >> index b8bc89e71fc..a772fd4926f 100644 >> --- a/target/arm/cpu.c >> +++ b/target/arm/cpu.c >> @@ -2380,12 +2380,6 @@ static const TypeInfo arm_cpu_type_info = { >> .class_init = arm_cpu_class_init, >> }; >> >> -static const TypeInfo idau_interface_type_info = { >> - .name = TYPE_IDAU_INTERFACE, >> - .parent = TYPE_INTERFACE, Hmm this is an interface... Is a CPU/machine trying to resolve it? >> - .class_size = sizeof(IDAUInterfaceClass), >> -}; >> - >> static void arm_cpu_register_types(void) >> { >> const size_t cpu_count = ARRAY_SIZE(arm_cpus); >> @@ -2399,7 +2393,6 @@ static void arm_cpu_register_types(void) >> if (cpu_count) { >> size_t i; >> >> - type_register_static(&idau_interface_type_info); >> for (i = 0; i < cpu_count; ++i) { >> arm_cpu_register(&arm_cpus[i]); >> } >> diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c >> index c29b434c60d..fb07a336939 100644 >> --- a/target/arm/cpu_tcg.c >> +++ b/target/arm/cpu_tcg.c >> @@ -14,6 +14,7 @@ >> #include "hw/core/tcg-cpu-ops.h" >> #endif /* CONFIG_TCG */ >> #include "internals.h" >> +#include "target/arm/idau.h" >> >> /* CPU models. These are not needed for the AArch64 linux-user build. */ >> #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) >> @@ -739,10 +740,17 @@ static const ARMCPUInfo arm_tcg_cpus[] = { >> { .name = "pxa270-c5", .initfn = pxa270c5_initfn }, >> }; >> >> +static const TypeInfo idau_interface_type_info = { >> + .name = TYPE_IDAU_INTERFACE, >> + .parent = TYPE_INTERFACE, >> + .class_size = sizeof(IDAUInterfaceClass), >> +}; >> + >> static void arm_tcg_cpu_register_types(void) >> { >> size_t i; >> >> + type_register_static(&idau_interface_type_info); >> for (i = 0; i < ARRAY_SIZE(arm_tcg_cpus); ++i) { >> arm_cpu_register(&arm_tcg_cpus[i]); >> } >> > >