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[83.52.54.37]) by smtp.gmail.com with ESMTPSA id k3sm3399405wro.39.2020.03.23.08.55.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 Mar 2020 08:55:36 -0700 (PDT) Subject: Re: [PATCH v41 01/21] target/avr: Add outward facing interfaces and core CPU logic To: Michael Rolnik , qemu-devel@nongnu.org References: <20200118191416.19934-1-mrolnik@gmail.com> <20200118191416.19934-2-mrolnik@gmail.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <80141c57-7fb7-6e95-4070-54f7cc23e166@redhat.com> Date: Mon, 23 Mar 2020 16:55:34 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <20200118191416.19934-2-mrolnik@gmail.com> Content-Language: en-US X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 216.205.24.74 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, me@xcancerberox.com.ar, richard.henderson@linaro.org, Sarah Harris , dovgaluk@ispras.ru, imammedo@redhat.com, aleksandar.m.mail@gmail.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi Michael, On 1/18/20 8:13 PM, Michael Rolnik wrote: > This includes: > - CPU data structures > - object model classes and functions > - migration functions > - GDB hooks >=20 > Co-developed-by: Michael Rolnik > Co-developed-by: Sarah Harris > Signed-off-by: Michael Rolnik > Signed-off-by: Sarah Harris > Signed-off-by: Michael Rolnik > Acked-by: Igor Mammedov > Tested-by: Philippe Mathieu-Daud=C3=A9 > --- > target/avr/cpu-param.h | 37 ++ > target/avr/cpu-qom.h | 54 +++ > target/avr/cpu.h | 258 +++++++++++++ > target/avr/cpu.c | 826 +++++++++++++++++++++++++++++++++++++++++ > target/avr/gdbstub.c | 84 +++++ > target/avr/machine.c | 121 ++++++ > gdb-xml/avr-cpu.xml | 49 +++ > 7 files changed, 1429 insertions(+) > create mode 100644 target/avr/cpu-param.h > create mode 100644 target/avr/cpu-qom.h > create mode 100644 target/avr/cpu.h > create mode 100644 target/avr/cpu.c > create mode 100644 target/avr/gdbstub.c > create mode 100644 target/avr/machine.c > create mode 100644 gdb-xml/avr-cpu.xml >=20 [...]> diff --git a/target/avr/cpu.c b/target/avr/cpu.c > new file mode 100644 > index 0000000000..c74c5106fe > --- /dev/null > +++ b/target/avr/cpu.c > @@ -0,0 +1,826 @@ > +/* > + * QEMU AVR CPU > + * > + * Copyright (c) 2019 Michael Rolnik > + * > + * This library is free software; you can redistribute it and/or > + * modify it under the terms of the GNU Lesser General Public > + * License as published by the Free Software Foundation; either > + * version 2.1 of the License, or (at your option) any later version. > + * > + * This library is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > + * Lesser General Public License for more details. > + * > + * You should have received a copy of the GNU Lesser General Public > + * License along with this library; if not, see > + * > + */ > + > +#include "qemu/osdep.h" > +#include "qapi/error.h" > +#include "qemu/qemu-print.h" > +#include "exec/exec-all.h" > +#include "cpu.h" > +#include "disas/dis-asm.h" > + > +static void avr_cpu_set_pc(CPUState *cs, vaddr value) > +{ > + AVRCPU *cpu =3D AVR_CPU(cs); > + > + cpu->env.pc_w =3D value / 2; /* internally PC points to words */ > +} > + > +static bool avr_cpu_has_work(CPUState *cs) > +{ > + AVRCPU *cpu =3D AVR_CPU(cs); > + CPUAVRState *env =3D &cpu->env; > + > + return (cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_= RESET)) > + && cpu_interrupts_enabled(env); > +} > + > +static void avr_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *= tb) > +{ > + AVRCPU *cpu =3D AVR_CPU(cs); > + CPUAVRState *env =3D &cpu->env; > + > + env->pc_w =3D tb->pc / 2; /* internally PC points to words */ > +} > + > +static void avr_cpu_reset(CPUState *cs) > +{ > + AVRCPU *cpu =3D AVR_CPU(cs); > + AVRCPUClass *mcc =3D AVR_CPU_GET_CLASS(cpu); > + CPUAVRState *env =3D &cpu->env; > + > + mcc->parent_reset(cs); > + > + env->pc_w =3D 0; > + env->sregI =3D 1; > + env->sregC =3D 0; > + env->sregZ =3D 0; > + env->sregN =3D 0; > + env->sregV =3D 0; > + env->sregS =3D 0; > + env->sregH =3D 0; > + env->sregT =3D 0; > + > + env->rampD =3D 0; > + env->rampX =3D 0; > + env->rampY =3D 0; > + env->rampZ =3D 0; > + env->eind =3D 0; > + env->sp =3D 0; > + > + env->skip =3D 0; > + > + memset(env->r, 0, sizeof(env->r)); > + > + tlb_flush(cs); Why are you calling tlb_flush() here? > +}