* [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability
@ 2019-09-26 17:34 Philippe Mathieu-Daudé
2019-09-26 17:34 ` [PATCH 01/19] hw/arm/raspi: Use the IEC binary prefix definitions Philippe Mathieu-Daudé
` (21 more replies)
0 siblings, 22 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Hi,
I previously posted a RFC for the Raspberry Pi 4:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg642241.html
and got it almost working (boots Linux kernel to userland, sadly
I'm still having timeout issues with the eMMC block).
However since it is quite usable, I started to clean up to post
the series and realized it is way too big for Peter Maydell, so
I'm following his rule of thumb by splitting in 3 sets of ~20
functional patches.
In this first series, we pay old debts with these models. Linux
evolved and recent kernels were barely usable. U-boot now ticks,
Linux stops to Oops every so and then. We can use more than one
console at a time (think pppd?).
Then we add various tests to confirm our effort made sense, and
to avoid regressions.
Laurent, Cheng, do you mind testing on U-Boot?
In the next part we'll improve/update the MBox/Properties and the
interrupt controller blocks.
Finally the last part adds the raspi4.
Please review.
Regards,
Phil.
---
The tests added are already enabled on our Travis-CI.
It takes me <2min to run all the tests:
$ make aarch64-softmmu/all check-venv
$ ./tests/venv/bin/avocado --show=app,console run -t machine:raspi2 -t machine:raspi3 tests/acceptance
JOB ID : 10bf6593659f0b191941265c19fe3dbf1652c3e7
JOB LOG : /home/phil/avocado/job-results/job-2019-09-26T19.04-10bf659/job.log
(1/4) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_raspi2_uart0: \console: [ 0.000000] Booting Linux on physical CPU 0xf00
console: [ 0.000000] Linux version 4.14.98-v7+ (dom@dom-XPS-13-9370) (gcc version 4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1200 SMP Tue Feb 12 20:27:48 GMT 2019
console: [ 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d
console: [ 0.000000] CPU: div instructions available: patching division code
console: [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
console: [ 0.000000] OF: fdt: Machine model: Raspberry Pi 2 Model B
console: [ 0.000000] earlycon: pl11 at MMIO 0x3f201000 (options '')
console: [ 0.000000] bootconsole [pl11] enabled
console: [ 0.000000] Memory policy: Data cache writealloc
console: [ 0.000000] cma: Reserved 8 MiB at 0x3b800000
console: [ 0.000000] percpu: Embedded 17 pages/cpu @baf2e000 s38720 r8192 d22720 u69632
console: [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 243600
console: [ 0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x3f201000 console=ttyAMA0
PASS (6.74 s)
(2/4) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_raspi2_uart1: -console: [ 0.000000] Booting Linux on physical CPU 0xf00
console: [ 0.000000] Linux version 4.14.98-v7+ (dom@dom-XPS-13-9370) (gcc version 4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1200 SMP Tue Feb 12 20:27:48 GMT 2019
console: [ 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d
console: [ 0.000000] CPU: div instructions available: patching division code
console: [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
console: [ 0.000000] OF: fdt: Machine model: Raspberry Pi 2 Model B
console: [ 0.000000] earlycon: uart8250 at MMIO32 0x3f215040 (options '')
console: [ 0.000000] bootconsole [uart8250] enabled
console: [ 0.000000] Memory policy: Data cache writealloc
console: [ 0.000000] cma: Reserved 8 MiB at 0x3b800000
console: [ 0.000000] percpu: Embedded 17 pages/cpu @baf2e000 s38720 r8192 d22720 u69632
console: [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 243600
console: [ 0.000000] Kernel command line: printk.time=0 earlycon=uart8250,mmio32,0x3f215040 console=ttyS1,115200
PASS (6.69 s)
(3/4) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_raspi3_initrd_uart0: -console: [ 0.000000] Booting Linux on physical CPU 0x0
console: [ 0.000000] Linux version 4.14.0-3-arm64 (debian-kernel@lists.debian.org) (gcc version 7.2.0 (Debian 7.2.0-18)) #1 SMP Debian 4.14.12-2 (2018-01-06)
console: [ 0.000000] Boot CPU: AArch64 Processor [410fd034]
console: [ 0.000000] Machine model: Raspberry Pi 3 Model B
console: [ 0.000000] earlycon: pl11 at MMIO 0x000000003f201000 (options '')
console: [ 0.000000] bootconsole [pl11] enabled
console: [ 0.000000] efi: Getting EFI parameters from FDT:
console: [ 0.000000] efi: UEFI not found.
console: [ 0.000000] cma: Reserved 64 MiB at 0x0000000038000000
console: [ 0.000000] NUMA: No NUMA configuration found
console: [ 0.000000] NUMA: Faking a node at [mem 0x0000000000000000-0x000000003bffffff]
console: [ 0.000000] NUMA: NODE_DATA [mem 0x37fdc380-0x37fdde7f]
console: [ 0.000000] Zone ranges:
console: [ 0.000000] DMA [mem 0x0000000000000000-0x000000003bffffff]
console: [ 0.000000] Normal empty
console: [ 0.000000] Movable zone start for each node
console: [ 0.000000] Early memory node ranges
console: [ 0.000000] node 0: [mem 0x0000000000000000-0x000000003bffffff]
console: [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x000000003bffffff]
\console: [ 0.000000] /cpus/cpu@1: missing enable-method property
console: [ 0.000000] /cpus/cpu@2: missing enable-method property
console: [ 0.000000] /cpus/cpu@3: missing enable-method property
console: [ 0.000000] random: fast init done
console: [ 0.000000] percpu: Embedded 22 pages/cpu @ffff800037fb3000 s51608 r8192 d30312 u90112
console: [ 0.000000] Detected VIPT I-cache on CPU0
console: [ 0.000000] CPU features: enabling workaround for ARM erratum 845719
console: [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 241920
console: [ 0.000000] Policy zone: DMA
console: [ 0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x3f201000 console=ttyAMA0 panic=-1 noreboot
console: PID hash table entries: 4096 (order: 3, 32768 bytes)
console: Memory: 879888K/983040K available (8252K kernel code, 1448K rwdata, 2692K rodata, 4480K init, 601K bss, 37616K reserved, 65536K cma-reserved)
console: Virtual kernel memory layout:
console: modules : 0xffff000000000000 - 0xffff000008000000 ( 128 MB)
console: vmalloc : 0xffff000008000000 - 0xffff7dffbfff0000 (129022 GB)
console: .text : 0xffff000008080000 - 0xffff000008890000 ( 8256 KB)
console: .rodata : 0xffff000008890000 - 0xffff000008b40000 ( 2752 KB)
console: .init : 0xffff000008b40000 - 0xffff000008fa0000 ( 4480 KB)
console: .data : 0xffff000008fa0000 - 0xffff00000910a200 ( 1449 KB)
console: .bss : 0xffff00000910a200 - 0xffff0000091a0910 ( 602 KB)
console: fixed : 0xffff7dfffe7fd000 - 0xffff7dfffec00000 ( 4108 KB)
console: PCI I/O : 0xffff7dfffee00000 - 0xffff7dffffe00000 ( 16 MB)
console: vmemmap : 0xffff7e0000000000 - 0xffff800000000000 ( 2048 GB maximum)
console: 0xffff7e0000000000 - 0xffff7e0000f00000 ( 15 MB actual)
console: memory : 0xffff800000000000 - 0xffff80003c000000 ( 960 MB)
console: ftrace: allocating 30760 entries in 121 pages
\console: Hierarchical RCU implementation.
console: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=1.
console: RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
console: NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
console: arch_timer: WARNING: Invalid trigger for IRQ2, assuming level low
console: arch_timer: WARNING: Please fix your firmware
console: arch_timer: cp15 timer(s) running at 62.50MHz (phys).
console: clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x1cd42e208c, max_idle_ns: 881590405314 ns
console: sched_clock: 56 bits at 62MHz, resolution 16ns, wraps every 4398046511096ns
console: Console: colour dummy device 80x25
console: Calibrating delay loop (skipped), value calculated using timer frequency.. 125.00 BogoMIPS (lpj=250000)
console: pid_max: default: 32768 minimum: 301
console: Security Framework initialized
console: Yama: disabled by default; enable with sysctl kernel.yama.*
console: AppArmor: AppArmor initialized
console: Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes)
console: Inode-cache hash table entries: 65536 (order: 7, 524288 bytes)
console: Mount-cache hash table entries: 2048 (order: 2, 16384 bytes)
console: Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes)
console: ASID allocator initialised with 65536 entries
console: Hierarchical SRCU implementation.
console: EFI services will not be available.
console: smp: Bringing up secondary CPUs ...
console: smp: Brought up 1 node, 1 CPU
console: SMP: Total of 1 processors activated.
console: CPU features: detected feature: 32-bit EL0 Support
console: CPU: All CPU(s) started at EL2
console: alternatives: patching kernel code
|console: devtmpfs: initialized
console: Registered cp15_barrier emulation handler
console: Registered setend emulation handler
console: clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
console: futex hash table entries: 256 (order: 3, 32768 bytes)
console: pinctrl core: initialized pinctrl subsystem
console: DMI not present or invalid.
console: NET: Registered protocol family 16
console: cpuidle: using governor ladder
console: cpuidle: using governor menu
console: vdso: 2 pages (1 code @ ffff000008896000, 1 data @ ffff000008fa5000)
console: hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
console: DMA: preallocated 256 KiB pool for atomic allocations
console: Serial: AMBA PL011 UART driver
console: uart-pl011 3f201000.serial: could not find pctldev for node /soc/gpio@7e200000/uart0_pins, deferring probe
console: HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
console: ACPI: Interpreter disabled.
console: vgaarb: loaded
console: EDAC MC: Ver: 3.0.0
console: dmi: Firmware registration failed.
/console: clocksource: Switched to clocksource arch_sys_counter
-console: VFS: Disk quotas dquot_6.6.0
console: VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
console: AppArmor: AppArmor Filesystem Enabled
console: pnp: PnP ACPI: disabled
\console: NET: Registered protocol family 2
console: TCP established hash table entries: 8192 (order: 4, 65536 bytes)
console: TCP bind hash table entries: 8192 (order: 5, 131072 bytes)
console: TCP: Hash tables configured (established 8192 bind 8192)
console: UDP hash table entries: 512 (order: 2, 16384 bytes)
console: UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
console: NET: Registered protocol family 1
console: Unpacking initramfs...
console: Freeing initrd memory: 3268K
console: kvm [1]: 8-bit VMID
console: kvm [1]: IDMAP page: 87a000
console: kvm [1]: HYP VA range: 800000000000:ffffffffffff
console: kvm [1]: Invalid trigger for IRQ4, assuming level low
console: kvm [1]: virtual timer IRQ4
console: kvm [1]: Hyp mode initialized successfully
|console: audit: initializing netlink subsys (disabled)
console: audit: type=2000 audit(4.436:1): state=initialized audit_enabled=0 res=1
console: workingset: timestamp_bits=44 max_order=18 bucket_order=0
console: zbud: loaded
/console: Key type asymmetric registered
console: Asymmetric key parser 'x509' registered
console: Block layer SCSI generic (bsg) driver version 0.4 loaded (major 246)
console: io scheduler noop registered
console: io scheduler deadline registered
console: io scheduler cfq registered (default)
console: io scheduler mq-deadline registered
console: Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
console: bcm2835-aux-uart 3f215040.serial: irq not found - -517
console: Serial: AMBA driver
console: msm_serial: driver initialized
console: cacheinfo: Unable to detect cache hierarchy for CPU 0
console: mousedev: PS/2 mouse device common for all mice
console: ledtrig-cpu: registered to indicate activity on CPUs
console: dmi-sysfs: dmi entry is absent.
console: bcm2835-mbox 3f00b880.mailbox: mailbox enabled
console: NET: Registered protocol family 10
console: Segment Routing with IPv6
console: mip6: Mobile IPv6
console: NET: Registered protocol family 17
console: mpls_gso: MPLS GSO support
console: registered taskstats version 1
console: zswap: loaded using pool lzo/zbud
console: AppArmor: AppArmor sha1 policy hashing enabled
console: ima: No TPM chip found, activating TPM-bypass! (rc=-19)
console: 3f201000.serial: ttyAMA0 at MMIO 0x3f201000 (irq = 72, base_baud = 0) is a PL011 rev2
console: console [ttyAMA0] enabled
console: console [ttyAMA0] enabled
console: bootconsole [pl11] disabled
console: bootconsole [pl11] disabled
console: bcm2835-aux-uart 3f215040.serial: irq not found - -517
console: raspberrypi-firmware soc:firmware: Attached to firmware from 1970-01-05 00:12
console: bcm2835-aux-uart 3f215040.serial: irq not found - -517
-console: hctosys: unable to open rtc device (rtc0)
console: uart-pl011 3f201000.serial: no DMA platform data
console: Freeing unused kernel memory: 4480K
\console: mount: mounting devtmpfs on /dev failed: Device or resource busy
-console: Starting logging: OK
\console: Initializing random number generator... done.
/console: Starting network: OK
-console: Found console ttyAMA0
\console: Boot successful.
console: cat /proc/cpuinfo
console: / # cat /proc/cpuinfo
|console: processor : 0
console: BogoMIPS : 125.00
console: Featuresuname -a
console: : fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid
console: CPU implementer : 0x41
console: CPU architecture: 8
console: CPU variant : 0x0
console: CPU part : 0xd03
console: CPU revision : 4
console: / # uname -a
console: Linux buildroot 4.14.0-3-arm64 #1 SMP Debian 4.14.12-2 (2018-01-06) aarch64 GNU/Linux
console: reboot
console: / # reboot
/console: / # Found console ttyAMA0
\console: Stopping network: OK
|console: Saving random seed... done.
console: Stopping logging: OK
/console: umount: devtmpfs busy - remounted read-only
console: umount: can't unmount /: Invalid argument
console: The system is going down NOW!
console: Sent SIGTERM to all processes
-console: Sent SIGKILL to all processes
console: Requesting system reboot
\console: kvm: exiting hardware virtualization
console: reboot: Restarting system
PASS (36.65 s)
(4/4) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_raspi3_initrd_sd_temp: /console: [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
console: [ 0.000000] Linux version 4.19.71-v8-13ce09db830e+ (sakaki@kurosawa) (gcc version 8.3.0 (Gentoo 8.3.0-r1 p1.1)) #1 SMP PREEMPT Tue Sep 10 13:07:40 GMT 2019
console: [ 0.000000] Machine model: Raspberry Pi 3 Model B
console: [ 0.000000] earlycon: pl11 at MMIO 0x000000003f201000 (options '')
console: [ 0.000000] bootconsole [pl11] enabled
console: [ 0.000000] efi: Getting EFI parameters from FDT:
console: [ 0.000000] efi: UEFI not found.
console: [ 0.000000] cma: Reserved 8 MiB at 0x000000003b800000
-console: [ 0.000000] random: get_random_bytes called from start_kernel+0xa0/0x464 with crng_init=0
console: [ 0.000000] percpu: Embedded 24 pages/cpu s57368 r8192 d32744 u98304
console: [ 0.000000] Detected VIPT I-cache on CPU0
console: [ 0.000000] CPU features: enabling workaround for ARM erratum 843419
console: [ 0.000000] CPU features: enabling workaround for ARM erratum 845719
\console: [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
console: [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 241920
console: [ 0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x3f201000 console=ttyAMA0 root=/dev/mmcblk0 rootwait rw panic=-1 noreboot
console: Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes)
console: Inode-cache hash table entries: 65536 (order: 7, 524288 bytes)
console: Memory: 941500K/983040K available (7676K kernel code, 880K rwdata, 2368K rodata, 2752K init, 918K bss, 33348K reserved, 8192K cma-reserved)
console: SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
console: ftrace: allocating 26487 entries in 104 pages
-console: rcu: Preemptible hierarchical RCU implementation.
console: Tasks RCU enabled.
console: NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
console: arch_timer: cp15 timer(s) running at 62.50MHz (phys).
console: clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x1cd42e208c, max_idle_ns: 881590405314 ns
console: sched_clock: 56 bits at 62MHz, resolution 16ns, wraps every 4398046511096ns
\console: Console: colour dummy device 80x25
console: Calibrating delay loop (skipped), value calculated using timer frequency.. 125.00 BogoMIPS (lpj=62500)
console: pid_max: default: 32768 minimum: 301
console: Mount-cache hash table entries: 2048 (order: 2, 16384 bytes)
console: Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes)
console: ASID allocator initialised with 32768 entries
console: rcu: Hierarchical SRCU implementation.
console: EFI services will not be available.
console: smp: Bringing up secondary CPUs ...
console: Detected VIPT I-cache on CPU1
console: CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
console: Detected VIPT I-cache on CPU2
console: CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
console: Detected VIPT I-cache on CPU3
console: CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
console: smp: Brought up 1 node, 4 CPUs
console: SMP: Total of 4 processors activated.
console: CPU features: detected: 32-bit EL0 Support
|console: CPU: All CPU(s) started at EL2
console: alternatives: patching kernel code
console: devtmpfs: initialized
console: Enabled cp15_barrier support
console: Enabled setend support
console: clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
console: futex hash table entries: 1024 (order: 4, 65536 bytes)
console: pinctrl core: initialized pinctrl subsystem
console: DMI not present or invalid.
console: NET: Registered protocol family 16
/console: cpuidle: using governor menu
console: vdso: 2 pages (1 code @ (____ptrval____), 1 data @ (____ptrval____))
console: hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
console: DMA: preallocated 256 KiB pool for atomic allocations
console: Serial: AMBA PL011 UART driver
console: bcm2835-mbox 3f00b880.mailbox: mailbox enabled
\console: bcm2835-dma 3f007000.dma: DMA legacy API manager at (____ptrval____), dmachans=0x1
console: SCSI subsystem initialized
console: usbcore: registered new interface driver usbfs
console: usbcore: registered new interface driver hub
console: usbcore: registered new device driver usb
console: raspberrypi-firmware soc:firmware: Attached to firmware from 1970-01-05 00:12, variant unknown
console: raspberrypi-firmware soc:firmware: Firmware hash is ffffffff08542080ffffff8008023bb0ffffff80
console: clocksource: Switched to clocksource arch_sys_counter
-console: VFS: Disk quotas dquot_6.6.0
console: VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
console: FS-Cache: Loaded
console: CacheFiles: Loaded
\console: NET: Registered protocol family 2
console: tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes)
console: TCP established hash table entries: 8192 (order: 4, 65536 bytes)
console: TCP bind hash table entries: 8192 (order: 5, 131072 bytes)
console: TCP: Hash tables configured (established 8192 bind 8192)
console: UDP hash table entries: 512 (order: 2, 16384 bytes)
console: UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
console: NET: Registered protocol family 1
console: RPC: Registered named UNIX socket transport module.
console: RPC: Registered udp transport module.
console: RPC: Registered tcp transport module.
console: RPC: Registered tcp NFSv4.1 backchannel transport module.
console: hw perfevents: enabled with armv8_cortex_a53 PMU driver, 5 counters available
console: Initialise system trusted keyrings
console: workingset: timestamp_bits=46 max_order=18 bucket_order=0
console: FS-Cache: Netfs 'nfs' registered for caching
console: NFS: Registering the id_resolver key type
console: Key type id_resolver registered
console: Key type id_legacy registered
|console: Key type asymmetric registered
console: Asymmetric key parser 'x509' registered
console: Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)
console: io scheduler noop registered
console: io scheduler deadline registered
console: io scheduler cfq registered (default)
console: io scheduler mq-deadline registered
console: io scheduler kyber registered
console: bcm2835-aux-uart 3f215040.serial: unable to register 8250 port - -22
console: bcm2835-aux-uart: probe of 3f215040.serial failed with error -22
console: bcm2835-rng 3f104000.rng: hwrng registered
console: vc-mem: phys_addr:0x00000000 mem_base=0x00000000 mem_size:0x00000000(0 MiB)
console: cacheinfo: Unable to detect cache hierarchy for CPU 0
/console: brd: module loaded
console: loop: module loaded
console: Loading iSCSI transport class v2.0-870.
console: libphy: Fixed MDIO Bus: probed
console: usbcore: registered new interface driver lan78xx
console: usbcore: registered new interface driver smsc95xx
console: dwc_otg: version 3.00a 10-AUG-2012 (platform bus)
console: dwc2 3f980000.usb: dwc2_core_reset: HANG! AHB Idle timeout GRSTCTL GRSTCTL_AHBIDLE
console: dwc2: probe of 3f980000.usb failed with error -16
console: usbcore: registered new interface driver usb-storage
console: bcm2835_thermal 3f212000.thermal: Clock tsens running at 19200000 Hz is outside of the recommended range: 1.92 to 5MHz
console: bcm2835-wdt bcm2835-wdt: Broadcom BCM2835 watchdog timer
console: bcm2835-cpufreq: min=700000 max=700000
console: raspberrypi-exp-gpio soc:firmware:gpio: Failed to get GPIO 1 config (0 81)
console: raspberrypi-exp-gpio soc:firmware:gpio: Failed to get GPIO 1 config (0 81)
console: pwrseq_simple: probe of wifi-pwrseq failed with error -5
console: sdhci: Secure Digital Host Controller Interface driver
console: sdhci: Copyright(c) Pierre Ossman
console: sdhost-bcm2835 3f202000.mmc: /aliases ID not available
console: sdhost: log_buf @ (____ptrval____) (fb840000)
-console: mmc0: sdhost-bcm2835 loaded - DMA enabled (>1)
console: sdhci-pltfm: SDHCI platform and OF driver helper
console: raspberrypi-exp-gpio soc:firmware:gpio: Failed to get GPIO 2 config (0 82)
console: raspberrypi-exp-gpio soc:firmware:gpio: Failed to get GPIO 2 state (0 82)
console: leds-gpio: probe of leds failed with error -5
console: ledtrig-cpu: registered to indicate activity on CPUs
console: hidraw: raw HID events driver (C) Jiri Kosina
console: usbcore: registered new interface driver usbhid
console: usbhid: USB HID core driver
console: Initializing XFRM netlink socket
console: NET: Registered protocol family 17
console: Key type dns_resolver registered
console: mmc0: host does not support reading read-only switch, assuming write-enable
console: mmc0: Problem switching card into high-speed mode!
console: registered taskstats version 1
console: Loading compiled-in X.509 certificates
console: mmc0: new SD card at address 4567
console: mmcblk0: mmc0:4567 QEMU! 10.0 MiB
console: 3f201000.serial: ttyAMA0 at MMIO 0x3f201000 (irq = 66, base_baud = 0) is a PL011 rev2
console: console [ttyAMA0] enabled
console: console [ttyAMA0] enabled
console: bootconsole [pl11] disabled
console: bootconsole [pl11] disabled
console: of_cfs_init
console: of_cfs_init: OK
console: uart-pl011 3f201000.serial: no DMA platform data
console: EXT4-fs (mmcblk0): mounting ext2 file system using the ext4 subsystem
console: EXT4-fs (mmcblk0): mounted filesystem without journal. Opts: (null)
console: VFS: Mounted root (ext2 filesystem) on device 179:0.
\console: devtmpfs: mounted
console: Freeing unused kernel memory: 2752K
console: Run /sbin/init as init process
\console: mount: mounting devtmpfs on /dev failed: Device or resource busy
|console: EXT4-fs (mmcblk0): re-mounted. Opts: (null)
|console: Starting logging: OK
|console: Initializing random number generator... random: dd: uninitialized urandom read (512 bytes read)
console: done.
\console: Starting network: OK
/console: Found console ttyAMA0
\console: Boot successful.
console: cat /proc/cpuinfo
|console: / # cat /proc/cpuinfo
/console: processor : 0
console: BogoMIPS : 125.00
console: Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid
console: CPU implementer : 0x41
console: CPU architecture: 8
console: CPU variant : 0x0
console: CPU part : 0xd03
console: CPU revision : 4
console: processor : 1
console: BogoMIPS : 125.00
console: Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid
console: CPU implementer : 0x41
console: CPU architecture: 8
console: CPU variant : 0x0
console: CPU part : 0xd03
console: CPU revision : 4
console: processor : 2
console: BogoMIPS : 125.00
console: Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid
console: CPU implementer : 0x41
console: CPU architecture: 8
console: CPU variant : 0x0
console: CPU part : 0xd03
console: CPU revision : 4
console: processor : 3
console: BogoMIPS : 125.00
console: Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid
console: CPU implementer : 0x41
console: CPU architecture: 8
console: CPU variant : 0x0
console: CPU part : 0xd03
console: CPU revision : 4
console: Hardware : BCM2835
console: Model : Raspberry Pi 3 Model B
console: cat /sys/devices/virtual/thermal/thermal_zone0/temp
console: / # cat /sys/devices/virtual/thermal/thermal_zone0/temp
console: 25178
console: reboot
-console: / # reboot
\console: / # Found console ttyAMA0
\console: Stopping network: hrtimer: interrupt took 5480528 ns
/console: OK
\console: Saving random seed... random: dd: uninitialized urandom read (512 bytes read)
console: done.
/console: Stopping logging: OK
\console: umount: devtmpfs busy - remounted read-only
console: EXT4-fs (mmcblk0): re-mounted. Opts: (null)
console: The system is going down NOW!
console: Sent SIGTERM to all processes
|console: Sent SIGKILL to all processes
console: Requesting system reboot
/console: reboot: Restarting system
PASS (66.14 s)
RESULTS : PASS 4 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCEL 0
JOB TIME : 116.67 s
Philippe Mathieu-Daudé (19):
hw/arm/raspi: Use the IEC binary prefix definitions
hw/arm/bcm2835_peripherals: Improve logging
hw/arm/bcm2835_peripherals: Name various address spaces
hw/arm/bcm2835: Rename some definitions
hw/arm/bcm2835: Add various unimplemented peripherals
hw/char/bcm2835_aux: Add trace events
hw/misc/bcm2835_mbox: Add trace events
hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
hw/arm/bcm2835_peripherals: Use the thermal sensor block
hw/timer/bcm2835: Add the BCM2835 SYS_timer
hw/arm/bcm2835_peripherals: Use the SYS_timer
hw/arm/bcm2835_peripherals: Add Clock/Power/Reset Manager blocks
hw/arm/raspi: Define various blocks base addresses
python/qemu/machine: Allow to use other serial consoles than default
tests/boot_linux_console: Extract the gunzip() helper
tests/boot_linux_console: Add a test for the Raspberry Pi 2
tests/boot_linux_console: Test the raspi2 UART1 (16550 based)
tests/boot_linux_console: Boot Linux and run few commands on raspi3
tests/boot_linux_console: Test SDHCI and termal sensor on raspi3
hw/arm/bcm2835_peripherals.c | 86 +++++-
hw/arm/bcm2836.c | 2 +-
hw/arm/raspi.c | 4 +-
hw/char/bcm2835_aux.c | 60 ++--
hw/char/trace-events | 4 +
hw/display/bcm2835_fb.c | 2 +-
hw/dma/bcm2835_dma.c | 10 +-
hw/intc/bcm2836_control.c | 7 +-
hw/misc/Makefile.objs | 2 +
hw/misc/bcm2835_cprman.c | 383 +++++++++++++++++++++++++
hw/misc/bcm2835_mbox.c | 14 +-
hw/misc/bcm2835_property.c | 20 +-
hw/misc/bcm2835_thermal.c | 109 +++++++
hw/misc/trace-events | 14 +
hw/timer/Makefile.objs | 1 +
hw/timer/bcm2835_systmr.c | 100 +++++++
hw/timer/trace-events | 4 +
include/hw/arm/bcm2835_peripherals.h | 18 ++
include/hw/arm/raspi_platform.h | 70 +++--
include/hw/misc/bcm2835_cprman.h | 32 +++
include/hw/misc/bcm2835_thermal.h | 27 ++
include/hw/timer/bcm2835_systmr.h | 30 ++
python/qemu/machine.py | 5 +-
tests/acceptance/boot_linux_console.py | 147 +++++++++-
24 files changed, 1087 insertions(+), 64 deletions(-)
create mode 100644 hw/misc/bcm2835_cprman.c
create mode 100644 hw/misc/bcm2835_thermal.c
create mode 100644 hw/timer/bcm2835_systmr.c
create mode 100644 include/hw/misc/bcm2835_cprman.h
create mode 100644 include/hw/misc/bcm2835_thermal.h
create mode 100644 include/hw/timer/bcm2835_systmr.h
--
2.20.1
^ permalink raw reply [flat|nested] 74+ messages in thread
* [PATCH 01/19] hw/arm/raspi: Use the IEC binary prefix definitions
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-09-27 21:36 ` Alistair Francis
` (2 more replies)
2019-09-26 17:34 ` [PATCH 02/19] hw/arm/bcm2835_peripherals: Improve logging Philippe Mathieu-Daudé
` (20 subsequent siblings)
21 siblings, 3 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
IEC binary prefixes ease code review: the unit is explicit.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/raspi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 74c062d05e..615d755879 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -230,7 +230,7 @@ static void raspi2_machine_init(MachineClass *mc)
mc->max_cpus = BCM283X_NCPUS;
mc->min_cpus = BCM283X_NCPUS;
mc->default_cpus = BCM283X_NCPUS;
- mc->default_ram_size = 1024 * 1024 * 1024;
+ mc->default_ram_size = 1 * GiB;
mc->ignore_memory_transaction_failures = true;
};
DEFINE_MACHINE("raspi2", raspi2_machine_init)
@@ -252,7 +252,7 @@ static void raspi3_machine_init(MachineClass *mc)
mc->max_cpus = BCM283X_NCPUS;
mc->min_cpus = BCM283X_NCPUS;
mc->default_cpus = BCM283X_NCPUS;
- mc->default_ram_size = 1024 * 1024 * 1024;
+ mc->default_ram_size = 1 * GiB;
}
DEFINE_MACHINE("raspi3", raspi3_machine_init)
#endif
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 02/19] hw/arm/bcm2835_peripherals: Improve logging
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
2019-09-26 17:34 ` [PATCH 01/19] hw/arm/raspi: Use the IEC binary prefix definitions Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-09-27 21:37 ` Alistair Francis
2019-10-08 9:00 ` Alex Bennée
2019-09-26 17:34 ` [PATCH 03/19] hw/arm/bcm2835_peripherals: Name various address spaces Philippe Mathieu-Daudé
` (19 subsequent siblings)
21 siblings, 2 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Various logging improvements as once:
- Use 0x prefix for hex numbers
- Display value written during write accesses
- Move some logs from GUEST_ERROR to UNIMP
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2: Use PRIx64 format (pm215)
---
hw/char/bcm2835_aux.c | 5 +++--
hw/dma/bcm2835_dma.c | 8 ++++----
hw/intc/bcm2836_control.c | 7 ++++---
hw/misc/bcm2835_mbox.c | 7 ++++---
hw/misc/bcm2835_property.c | 16 ++++++++++------
5 files changed, 25 insertions(+), 18 deletions(-)
diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c
index 3f855196e3..a6fc1bf152 100644
--- a/hw/char/bcm2835_aux.c
+++ b/hw/char/bcm2835_aux.c
@@ -162,8 +162,9 @@ static void bcm2835_aux_write(void *opaque, hwaddr offset, uint64_t value,
switch (offset) {
case AUX_ENABLES:
if (value != 1) {
- qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI "
- "or disable UART\n", __func__);
+ qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI"
+ " or disable UART: 0x%"PRIx64"\n",
+ __func__, value);
}
break;
diff --git a/hw/dma/bcm2835_dma.c b/hw/dma/bcm2835_dma.c
index 192bd377a0..6acc2b644e 100644
--- a/hw/dma/bcm2835_dma.c
+++ b/hw/dma/bcm2835_dma.c
@@ -180,7 +180,7 @@ static uint64_t bcm2835_dma_read(BCM2835DMAState *s, hwaddr offset,
res = ch->debug;
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
break;
}
@@ -228,7 +228,7 @@ static void bcm2835_dma_write(BCM2835DMAState *s, hwaddr offset,
ch->debug = value;
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
break;
}
@@ -247,7 +247,7 @@ static uint64_t bcm2835_dma0_read(void *opaque, hwaddr offset, unsigned size)
case BCM2708_DMA_ENABLE:
return s->enable;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
return 0;
}
@@ -274,7 +274,7 @@ static void bcm2835_dma0_write(void *opaque, hwaddr offset, uint64_t value,
s->enable = (value & 0xffff);
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
}
}
diff --git a/hw/intc/bcm2836_control.c b/hw/intc/bcm2836_control.c
index 04229b8a17..61f884ff9e 100644
--- a/hw/intc/bcm2836_control.c
+++ b/hw/intc/bcm2836_control.c
@@ -264,7 +264,7 @@ static uint64_t bcm2836_control_read(void *opaque, hwaddr offset, unsigned size)
} else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
return s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2];
} else {
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
+ qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
return 0;
}
@@ -293,8 +293,9 @@ static void bcm2836_control_write(void *opaque, hwaddr offset,
} else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2] &= ~val;
} else {
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
- __func__, offset);
+ qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx
+ " value 0x%"PRIx64"\n",
+ __func__, offset, val);
return;
}
diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c
index 79bad11631..7690b9afaf 100644
--- a/hw/misc/bcm2835_mbox.c
+++ b/hw/misc/bcm2835_mbox.c
@@ -176,7 +176,7 @@ static uint64_t bcm2835_mbox_read(void *opaque, hwaddr offset, unsigned size)
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
+ qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
return 0;
}
@@ -228,8 +228,9 @@ static void bcm2835_mbox_write(void *opaque, hwaddr offset,
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
- __func__, offset);
+ qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx
+ " value 0x%"PRIx64"\n",
+ __func__, offset, value);
return;
}
diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
index d86d510572..0a1a3eb5d9 100644
--- a/hw/misc/bcm2835_property.c
+++ b/hw/misc/bcm2835_property.c
@@ -56,7 +56,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
break;
case 0x00010001: /* Get board model */
qemu_log_mask(LOG_UNIMP,
- "bcm2835_property: %x get board model NYI\n", tag);
+ "bcm2835_property: 0x%08x get board model NYI\n",
+ tag);
resplen = 4;
break;
case 0x00010002: /* Get board revision */
@@ -69,7 +70,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
break;
case 0x00010004: /* Get board serial */
qemu_log_mask(LOG_UNIMP,
- "bcm2835_property: %x get board serial NYI\n", tag);
+ "bcm2835_property: 0x%08x get board serial NYI\n",
+ tag);
resplen = 8;
break;
case 0x00010005: /* Get ARM memory */
@@ -104,7 +106,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
case 0x00038001: /* Set clock state */
qemu_log_mask(LOG_UNIMP,
- "bcm2835_property: %x set clock state NYI\n", tag);
+ "bcm2835_property: 0x%08x set clock state NYI\n",
+ tag);
resplen = 8;
break;
@@ -129,7 +132,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
case 0x00038004: /* Set max clock rate */
case 0x00038007: /* Set min clock rate */
qemu_log_mask(LOG_UNIMP,
- "bcm2835_property: %x set clock rates NYI\n", tag);
+ "bcm2835_property: 0x%08x set clock rate NYI\n",
+ tag);
resplen = 8;
break;
@@ -274,8 +278,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR,
- "bcm2835_property: unhandled tag %08x\n", tag);
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_property: unhandled tag 0x%08x\n", tag);
break;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 03/19] hw/arm/bcm2835_peripherals: Name various address spaces
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
2019-09-26 17:34 ` [PATCH 01/19] hw/arm/raspi: Use the IEC binary prefix definitions Philippe Mathieu-Daudé
2019-09-26 17:34 ` [PATCH 02/19] hw/arm/bcm2835_peripherals: Improve logging Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-09-27 21:38 ` Alistair Francis
` (2 more replies)
2019-09-26 17:34 ` [PATCH 04/19] hw/arm/bcm2835: Rename some definitions Philippe Mathieu-Daudé
` (18 subsequent siblings)
21 siblings, 3 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Various address spaces from the BCM2835 are reported as
'anonymous' in memory tree:
(qemu) info mtree
address-space: anonymous
0000000000000000-000000000000008f (prio 0, i/o): bcm2835-mbox
0000000000000010-000000000000001f (prio 0, i/o): bcm2835-fb
0000000000000080-000000000000008f (prio 0, i/o): bcm2835-property
address-space: anonymous
0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
[...]
Since the address_space_init() function takes a 'name' argument,
set it to correctly describe each address space:
(qemu) info mtree
address-space: bcm2835-mbox-memory
0000000000000000-000000000000008f (prio 0, i/o): bcm2835-mbox
0000000000000010-000000000000001f (prio 0, i/o): bcm2835-fb
0000000000000080-000000000000008f (prio 0, i/o): bcm2835-property
address-space: bcm2835-fb-memory
0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
address-space: bcm2835-property-memory
0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
address-space: bcm2835-dma-memory
0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/display/bcm2835_fb.c | 2 +-
hw/dma/bcm2835_dma.c | 2 +-
hw/misc/bcm2835_mbox.c | 2 +-
hw/misc/bcm2835_property.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/display/bcm2835_fb.c b/hw/display/bcm2835_fb.c
index 8f856878cd..85aaa54330 100644
--- a/hw/display/bcm2835_fb.c
+++ b/hw/display/bcm2835_fb.c
@@ -425,7 +425,7 @@ static void bcm2835_fb_realize(DeviceState *dev, Error **errp)
s->initial_config.base = s->vcram_base + BCM2835_FB_OFFSET;
s->dma_mr = MEMORY_REGION(obj);
- address_space_init(&s->dma_as, s->dma_mr, NULL);
+ address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_FB "-memory");
bcm2835_fb_reset(dev);
diff --git a/hw/dma/bcm2835_dma.c b/hw/dma/bcm2835_dma.c
index 6acc2b644e..1e458d7fba 100644
--- a/hw/dma/bcm2835_dma.c
+++ b/hw/dma/bcm2835_dma.c
@@ -383,7 +383,7 @@ static void bcm2835_dma_realize(DeviceState *dev, Error **errp)
}
s->dma_mr = MEMORY_REGION(obj);
- address_space_init(&s->dma_as, s->dma_mr, NULL);
+ address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_DMA "-memory");
bcm2835_dma_reset(dev);
}
diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c
index 7690b9afaf..77285624c9 100644
--- a/hw/misc/bcm2835_mbox.c
+++ b/hw/misc/bcm2835_mbox.c
@@ -311,7 +311,7 @@ static void bcm2835_mbox_realize(DeviceState *dev, Error **errp)
}
s->mbox_mr = MEMORY_REGION(obj);
- address_space_init(&s->mbox_as, s->mbox_mr, NULL);
+ address_space_init(&s->mbox_as, s->mbox_mr, TYPE_BCM2835_MBOX "-memory");
bcm2835_mbox_reset(dev);
}
diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
index 0a1a3eb5d9..43a5465c5d 100644
--- a/hw/misc/bcm2835_property.c
+++ b/hw/misc/bcm2835_property.c
@@ -407,7 +407,7 @@ static void bcm2835_property_realize(DeviceState *dev, Error **errp)
}
s->dma_mr = MEMORY_REGION(obj);
- address_space_init(&s->dma_as, s->dma_mr, NULL);
+ address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_PROPERTY "-memory");
/* TODO: connect to MAC address of USB NIC device, once we emulate it */
qemu_macaddr_default_if_unset(&s->macaddr);
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 04/19] hw/arm/bcm2835: Rename some definitions
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 03/19] hw/arm/bcm2835_peripherals: Name various address spaces Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-09-27 21:40 ` Alistair Francis
2019-10-08 10:40 ` Alex Bennée
2019-09-26 17:34 ` [PATCH 05/19] hw/arm/bcm2835: Add various unimplemented peripherals Philippe Mathieu-Daudé
` (17 subsequent siblings)
21 siblings, 2 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
The UART1 is part of the AUX peripheral,
the PCM_CLOCK (yet unimplemented) is part of the CPRMAN.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
I dunno if this is OK to do that since the header has:
* These definitions are derived from those in Raspbian Linux at
* arch/arm/mach-{bcm2708,bcm2709}/include/mach/platform.h
* where they carry the following notice:
*
* Copyright (C) 2010 Broadcom
---
hw/arm/bcm2835_peripherals.c | 7 ++++---
hw/arm/bcm2836.c | 2 +-
include/hw/arm/raspi_platform.h | 16 +++++++---------
3 files changed, 12 insertions(+), 13 deletions(-)
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index 8984e2e91f..1bd2ff41d5 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -165,7 +165,8 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0,
qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
- INTERRUPT_UART));
+ INTERRUPT_UART0));
+
/* AUX / UART1 */
qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1));
@@ -175,7 +176,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
return;
}
- memory_region_add_subregion(&s->peri_mr, UART1_OFFSET,
+ memory_region_add_subregion(&s->peri_mr, AUX_OFFSET,
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
@@ -268,7 +269,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
return;
}
- memory_region_add_subregion(&s->peri_mr, EMMC_OFFSET,
+ memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET,
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 493a913f89..723aef6bf5 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -126,7 +126,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
/* set periphbase/CBAR value for CPU-local registers */
object_property_set_int(OBJECT(&s->cpus[n]),
- BCM2836_PERI_BASE + MCORE_OFFSET,
+ BCM2836_PERI_BASE + MSYNC_OFFSET,
"reset-cbar", &err);
if (err) {
error_propagate(errp, err);
diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
index 10083d33df..66969fac5d 100644
--- a/include/hw/arm/raspi_platform.h
+++ b/include/hw/arm/raspi_platform.h
@@ -25,8 +25,7 @@
#ifndef HW_ARM_RASPI_PLATFORM_H
#define HW_ARM_RASPI_PLATFORM_H
-#define MCORE_OFFSET 0x0000 /* Fake frame buffer device
- * (the multicore sync block) */
+#define MSYNC_OFFSET 0x0000 /* Multicore Sync Block */
#define IC0_OFFSET 0x2000
#define ST_OFFSET 0x3000 /* System Timer */
#define MPHI_OFFSET 0x6000 /* Message-based Parallel Host Intf. */
@@ -37,9 +36,8 @@
#define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 */
#define ARMCTRL_0_SBM_OFFSET (ARM_OFFSET + 0x800) /* User 0 (ARM) Semaphores
* Doorbells & Mailboxes */
-#define PM_OFFSET 0x100000 /* Power Management, Reset controller
- * and Watchdog registers */
-#define PCM_CLOCK_OFFSET 0x101098
+#define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
+#define CM_OFFSET 0x101000 /* Clock Management */
#define RNG_OFFSET 0x104000
#define GPIO_OFFSET 0x200000
#define UART0_OFFSET 0x201000
@@ -47,11 +45,11 @@
#define I2S_OFFSET 0x203000
#define SPI0_OFFSET 0x204000
#define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
-#define UART1_OFFSET 0x215000
-#define EMMC_OFFSET 0x300000
+#define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
+#define EMMC1_OFFSET 0x300000
#define SMI_OFFSET 0x600000
#define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */
-#define USB_OFFSET 0x980000 /* DTC_OTG USB controller */
+#define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */
#define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */
/* GPU interrupts */
@@ -112,7 +110,7 @@
#define INTERRUPT_SPI 54
#define INTERRUPT_I2SPCM 55
#define INTERRUPT_SDIO 56
-#define INTERRUPT_UART 57
+#define INTERRUPT_UART0 57
#define INTERRUPT_SLIMBUS 58
#define INTERRUPT_VEC 59
#define INTERRUPT_CPG 60
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 05/19] hw/arm/bcm2835: Add various unimplemented peripherals
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 04/19] hw/arm/bcm2835: Rename some definitions Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-09-27 21:42 ` Alistair Francis
2019-10-08 11:09 ` Alex Bennée
2019-09-26 17:34 ` [PATCH 06/19] hw/char/bcm2835_aux: Add trace events Philippe Mathieu-Daudé
` (16 subsequent siblings)
21 siblings, 2 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Base addresses and sizes taken from the "BCM2835 ARM Peripherals"
datasheet from February 06 2012:
https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/bcm2835_peripherals.c | 31 ++++++++++++++++++++++++++++
include/hw/arm/bcm2835_peripherals.h | 15 ++++++++++++++
include/hw/arm/raspi_platform.h | 8 +++++++
3 files changed, 54 insertions(+)
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index 1bd2ff41d5..fdcf616c56 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -22,6 +22,20 @@
/* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
#define BCM2835_SDHC_CAPAREG 0x52134b4
+static void create_unimp(BCM2835PeripheralState *ps,
+ UnimplementedDeviceState *uds,
+ const char *name, hwaddr ofs, hwaddr size)
+{
+ sysbus_init_child_obj(OBJECT(ps), name, uds,
+ sizeof(UnimplementedDeviceState),
+ TYPE_UNIMPLEMENTED_DEVICE);
+ qdev_prop_set_string(DEVICE(uds), "name", name);
+ qdev_prop_set_uint64(DEVICE(uds), "size", size);
+ object_property_set_bool(OBJECT(uds), true, "realized", &error_fatal);
+ memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
+}
+
static void bcm2835_peripherals_init(Object *obj)
{
BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
@@ -323,6 +337,23 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
error_propagate(errp, err);
return;
}
+
+ create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
+ create_unimp(s, &s->systmr, "bcm2835-systimer", ST_OFFSET, 0x20);
+ create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
+ create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
+ create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
+ create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
+ create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
+ create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
+ create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20);
+ create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20);
+ create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20);
+ create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
+ create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
+ create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
+ create_unimp(s, &s->dwc2, "dwc-usb2", USB_OTG_OFFSET, 0x1000);
+ create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
}
static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
index 6b17f6a382..62a4c7b559 100644
--- a/include/hw/arm/bcm2835_peripherals.h
+++ b/include/hw/arm/bcm2835_peripherals.h
@@ -23,6 +23,7 @@
#include "hw/sd/sdhci.h"
#include "hw/sd/bcm2835_sdhost.h"
#include "hw/gpio/bcm2835_gpio.h"
+#include "hw/misc/unimp.h"
#define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
#define BCM2835_PERIPHERALS(obj) \
@@ -37,6 +38,10 @@ typedef struct BCM2835PeripheralState {
MemoryRegion ram_alias[4];
qemu_irq irq, fiq;
+ UnimplementedDeviceState systmr;
+ UnimplementedDeviceState armtmr;
+ UnimplementedDeviceState cprman;
+ UnimplementedDeviceState a2w;
PL011State uart0;
BCM2835AuxState aux;
BCM2835FBState fb;
@@ -48,6 +53,16 @@ typedef struct BCM2835PeripheralState {
SDHCIState sdhci;
BCM2835SDHostState sdhost;
BCM2835GpioState gpio;
+ UnimplementedDeviceState i2s;
+ UnimplementedDeviceState spi[1];
+ UnimplementedDeviceState i2c[3];
+ UnimplementedDeviceState otp;
+ UnimplementedDeviceState dbus;
+ UnimplementedDeviceState ave0;
+ UnimplementedDeviceState bscsl;
+ UnimplementedDeviceState smi;
+ UnimplementedDeviceState dwc2;
+ UnimplementedDeviceState sdramc;
} BCM2835PeripheralState;
#endif /* BCM2835_PERIPHERALS_H */
diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
index 66969fac5d..cdcbca943f 100644
--- a/include/hw/arm/raspi_platform.h
+++ b/include/hw/arm/raspi_platform.h
@@ -38,6 +38,8 @@
* Doorbells & Mailboxes */
#define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
#define CM_OFFSET 0x101000 /* Clock Management */
+#define A2W_OFFSET 0x102000 /* Reset controller */
+#define AVS_OFFSET 0x103000 /* Audio Video Standard */
#define RNG_OFFSET 0x104000
#define GPIO_OFFSET 0x200000
#define UART0_OFFSET 0x201000
@@ -45,11 +47,17 @@
#define I2S_OFFSET 0x203000
#define SPI0_OFFSET 0x204000
#define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
+#define OTP_OFFSET 0x20f000
+#define BSC_SL_OFFSET 0x214000 /* SPI slave */
#define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
#define EMMC1_OFFSET 0x300000
#define SMI_OFFSET 0x600000
#define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */
+#define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */
+#define DBUS_OFFSET 0x900000
+#define AVE0_OFFSET 0x910000
#define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */
+#define SDRAMC_OFFSET 0xe00000
#define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */
/* GPU interrupts */
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 06/19] hw/char/bcm2835_aux: Add trace events
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 05/19] hw/arm/bcm2835: Add various unimplemented peripherals Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-10-08 11:22 ` Alex Bennée
2019-10-14 15:36 ` Peter Maydell
2019-09-26 17:34 ` [PATCH 07/19] hw/misc/bcm2835_mbox: " Philippe Mathieu-Daudé
` (15 subsequent siblings)
21 siblings, 2 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
The BCM2835 AUX UART is compatible with the 16650 model, when
the registers belong the the 16650 block, use its trace events,
else use bcm2835_aux_read/write.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/char/bcm2835_aux.c | 55 +++++++++++++++++++++++++++++++------------
hw/char/trace-events | 4 ++++
2 files changed, 44 insertions(+), 15 deletions(-)
diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c
index a6fc1bf152..b26a255630 100644
--- a/hw/char/bcm2835_aux.c
+++ b/hw/char/bcm2835_aux.c
@@ -27,6 +27,7 @@
#include "migration/vmstate.h"
#include "qemu/log.h"
#include "qemu/module.h"
+#include "trace.h"
#define AUX_IRQ 0x0
#define AUX_ENABLES 0x4
@@ -62,17 +63,24 @@ static void bcm2835_aux_update(BCM2835AuxState *s)
qemu_set_irq(s->irq, s->iir != 0);
}
+static bool is_16650(hwaddr offset)
+{
+ return offset >= AUX_MU_IO_REG && offset < AUX_MU_CNTL_REG;
+}
+
static uint64_t bcm2835_aux_read(void *opaque, hwaddr offset, unsigned size)
{
BCM2835AuxState *s = opaque;
- uint32_t c, res;
+ uint32_t c, res = 0;
switch (offset) {
case AUX_IRQ:
- return s->iir != 0;
+ res = s->iir != 0;
+ break;
case AUX_ENABLES:
- return 1; /* mini UART permanently enabled */
+ res = 1; /* mini UART permanently enabled */
+ break;
case AUX_MU_IO_REG:
/* "DLAB bit set means access baudrate register" is NYI */
@@ -85,11 +93,13 @@ static uint64_t bcm2835_aux_read(void *opaque, hwaddr offset, unsigned size)
}
qemu_chr_fe_accept_input(&s->chr);
bcm2835_aux_update(s);
- return c;
+ res = c;
+ break;
case AUX_MU_IER_REG:
/* "DLAB bit set means access baudrate register" is NYI */
- return 0xc0 | s->ier; /* FIFO enables always read 1 */
+ res = 0xc0 | s->ier; /* FIFO enables always read 1 */
+ break;
case AUX_MU_IIR_REG:
res = 0xc0; /* FIFO enables */
@@ -105,33 +115,34 @@ static uint64_t bcm2835_aux_read(void *opaque, hwaddr offset, unsigned size)
if (s->iir == 0) {
res |= 0x1;
}
- return res;
+ break;
case AUX_MU_LCR_REG:
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_LCR_REG unsupported\n", __func__);
- return 0;
+ break;
case AUX_MU_MCR_REG:
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_MCR_REG unsupported\n", __func__);
- return 0;
+ break;
case AUX_MU_LSR_REG:
res = 0x60; /* tx idle, empty */
if (s->read_count != 0) {
res |= 0x1;
}
- return res;
+ break;
case AUX_MU_MSR_REG:
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_MSR_REG unsupported\n", __func__);
- return 0;
+ break;
case AUX_MU_SCRATCH:
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_SCRATCH unsupported\n", __func__);
- return 0;
+ break;
case AUX_MU_CNTL_REG:
- return 0x3; /* tx, rx enabled */
+ res = 0x3; /* tx, rx enabled */
+ break;
case AUX_MU_STAT_REG:
res = 0x30e; /* space in the output buffer, empty tx fifo, idle tx/rx */
@@ -140,17 +151,25 @@ static uint64_t bcm2835_aux_read(void *opaque, hwaddr offset, unsigned size)
assert(s->read_count < BCM2835_AUX_RX_FIFO_LEN);
res |= ((uint32_t)s->read_count) << 16; /* rx fifo fill level */
}
- return res;
+ break;
case AUX_MU_BAUD_REG:
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_BAUD_REG unsupported\n", __func__);
- return 0;
+ break;
default:
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
__func__, offset);
- return 0;
+ break;
}
+
+ if (is_16650(offset)) {
+ trace_serial_ioport_read((offset & 0x1f) >> 2, res);
+ } else {
+ trace_bcm2835_aux_read(offset, res);
+ }
+
+ return res;
}
static void bcm2835_aux_write(void *opaque, hwaddr offset, uint64_t value,
@@ -159,6 +178,12 @@ static void bcm2835_aux_write(void *opaque, hwaddr offset, uint64_t value,
BCM2835AuxState *s = opaque;
unsigned char ch;
+ if (is_16650(offset)) {
+ trace_serial_ioport_write((offset & 0x1f) >> 2, value);
+ } else {
+ trace_bcm2835_aux_write(offset, value);
+ }
+
switch (offset) {
case AUX_ENABLES:
if (value != 1) {
diff --git a/hw/char/trace-events b/hw/char/trace-events
index 2ce7f2f998..a7d477ab1e 100644
--- a/hw/char/trace-events
+++ b/hw/char/trace-events
@@ -1,5 +1,9 @@
# See docs/devel/tracing.txt for syntax documentation.
+# bcm2835_aux.c
+bcm2835_aux_read(uint64_t addr, uint32_t value) "read addr 0x%"PRIx64" value 0x%x"
+bcm2835_aux_write(uint64_t addr, uint32_t value) "read addr 0x%"PRIx64" value 0x%x"
+
# parallel.c
parallel_ioport_read(const char *desc, uint16_t addr, uint8_t value) "read [%s] addr 0x%02x val 0x%02x"
parallel_ioport_write(const char *desc, uint16_t addr, uint8_t value) "write [%s] addr 0x%02x val 0x%02x"
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 07/19] hw/misc/bcm2835_mbox: Add trace events
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 06/19] hw/char/bcm2835_aux: Add trace events Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-10-08 11:32 ` Alex Bennée
2019-09-26 17:34 ` [PATCH 08/19] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor Philippe Mathieu-Daudé
` (14 subsequent siblings)
21 siblings, 1 reply; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Add trace events for read/write accesses and IRQ.
Properties are structures used for the ARM particular MBOX.
Since one call in bcm2835_property.c concerns the mbox block,
name this trace event in the same bcm2835_mbox* namespace.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/misc/bcm2835_mbox.c | 5 +++++
hw/misc/bcm2835_property.c | 2 ++
hw/misc/trace-events | 6 ++++++
3 files changed, 13 insertions(+)
diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c
index 77285624c9..77d2d80706 100644
--- a/hw/misc/bcm2835_mbox.c
+++ b/hw/misc/bcm2835_mbox.c
@@ -15,6 +15,7 @@
#include "migration/vmstate.h"
#include "qemu/log.h"
#include "qemu/module.h"
+#include "trace.h"
#define MAIL0_PEEK 0x90
#define MAIL0_SENDER 0x94
@@ -123,6 +124,7 @@ static void bcm2835_mbox_update(BCM2835MboxState *s)
set = true;
}
}
+ trace_bcm2835_mbox_irq(set);
qemu_set_irq(s->arm_irq, set);
}
@@ -178,8 +180,10 @@ static uint64_t bcm2835_mbox_read(void *opaque, hwaddr offset, unsigned size)
default:
qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
+ trace_bcm2835_mbox_read(size, offset, res);
return 0;
}
+ trace_bcm2835_mbox_read(size, offset, res);
bcm2835_mbox_update(s);
@@ -195,6 +199,7 @@ static void bcm2835_mbox_write(void *opaque, hwaddr offset,
offset &= 0xff;
+ trace_bcm2835_mbox_write(size, offset, value);
switch (offset) {
case MAIL0_SENDER:
break;
diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
index 43a5465c5d..0eea2e20f7 100644
--- a/hw/misc/bcm2835_property.c
+++ b/hw/misc/bcm2835_property.c
@@ -13,6 +13,7 @@
#include "sysemu/dma.h"
#include "qemu/log.h"
#include "qemu/module.h"
+#include "trace.h"
/* https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface */
@@ -283,6 +284,7 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
break;
}
+ trace_bcm2835_mbox_property(tag, bufsize, resplen);
if (tag == 0) {
break;
}
diff --git a/hw/misc/trace-events b/hw/misc/trace-events
index 74276225f8..1deb1d08c1 100644
--- a/hw/misc/trace-events
+++ b/hw/misc/trace-events
@@ -143,3 +143,9 @@ armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU wri
# aspeed_xdma.c
aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64
+
+# bcm2835_mbox.c
+bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
+bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
+bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
+bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 08/19] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 07/19] hw/misc/bcm2835_mbox: " Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-10-08 11:36 ` Alex Bennée
2019-10-14 15:37 ` Peter Maydell
2019-09-26 17:34 ` [PATCH 09/19] hw/arm/bcm2835_peripherals: Use the thermal sensor block Philippe Mathieu-Daudé
` (13 subsequent siblings)
21 siblings, 2 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
We will soon implement the SYS_timer. This timer is used by Linux
in the thermal subsystem, so once available, the subsystem will be
enabled and poll the temperature sensors. We need to provide the
minimum required to keep Linux booting.
Add a dummy thermal sensor returning ~25°C based on:
https://github.com/raspberrypi/linux/blob/rpi-5.3.y/drivers/thermal/broadcom/bcm2835_thermal.c
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
checkpatch warning:
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
This is OK because the regex are:
F: hw/*/bcm283*
F: include/hw/*/bcm283*
---
hw/misc/Makefile.objs | 1 +
hw/misc/bcm2835_thermal.c | 109 ++++++++++++++++++++++++++++++
include/hw/misc/bcm2835_thermal.h | 27 ++++++++
3 files changed, 137 insertions(+)
create mode 100644 hw/misc/bcm2835_thermal.c
create mode 100644 include/hw/misc/bcm2835_thermal.h
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index a150680966..c89f3816a5 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -53,6 +53,7 @@ common-obj-$(CONFIG_OMAP) += omap_tap.o
common-obj-$(CONFIG_RASPI) += bcm2835_mbox.o
common-obj-$(CONFIG_RASPI) += bcm2835_property.o
common-obj-$(CONFIG_RASPI) += bcm2835_rng.o
+common-obj-$(CONFIG_RASPI) += bcm2835_thermal.o
common-obj-$(CONFIG_SLAVIO) += slavio_misc.o
common-obj-$(CONFIG_ZYNQ) += zynq_slcr.o
common-obj-$(CONFIG_ZYNQ) += zynq-xadc.o
diff --git a/hw/misc/bcm2835_thermal.c b/hw/misc/bcm2835_thermal.c
new file mode 100644
index 0000000000..bac23f21ea
--- /dev/null
+++ b/hw/misc/bcm2835_thermal.c
@@ -0,0 +1,109 @@
+/*
+ * BCM2835 dummy thermal sensor
+ *
+ * Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "hw/misc/bcm2835_thermal.h"
+#include "qemu/log.h"
+#include "qapi/error.h"
+#include "hw/registerfields.h"
+
+REG32(CTL, 0)
+FIELD(CTL, POWER_DOWN, 0, 1)
+FIELD(CTL, RESET, 1, 1)
+FIELD(CTL, BANDGAP_CTRL, 2, 3)
+FIELD(CTL, INTERRUPT_ENABLE, 5, 1)
+FIELD(CTL, DIRECT, 6, 1)
+FIELD(CTL, INTERRUPT_CLEAR, 7, 1)
+FIELD(CTL, HOLD, 8, 10)
+FIELD(CTL, RESET_DELAY, 18, 8)
+FIELD(CTL, REGULATOR_ENABLE, 26, 1)
+
+REG32(STAT, 4)
+FIELD(STAT, DATA, 0, 10)
+FIELD(STAT, VALID, 10, 1)
+FIELD(STAT, INTERRUPT, 11, 1)
+
+#define THERMAL_OFFSET_C 412
+#define THERMAL_COEFF (-0.538f)
+
+static uint16_t bcm2835_thermal_temp2adc(int temp_C)
+{
+ return (temp_C - THERMAL_OFFSET_C) / THERMAL_COEFF;
+}
+
+static uint64_t bcm2835_thermal_read(void *opaque, hwaddr addr, unsigned size)
+{
+ Bcm2835ThermalState *s = BCM2835_THERMAL(opaque);
+ uint32_t val = 0;
+
+ switch (addr) {
+ case A_CTL:
+ val = s->ctl;
+ break;
+ case A_STAT:
+ val = FIELD_DP32(bcm2835_thermal_temp2adc(25), STAT, VALID, true);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ return val;
+}
+
+static void bcm2835_thermal_write(void *opaque, hwaddr addr,
+ uint64_t value, unsigned size)
+{
+ Bcm2835ThermalState *s = BCM2835_THERMAL(opaque);
+
+ switch (addr) {
+ case A_CTL:
+ s->ctl = value;
+ break;
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: write 0x%" PRIx64
+ " to 0x%" HWADDR_PRIx "\n",
+ __func__, value, addr);
+ }
+}
+
+static const MemoryRegionOps bcm2835_thermal_ops = {
+ .read = bcm2835_thermal_read,
+ .write = bcm2835_thermal_write,
+ .impl.max_access_size = 4,
+ .valid.min_access_size = 4,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
+
+static void bcm2835_thermal_realize(DeviceState *dev, Error **errp)
+{
+ Bcm2835ThermalState *s = BCM2835_THERMAL(dev);
+
+ memory_region_init_io(&s->iomem, OBJECT(s), &bcm2835_thermal_ops,
+ s, TYPE_BCM2835_THERMAL, 8);
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem);
+}
+
+static void bcm2835_thermal_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->realize = bcm2835_thermal_realize;
+}
+
+static const TypeInfo bcm2835_thermal_info = {
+ .name = TYPE_BCM2835_THERMAL,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(Bcm2835ThermalState),
+ .class_init = bcm2835_thermal_class_init,
+};
+
+static void bcm2835_thermal_register_types(void)
+{
+ type_register_static(&bcm2835_thermal_info);
+}
+
+type_init(bcm2835_thermal_register_types)
diff --git a/include/hw/misc/bcm2835_thermal.h b/include/hw/misc/bcm2835_thermal.h
new file mode 100644
index 0000000000..f85cce7214
--- /dev/null
+++ b/include/hw/misc/bcm2835_thermal.h
@@ -0,0 +1,27 @@
+/*
+ * BCM2835 dummy thermal sensor
+ *
+ * Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#ifndef HW_MISC_BCM2835_THERMAL_H
+#define HW_MISC_BCM2835_THERMAL_H
+
+#include "hw/qdev-properties.h"
+#include "hw/sysbus.h"
+
+#define TYPE_BCM2835_THERMAL "bcm2835-thermal"
+
+#define BCM2835_THERMAL(obj) \
+ OBJECT_CHECK(Bcm2835ThermalState, (obj), TYPE_BCM2835_THERMAL)
+
+typedef struct {
+ /*< private >*/
+ SysBusDevice parent_obj;
+ /*< public >*/
+ MemoryRegion iomem;
+ uint32_t ctl;
+} Bcm2835ThermalState;
+
+#endif
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 09/19] hw/arm/bcm2835_peripherals: Use the thermal sensor block
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 08/19] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-09-27 21:51 ` Alistair Francis
2019-09-26 17:34 ` [PATCH 10/19] hw/timer/bcm2835: Add the BCM2835 SYS_timer Philippe Mathieu-Daudé
` (12 subsequent siblings)
21 siblings, 1 reply; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Map the thermal sensor in the BCM2835 block.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/bcm2835_peripherals.c | 13 +++++++++++++
include/hw/arm/bcm2835_peripherals.h | 2 ++
include/hw/arm/raspi_platform.h | 1 +
3 files changed, 16 insertions(+)
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index fdcf616c56..70bf927a02 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -111,6 +111,10 @@ static void bcm2835_peripherals_init(Object *obj)
object_property_add_const_link(OBJECT(&s->dma), "dma-mr",
OBJECT(&s->gpu_bus_mr), &error_abort);
+ /* Thermal */
+ sysbus_init_child_obj(obj, "thermal", &s->thermal, sizeof(s->thermal),
+ TYPE_BCM2835_THERMAL);
+
/* GPIO */
sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio),
TYPE_BCM2835_GPIO);
@@ -321,6 +325,15 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
INTERRUPT_DMA0 + n));
}
+ /* THERMAL */
+ object_property_set_bool(OBJECT(&s->thermal), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ memory_region_add_subregion(&s->peri_mr, THERMAL_OFFSET,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0));
+
/* GPIO */
object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err);
if (err) {
diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
index 62a4c7b559..be7ad9b499 100644
--- a/include/hw/arm/bcm2835_peripherals.h
+++ b/include/hw/arm/bcm2835_peripherals.h
@@ -20,6 +20,7 @@
#include "hw/misc/bcm2835_property.h"
#include "hw/misc/bcm2835_rng.h"
#include "hw/misc/bcm2835_mbox.h"
+#include "hw/misc/bcm2835_thermal.h"
#include "hw/sd/sdhci.h"
#include "hw/sd/bcm2835_sdhost.h"
#include "hw/gpio/bcm2835_gpio.h"
@@ -53,6 +54,7 @@ typedef struct BCM2835PeripheralState {
SDHCIState sdhci;
BCM2835SDHostState sdhost;
BCM2835GpioState gpio;
+ Bcm2835ThermalState thermal;
UnimplementedDeviceState i2s;
UnimplementedDeviceState spi[1];
UnimplementedDeviceState i2c[3];
diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
index cdcbca943f..61b04a1bd4 100644
--- a/include/hw/arm/raspi_platform.h
+++ b/include/hw/arm/raspi_platform.h
@@ -48,6 +48,7 @@
#define SPI0_OFFSET 0x204000
#define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
#define OTP_OFFSET 0x20f000
+#define THERMAL_OFFSET 0x212000
#define BSC_SL_OFFSET 0x214000 /* SPI slave */
#define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
#define EMMC1_OFFSET 0x300000
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 10/19] hw/timer/bcm2835: Add the BCM2835 SYS_timer
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 09/19] hw/arm/bcm2835_peripherals: Use the thermal sensor block Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-10-08 14:52 ` Alex Bennée
2019-09-26 17:34 ` [PATCH 11/19] hw/arm/bcm2835_peripherals: Use the SYS_timer Philippe Mathieu-Daudé
` (11 subsequent siblings)
21 siblings, 1 reply; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Add the 64-bit free running timer. Do not model the COMPARE register
(no IRQ generated).
This timer is used by U-Boot and recent Linux kernels:
https://github.com/u-boot/u-boot/blob/v2019.07/include/configs/rpi.h#L19
Datasheet used:
https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
Since which kernels? 4.19 seems to use it.
checkpatch warning:
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
This is OK because the regex are:
F: hw/*/bcm283*
F: include/hw/*/bcm283*
---
hw/timer/Makefile.objs | 1 +
hw/timer/bcm2835_systmr.c | 100 ++++++++++++++++++++++++++++++
hw/timer/trace-events | 4 ++
include/hw/timer/bcm2835_systmr.h | 30 +++++++++
4 files changed, 135 insertions(+)
create mode 100644 hw/timer/bcm2835_systmr.c
create mode 100644 include/hw/timer/bcm2835_systmr.h
diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
index 123d92c969..696cda5905 100644
--- a/hw/timer/Makefile.objs
+++ b/hw/timer/Makefile.objs
@@ -47,3 +47,4 @@ common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
common-obj-$(CONFIG_CMSDK_APB_TIMER) += cmsdk-apb-timer.o
common-obj-$(CONFIG_CMSDK_APB_DUALTIMER) += cmsdk-apb-dualtimer.o
common-obj-$(CONFIG_MSF2) += mss-timer.o
+common-obj-$(CONFIG_RASPI) += bcm2835_systmr.o
diff --git a/hw/timer/bcm2835_systmr.c b/hw/timer/bcm2835_systmr.c
new file mode 100644
index 0000000000..c4d2b488bd
--- /dev/null
+++ b/hw/timer/bcm2835_systmr.c
@@ -0,0 +1,100 @@
+/*
+ * BCM2835 SYS timer emulation
+ *
+ * Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 or
+ * (at your option) any later version.
+ *
+ * Datasheet: BCM2835 ARM Peripherals (C6357-M-1398)
+ * https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
+ *
+ * Only the free running 64-bit counter is implemented.
+ * The 4 COMPARE registers and the interruption are not implemented.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/timer.h"
+#include "qemu/log.h"
+#include "hw/registerfields.h"
+#include "hw/timer/bcm2835_systmr.h"
+#include "trace.h"
+
+REG32(CTRL_STATUS, 0x00)
+REG32(COUNTER_LOW, 0x04)
+REG32(COUNTER_HIGH, 0x08)
+REG32(COMPARE0, 0x0c)
+REG32(COMPARE1, 0x10)
+REG32(COMPARE2, 0x14)
+REG32(COMPARE3, 0x18)
+
+static uint64_t bcm2835_sys_timer_read(void *opaque, hwaddr offset,
+ unsigned size)
+{
+ uint64_t r = 0;
+
+ switch (offset) {
+ case A_CTRL_STATUS:
+ case A_COMPARE0 ... A_COMPARE3:
+ break;
+ case A_COUNTER_LOW:
+ case A_COUNTER_HIGH:
+ /* Free running counter at 1MHz */
+ r = qemu_clock_get_us(QEMU_CLOCK_VIRTUAL);
+ r >>= 8 * (offset - A_COUNTER_LOW);
+ r &= UINT32_MAX;
+ break;
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: bad offset 0x%" HWADDR_PRIx "\n",
+ __func__, offset);
+ break;
+ }
+ trace_bcm2835_sys_timer_read(offset, r);
+
+ return r;
+}
+
+static void bcm2835_sys_timer_write(void *opaque, hwaddr offset,
+ uint64_t value, unsigned size)
+{
+ trace_bcm2835_sys_timer_write(offset, value);
+
+ qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n",
+ __func__, offset);
+}
+
+static const MemoryRegionOps bcm2835_sys_timer_ops = {
+ .read = bcm2835_sys_timer_read,
+ .write = bcm2835_sys_timer_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .impl = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+};
+
+static void bcm2835_sys_timer_init(Object *obj)
+{
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ BCM2835SysTimerState *s = BCM2835_SYSTIMER(obj);
+
+ memory_region_init_io(&s->iomem, obj, &bcm2835_sys_timer_ops,
+ s, "bcm2835-sys-timer", 0x20);
+ sysbus_init_mmio(sbd, &s->iomem);
+ sysbus_init_irq(sbd, &s->irq);
+}
+
+static const TypeInfo bcm2835_sys_timer_info = {
+ .name = TYPE_BCM2835_SYSTIMER,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(BCM2835SysTimerState),
+ .instance_init = bcm2835_sys_timer_init,
+};
+
+static void bcm2835_sys_timer_register_types(void)
+{
+ type_register_static(&bcm2835_sys_timer_info);
+}
+
+type_init(bcm2835_sys_timer_register_types);
diff --git a/hw/timer/trace-events b/hw/timer/trace-events
index db02a9142c..81967a1a19 100644
--- a/hw/timer/trace-events
+++ b/hw/timer/trace-events
@@ -87,3 +87,7 @@ pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
pl031_alarm_raised(void) "alarm raised"
pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
+
+# bcm2835_systmr.c
+bcm2835_sys_timer_read(uint64_t offset, uint64_t data) "timer read: offset 0x%" PRIx64 " data 0x%" PRIx64
+bcm2835_sys_timer_write(uint64_t offset, uint64_t data) "timer write: offset 0x%" PRIx64 " data 0x%" PRIx64
diff --git a/include/hw/timer/bcm2835_systmr.h b/include/hw/timer/bcm2835_systmr.h
new file mode 100644
index 0000000000..6ac7f8ec5a
--- /dev/null
+++ b/include/hw/timer/bcm2835_systmr.h
@@ -0,0 +1,30 @@
+/*
+ * BCM2835 SYS timer emulation
+ *
+ * Copyright (c) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 or
+ * (at your option) any later version.
+ */
+
+#ifndef BCM2835_SYSTIMER_H
+#define BCM2835_SYSTIMER_H
+
+#include "hw/sysbus.h"
+#include "hw/irq.h"
+
+#define TYPE_BCM2835_SYSTIMER "bcm2835-sys-timer"
+#define BCM2835_SYSTIMER(obj) \
+ OBJECT_CHECK(BCM2835SysTimerState, (obj), TYPE_BCM2835_SYSTIMER)
+
+typedef struct {
+ /*< private >*/
+ SysBusDevice parent_obj;
+
+ /*< public >*/
+ MemoryRegion iomem;
+ qemu_irq irq;
+} BCM2835SysTimerState;
+
+#endif
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 11/19] hw/arm/bcm2835_peripherals: Use the SYS_timer
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 10/19] hw/timer/bcm2835: Add the BCM2835 SYS_timer Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-10-08 15:22 ` Alex Bennée
2019-09-26 17:34 ` [PATCH 12/19] hw/arm/bcm2835_peripherals: Add Clock/Power/Reset Manager blocks Philippe Mathieu-Daudé
` (10 subsequent siblings)
21 siblings, 1 reply; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Connect the recently added SYS_timer.
Now U-Boot does not hang anymore polling a free running counter
stuck at 0.
This timer is also used by the Linux kernel thermal subsystem.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/bcm2835_peripherals.c | 21 ++++++++++++++++++++-
include/hw/arm/bcm2835_peripherals.h | 3 ++-
2 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index 70bf927a02..965f4c1f3d 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -58,6 +58,10 @@ static void bcm2835_peripherals_init(Object *obj)
/* Interrupt Controller */
sysbus_init_child_obj(obj, "ic", &s->ic, sizeof(s->ic), TYPE_BCM2835_IC);
+ /* SYS Timer */
+ sysbus_init_child_obj(obj, "systimer", &s->systmr, sizeof(s->systmr),
+ TYPE_BCM2835_SYSTIMER);
+
/* UART0 */
sysbus_init_child_obj(obj, "uart0", &s->uart0, sizeof(s->uart0),
TYPE_PL011);
@@ -171,6 +175,22 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
+ /* Sys Timer */
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ object_property_set_bool(OBJECT(&s->systmr), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0));
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0,
+ qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
+ INTERRUPT_ARM_TIMER));
+
/* UART0 */
qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
object_property_set_bool(OBJECT(&s->uart0), true, "realized", &err);
@@ -352,7 +372,6 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
}
create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
- create_unimp(s, &s->systmr, "bcm2835-systimer", ST_OFFSET, 0x20);
create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
index be7ad9b499..5b9fc89453 100644
--- a/include/hw/arm/bcm2835_peripherals.h
+++ b/include/hw/arm/bcm2835_peripherals.h
@@ -24,6 +24,7 @@
#include "hw/sd/sdhci.h"
#include "hw/sd/bcm2835_sdhost.h"
#include "hw/gpio/bcm2835_gpio.h"
+#include "hw/timer/bcm2835_systmr.h"
#include "hw/misc/unimp.h"
#define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
@@ -39,7 +40,7 @@ typedef struct BCM2835PeripheralState {
MemoryRegion ram_alias[4];
qemu_irq irq, fiq;
- UnimplementedDeviceState systmr;
+ BCM2835SysTimerState systmr;
UnimplementedDeviceState armtmr;
UnimplementedDeviceState cprman;
UnimplementedDeviceState a2w;
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 12/19] hw/arm/bcm2835_peripherals: Add Clock/Power/Reset Manager blocks
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (10 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 11/19] hw/arm/bcm2835_peripherals: Use the SYS_timer Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-10-01 9:51 ` Philippe Mathieu-Daudé
2019-09-26 17:34 ` [PATCH 13/19] hw/arm/raspi: Define various blocks base addresses Philippe Mathieu-Daudé
` (9 subsequent siblings)
21 siblings, 1 reply; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Add basic support for BCM283x CPRMAN. Provide support for reading and
writing CPRMAN registers and initialize registers with sensible default
values. During runtime retain any written values.
Basic CPRMAN support is necessary and sufficient to boot Linux on raspi2
and raspi3 systems.
Based on:
https://github.com/raspberrypi/linux/blob/rpi-5.3.y/drivers/clk/bcm/clk-bcm2835.c
https://github.com/u-boot/u-boot/blob/v2019.07/include/dt-bindings/clock/bcm2835.h
https://github.com/arisena-com/rpi_src/blob/master/apps/i2s_test/src/i2s_test.c#L273
Co-developed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/bcm2835_peripherals.c | 20 +-
hw/misc/Makefile.objs | 1 +
hw/misc/bcm2835_cprman.c | 383 +++++++++++++++++++++++++++
hw/misc/trace-events | 8 +
include/hw/arm/bcm2835_peripherals.h | 4 +-
include/hw/misc/bcm2835_cprman.h | 32 +++
6 files changed, 444 insertions(+), 4 deletions(-)
create mode 100644 hw/misc/bcm2835_cprman.c
create mode 100644 include/hw/misc/bcm2835_cprman.h
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index 965f4c1f3d..c887969795 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -62,6 +62,11 @@ static void bcm2835_peripherals_init(Object *obj)
sysbus_init_child_obj(obj, "systimer", &s->systmr, sizeof(s->systmr),
TYPE_BCM2835_SYSTIMER);
+ /* Clock / Power / Reset */
+ object_initialize(&s->cprman, sizeof(s->cprman), TYPE_BCM2835_CPRMAN);
+ object_property_add_child(obj, "cprman", OBJECT(&s->cprman), NULL);
+ qdev_set_parent_bus(DEVICE(&s->cprman), sysbus_get_default());
+
/* UART0 */
sysbus_init_child_obj(obj, "uart0", &s->uart0, sizeof(s->uart0),
TYPE_PL011);
@@ -191,6 +196,19 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
INTERRUPT_ARM_TIMER));
+ /* Clock / Power / Reset */
+ object_property_set_bool(OBJECT(&s->cprman), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0));
+ memory_region_add_subregion(&s->peri_mr, CM_OFFSET,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 1));
+ memory_region_add_subregion(&s->peri_mr, A2W_OFFSET,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 2));
+
/* UART0 */
qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
object_property_set_bool(OBJECT(&s->uart0), true, "realized", &err);
@@ -372,8 +390,6 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
}
create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
- create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
- create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index c89f3816a5..64e717e6b3 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -53,6 +53,7 @@ common-obj-$(CONFIG_OMAP) += omap_tap.o
common-obj-$(CONFIG_RASPI) += bcm2835_mbox.o
common-obj-$(CONFIG_RASPI) += bcm2835_property.o
common-obj-$(CONFIG_RASPI) += bcm2835_rng.o
+common-obj-$(CONFIG_RASPI) += bcm2835_cprman.o
common-obj-$(CONFIG_RASPI) += bcm2835_thermal.o
common-obj-$(CONFIG_SLAVIO) += slavio_misc.o
common-obj-$(CONFIG_ZYNQ) += zynq_slcr.o
diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
new file mode 100644
index 0000000000..6c3b5b6837
--- /dev/null
+++ b/hw/misc/bcm2835_cprman.c
@@ -0,0 +1,383 @@
+/*
+ * BCM2835 Clock/Power/Reset Manager subsystem (poor man's version)
+ *
+ * Copyright (C) 2018 Guenter Roeck <linux@roeck-us.net>
+ * Copyright (C) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/log.h"
+#include "sysemu/runstate.h"
+#include "hw/registerfields.h"
+#include "hw/misc/bcm2835_cprman.h"
+#include "trace.h"
+
+#define CPRMAN_PASSWD 'Z'
+
+FIELD(CPRMAN, PASSWD, 24, 8)
+
+REG32(PM_RSTC, 0x1c)
+REG32(PM_RSTS, 0x20)
+REG32(PM_WDOG, 0x24)
+
+static const char *pm_name(hwaddr addr)
+{
+ addr &= ~3;
+ switch (addr) {
+ case A_PM_RSTC: return "RST_CLR";
+ case A_PM_RSTS: return "RST_SET";
+ case A_PM_WDOG: return "WDG";
+ default:
+ return "UNKN";
+ }
+}
+
+static uint64_t bcm2835_cprman_pm_read(void *opaque, hwaddr addr,
+ unsigned size)
+{
+ uint32_t res = 0;
+
+ trace_bcm2835_cprman_read(size << 3, addr, "PM", pm_name(addr), "", res);
+
+ return res;
+}
+
+static void bcm2835_cprman_pm_write(void *opaque, hwaddr addr,
+ uint64_t value, unsigned size)
+{
+ const char *name;
+
+ if (FIELD_EX32(value, CPRMAN, PASSWD) != CPRMAN_PASSWD) {
+ qemu_log_mask(LOG_GUEST_ERROR, "[CPRMAN]: password key error w%02d"
+ " *0x%04"HWADDR_PRIx" = 0x%"PRIx64"\n",
+ size << 3, addr, value);
+ return;
+ }
+ value &= ~R_CPRMAN_PASSWD_MASK;
+
+ name = pm_name(addr);
+ trace_bcm2835_cprman_write_pm(addr, name, value);
+ if (addr == A_PM_RSTC && value & 0x20) { /* TODO remove 0x20 magic */
+ qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
+ }
+}
+
+static const MemoryRegionOps bcm2835_cprman_pm_ops = {
+ .read = bcm2835_cprman_pm_read,
+ .write = bcm2835_cprman_pm_write,
+ .impl.max_access_size = 4,
+ .valid.min_access_size = 4,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
+
+REG32(CM_CTL, 0)
+FIELD(CM_CTL, SRC, 0, 4)
+FIELD(CM_CTL, ENABLE, 4, 1)
+FIELD(CM_CTL, KILL, 5, 1)
+FIELD(CM_CTL, GATE, 6, 1)
+FIELD(CM_CTL, BUSY, 7, 1)
+FIELD(CM_CTL, BUSYD, 8, 1)
+FIELD(CM_CTL, FRAC, 9, 1)
+
+REG32(CM_DIV, 4)
+FIELD(CM_DIV, FRAC, 0, 12)
+FIELD(CM_DIV, INTEGER, 12, 12)
+
+REG32(CM_OSCCOUNT, 0x100)
+REG32(CM_LOCK, 0x114)
+REG32(CM_EVENT, 0x118)
+REG32(CM_PLLB, 0x170)
+
+/* Bits used by R_CM_CTL_SRC_MASK */
+enum cprman_clock_source {
+ SRC_GND = 0,
+ SRC_OSC = 1,
+ SRC_TEST_DBG0 = 2,
+ SRC_TEST_DBG1 = 3,
+ SRC_PLLA = 4,
+ SRC_PLLC_CORE0 = 5,
+ SRC_PLLD = 6,
+ SRC_PLLH_AUX = 7,
+ SRC_PLLC_CORE1 = 8,
+ SRC_PLLC_CORE2 = 9
+};
+
+static const char *src_name(int src)
+{
+ static const char *src_names[16] = {
+ [SRC_GND] = "GND",
+ [SRC_OSC] = "OSC",
+ [SRC_PLLA] = "PLLA",
+ [SRC_PLLC_CORE0] = "PLLC_CORE0",
+ [SRC_PLLD] = "PLLD",
+ [SRC_PLLH_AUX] = "PLLH_AUX",
+ [SRC_PLLC_CORE1] = "PLLC_CORE1",
+ [SRC_PLLC_CORE2] = "PLLC_CORE2",
+ };
+ return src_names[src] ? src_names[src] : "UNKN";
+}
+
+static const char *ctldiv_names[0x200 / 4] = {
+ [0] = "GENERIC",
+ [1] = "VPU",
+ [2] = "SYS",
+ [3] = "PERIA",
+ [4] = "PERII",
+ [5] = "H264",
+ [6] = "ISP",
+ [7] = "V3D",
+ [8] = "CAM0",
+ [9] = "CAM1",
+ [10] = "CCP2",
+ [11] = "DSI0E",
+ [12] = "DSI0P",
+ [13] = "DPI",
+ [14] = "GP0",
+ [15] = "GP1",
+ [16] = "GP2",
+ [17] = "HSM",
+ [18] = "OTP",
+ [19] = "PCM",
+ [20] = "PWM",
+ [21] = "SLIM",
+ [22] = "SMI",
+ [24] = "TCNT",
+ [25] = "TEC",
+ [26] = "TD0",
+ [27] = "TD1",
+ [28] = "TSENS",
+ [29] = "TIMER",
+ [30] = "UART",
+ [31] = "VEC",
+ [43] = "DSI1E",
+ [44] = "DSI1P",
+ [45] = "DFT",
+ [50] = "PULSE",
+ [53] = "SDC",
+ [54] = "ARM",
+ [55] = "AVEO",
+ [56] = "EMMC",
+};
+
+static const char *cm_name(hwaddr addr)
+{
+ int idx;
+
+ addr &= ~3;
+ switch (addr) {
+ case A_CM_OSCCOUNT: return "OSCCOUNT";
+ case 0x104 ... 0x110:
+ case A_CM_PLLB: return "PLLx";
+ case A_CM_LOCK: return "LOCK";
+ case A_CM_EVENT: return "EVENT";
+ default:
+ idx = addr / 8;
+ return ctldiv_names[idx] ? ctldiv_names[idx] : "UNKN";
+ }
+}
+
+static uint32_t scale(uint32_t value)
+{
+ return (1000ull * value) >> 10;
+}
+
+/*
+ * Available information suggests that CPRMAN registers have default
+ * values which are not overwritten by ROMMON (u-boot). The hardware
+ * default values are unknown at this time.
+ * The default values selected here are necessary and sufficient
+ * to boot Linux directly (on raspi2 and raspi3). The selected
+ * values enable all clocks and set clock rates to match their
+ * parent rates.
+ */
+static uint64_t bcm2835_cprman_cm_read(void *opaque, hwaddr addr,
+ unsigned size)
+{
+ uint32_t res = 0;
+
+ if (addr == A_CM_LOCK) {
+ res = 0b11111 << 8; /* all locked! */
+ } else {
+ switch (addr & 0xf) {
+ case A_CM_CTL:
+ res = SRC_OSC | R_CM_CTL_ENABLE_MASK;
+ break;
+ case A_CM_DIV:
+ res = FIELD_DP32(0, CM_DIV, INTEGER, 1);
+ break;
+ default:
+ qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n",
+ __func__, addr);
+ }
+ }
+ trace_bcm2835_cprman_read(size << 3, addr, "CM", cm_name(addr), "", res);
+
+ return res;
+}
+
+static void bcm2835_cprman_cm_write(void *opaque, hwaddr addr,
+ uint64_t value, unsigned size)
+{
+ const char *name;
+
+ if (FIELD_EX32(value, CPRMAN, PASSWD) != CPRMAN_PASSWD) {
+ qemu_log_mask(LOG_GUEST_ERROR, "[CPRMAN]: password key error w%02d"
+ " *0x%04"HWADDR_PRIx" = 0x%"PRIx64"\n",
+ size << 3, addr, value);
+ return;
+ }
+ value &= ~R_CPRMAN_PASSWD_MASK;
+
+ name = cm_name(addr);
+ switch (addr) {
+ case A_CM_OSCCOUNT:
+ case 0x104 ... 0x110:
+ case A_CM_PLLB:
+ case A_CM_LOCK:
+ case A_CM_EVENT:
+ trace_bcm2835_cprman_write_cm_generic(name, value);
+ break;
+ default:
+ switch (addr & 0xf) {
+ case A_CM_CTL:
+ trace_bcm2835_cprman_write_cm_ctl(name, src_name(value & 0xf),
+ FIELD_EX32(value, CM_CTL, ENABLE));
+ break;
+ case A_CM_DIV:
+ trace_bcm2835_cprman_write_cm_div(name,
+ FIELD_EX32(value, CM_DIV, INTEGER),
+ scale(FIELD_EX32(value, CM_DIV, FRAC)));
+ }
+ }
+}
+
+static const MemoryRegionOps bcm2835_cprman_cm_ops = {
+ .read = bcm2835_cprman_cm_read,
+ .write = bcm2835_cprman_cm_write,
+ .impl.max_access_size = 4,
+ .valid.min_access_size = 4,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
+
+REG32(A2W_PLL_CTRL, 0x00)
+FIELD(A2W_PLL_CTRL, NDIV, 0, 12)
+FIELD(A2W_PLL_CTRL, PDIV, 12, 3)
+FIELD(A2W_PLL_CTRL, POWER_DOWN, 16, 1)
+FIELD(A2W_PLL_CTRL, POWER_RESET_DISABLE, 17, 1)
+
+REG32(A2W_PLL_ANA0, 0x10)
+
+FIELD(A2W_PLL_FRAC, DIV, 0, 20)
+
+FIELD(A2W_PLL_CHAN, DIV, 0, 8)
+FIELD(A2W_PLL_CHAN, DISABLE, 8, 1)
+
+static const char *a2w_name(hwaddr addr)
+{
+ if (addr >= 0x300) {
+ return "CHANx";
+ }
+ if (addr >= 0x200) {
+ return "FRACx";
+ }
+ switch (addr & 0x1f) {
+ case A_A2W_PLL_CTRL:
+ return "CTRL";
+ case A_A2W_PLL_ANA0:
+ return "ANA0";
+ default:
+ return "UNKN";
+ }
+}
+
+static const char *pll_name(int idx)
+{
+ static const char *pll_names[8] = {
+ [0] = "PLLA",
+ [1] = "PLLC",
+ [2] = "PLLD",
+ [3] = "PLLH",
+ [7] = "PLLB",
+ };
+ return pll_names[idx] ? pll_names[idx] : "UNKN";
+}
+
+static uint64_t bcm2835_cprman_a2w_read(void *opaque, hwaddr addr,
+ unsigned size)
+{
+ uint32_t res = 0;
+
+ if (addr < 0x200) {
+ /* Power */
+ switch (addr & 0x1f) {
+ case A_A2W_PLL_CTRL:
+ res = R_A2W_PLL_CTRL_POWER_DOWN_MASK; /* On */
+ break;
+ case A_A2W_PLL_ANA0:
+ break;
+ }
+ } else {
+ /* addr < 0x300 is FREQ, else CHANNEL */
+ qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n",
+ __func__, addr);
+ }
+ trace_bcm2835_cprman_read(size << 3, addr, "A2W", a2w_name(addr),
+ pll_name((addr >> 5) & 7), res);
+
+ return res;
+}
+
+static void bcm2835_cprman_a2w_write(void *opaque, hwaddr addr,
+ uint64_t value, unsigned size)
+{
+ if (FIELD_EX32(value, CPRMAN, PASSWD) != CPRMAN_PASSWD) {
+ qemu_log_mask(LOG_GUEST_ERROR, "[CPRMAN]: password key error w%02d"
+ " *0x%04"HWADDR_PRIx" = 0x%"PRIx64"\n",
+ size << 3, addr, value);
+ return;
+ }
+ value &= ~R_CPRMAN_PASSWD_MASK;
+
+ trace_bcm2835_cprman_write_a2w(addr, a2w_name(addr),
+ pll_name((addr >> 5) & 7), value);
+}
+
+static const MemoryRegionOps bcm2835_cprman_a2w_ops = {
+ .read = bcm2835_cprman_a2w_read,
+ .write = bcm2835_cprman_a2w_write,
+ .impl.max_access_size = 4,
+ .valid.min_access_size = 4,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
+
+static void bcm2835_cprman_init(Object *obj)
+{
+ BCM2835CprmanState *s = BCM2835_CPRMAN(obj);
+
+ memory_region_init_io(&s->iomem.pm, obj, &bcm2835_cprman_pm_ops, s,
+ TYPE_BCM2835_CPRMAN "-pm", 0x1000);
+ memory_region_init_io(&s->iomem.cm, obj, &bcm2835_cprman_cm_ops, s,
+ TYPE_BCM2835_CPRMAN "-cm", 0x1000);
+ memory_region_init_io(&s->iomem.a2w, obj, &bcm2835_cprman_a2w_ops, s,
+ TYPE_BCM2835_CPRMAN "-a2w", 0x1000);
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem.pm);
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem.cm);
+ sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem.a2w);
+}
+
+static TypeInfo bcm2835_cprman_info = {
+ .name = TYPE_BCM2835_CPRMAN,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(BCM2835CprmanState),
+ .instance_init = bcm2835_cprman_init,
+};
+
+static void bcm2835_cprman_register_types(void)
+{
+ type_register_static(&bcm2835_cprman_info);
+}
+
+type_init(bcm2835_cprman_register_types)
diff --git a/hw/misc/trace-events b/hw/misc/trace-events
index 1deb1d08c1..30d33e2e1d 100644
--- a/hw/misc/trace-events
+++ b/hw/misc/trace-events
@@ -149,3 +149,11 @@ bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write
bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
+
+# bcm2835_cprman.c
+bcm2835_cprman_read(unsigned size, uint64_t offset, const char *reg_type, const char *reg_name1, const char *reg_name2, uint32_t value) "cprman: rd%u @0x%03" PRIx64 " %s %s.%s val:0x%x"
+bcm2835_cprman_write_pm(uint64_t offset, const char *reg_name, uint32_t value) "pm: wr @0x%03" PRIx64 " %s val:0x%x"
+bcm2835_cprman_write_cm_generic(const char *reg_name, uint32_t val) "cprman: wr %s 0x%08x"
+bcm2835_cprman_write_cm_div(const char *reg_name, uint32_t v0, uint32_t v1) "cprman: wr %s.DIV float:%u.%u"
+bcm2835_cprman_write_cm_ctl(const char *reg_name, const char *src, uint32_t ena) "cprman: wr %s.CTL src:%s enabled:%u"
+bcm2835_cprman_write_a2w(uint64_t offset, const char *reg_name, const char *pll_name, uint32_t value) "a2w: wr @0x%03" PRIx64 " %s.%s val:0x%x"
diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
index 5b9fc89453..b4360ca1a8 100644
--- a/include/hw/arm/bcm2835_peripherals.h
+++ b/include/hw/arm/bcm2835_peripherals.h
@@ -19,6 +19,7 @@
#include "hw/intc/bcm2835_ic.h"
#include "hw/misc/bcm2835_property.h"
#include "hw/misc/bcm2835_rng.h"
+#include "hw/misc/bcm2835_cprman.h"
#include "hw/misc/bcm2835_mbox.h"
#include "hw/misc/bcm2835_thermal.h"
#include "hw/sd/sdhci.h"
@@ -42,8 +43,7 @@ typedef struct BCM2835PeripheralState {
BCM2835SysTimerState systmr;
UnimplementedDeviceState armtmr;
- UnimplementedDeviceState cprman;
- UnimplementedDeviceState a2w;
+ BCM2835CprmanState cprman;
PL011State uart0;
BCM2835AuxState aux;
BCM2835FBState fb;
diff --git a/include/hw/misc/bcm2835_cprman.h b/include/hw/misc/bcm2835_cprman.h
new file mode 100644
index 0000000000..4dd2c8323b
--- /dev/null
+++ b/include/hw/misc/bcm2835_cprman.h
@@ -0,0 +1,32 @@
+/*
+ * BCM2835 Clock/Power/Reset Manager subsystem (poor man's version)
+ *
+ * Copyright (C) 2018 Guenter Roeck <linux@roeck-us.net>
+ * Copyright (C) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#ifndef BCM2835_CPRMAN_H
+#define BCM2835_CPRMAN_H
+
+#include "hw/sysbus.h"
+
+#define TYPE_BCM2835_CPRMAN "bcm2835-cprman"
+#define BCM2835_CPRMAN(obj) \
+ OBJECT_CHECK(BCM2835CprmanState, (obj), TYPE_BCM2835_CPRMAN)
+
+typedef struct {
+ /*< private >*/
+ SysBusDevice parent_obj;
+ /*< public >*/
+
+ struct {
+ MemoryRegion pm;
+ MemoryRegion cm;
+ MemoryRegion a2w;
+ } iomem;
+} BCM2835CprmanState;
+
+#endif
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 13/19] hw/arm/raspi: Define various blocks base addresses
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (11 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 12/19] hw/arm/bcm2835_peripherals: Add Clock/Power/Reset Manager blocks Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-10-08 15:32 ` Alex Bennée
2019-09-26 17:34 ` [PATCH 14/19] python/qemu/machine: Allow to use other serial consoles than default Philippe Mathieu-Daudé
` (8 subsequent siblings)
21 siblings, 1 reply; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
The Raspberry firmware is closed-source. While running it, it
accesses various I/O registers. Logging these accesses as UNIMP
(unimplemented) help to understand what the firmware is doing
(ideally we want it able to boot a Linux kernel).
Document various blocks we might use later.
Adresses and names based on:
https://github.com/hermanhermitage/videocoreiv/wiki/MMIO-Register-map
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
Now the header is incorrect, should I add that in another file or
update the header?
* These definitions are derived from those in Raspbian Linux at
* arch/arm/mach-{bcm2708,bcm2709}/include/mach/platform.h
* where they carry the following notice:
*
* Copyright (C) 2010 Broadcom
---
include/hw/arm/raspi_platform.h | 47 +++++++++++++++++++++++++++------
1 file changed, 39 insertions(+), 8 deletions(-)
diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
index 61b04a1bd4..8bcf1c7c93 100644
--- a/include/hw/arm/raspi_platform.h
+++ b/include/hw/arm/raspi_platform.h
@@ -26,14 +26,19 @@
#define HW_ARM_RASPI_PLATFORM_H
#define MSYNC_OFFSET 0x0000 /* Multicore Sync Block */
-#define IC0_OFFSET 0x2000
+#define CCPT_OFFSET 0x1000 /* Compact Camera Port 2 TX */
+#define INTE_OFFSET 0x2000 /* VC Interrupt controller */
#define ST_OFFSET 0x3000 /* System Timer */
+#define TXP_OFFSET 0x4000
+#define JPEG_OFFSET 0x5000
#define MPHI_OFFSET 0x6000 /* Message-based Parallel Host Intf. */
#define DMA_OFFSET 0x7000 /* DMA controller, channels 0-14 */
-#define ARM_OFFSET 0xB000 /* BCM2708 ARM control block */
+#define ARBA_OFFSET 0x9000
+#define BRDG_OFFSET 0xa000
+#define ARM_OFFSET 0xB000 /* ARM control block */
#define ARMCTRL_OFFSET (ARM_OFFSET + 0x000)
#define ARMCTRL_IC_OFFSET (ARM_OFFSET + 0x200) /* Interrupt controller */
-#define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 */
+#define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 (SP804) */
#define ARMCTRL_0_SBM_OFFSET (ARM_OFFSET + 0x800) /* User 0 (ARM) Semaphores
* Doorbells & Mailboxes */
#define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
@@ -42,24 +47,50 @@
#define AVS_OFFSET 0x103000 /* Audio Video Standard */
#define RNG_OFFSET 0x104000
#define GPIO_OFFSET 0x200000
-#define UART0_OFFSET 0x201000
-#define MMCI0_OFFSET 0x202000
-#define I2S_OFFSET 0x203000
-#define SPI0_OFFSET 0x204000
+#define UART0_OFFSET 0x201000 /* PL011 */
+#define MMCI0_OFFSET 0x202000 /* Legacy MMC */
+#define I2S_OFFSET 0x203000 /* PCM */
+#define SPI0_OFFSET 0x204000 /* SPI master */
#define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
+#define PIXV0_OFFSET 0x206000
+#define PIXV1_OFFSET 0x207000
+#define DPI_OFFSET 0x208000
+#define DSI0_OFFSET 0x209000 /* Display Serial Interface */
+#define PWM_OFFSET 0x20c000
+#define PERM_OFFSET 0x20d000
+#define TEC_OFFSET 0x20e000
#define OTP_OFFSET 0x20f000
+#define SLIM_OFFSET 0x210000 /* SLIMbus */
+#define CPG_OFFSET 0x211000
#define THERMAL_OFFSET 0x212000
-#define BSC_SL_OFFSET 0x214000 /* SPI slave */
+#define AVSP_OFFSET 0x213000
+#define BSC_SL_OFFSET 0x214000 /* SPI slave (bootrom) */
#define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
#define EMMC1_OFFSET 0x300000
+#define EMMC2_OFFSET 0x340000
+#define HVS_OFFSET 0x400000
#define SMI_OFFSET 0x600000
+#define DSI1_OFFSET 0x700000
+#define UCAM_OFFSET 0x800000
+#define CMI_OFFSET 0x802000
#define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */
#define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */
+#define VECA_OFFSET 0x806000
+#define PIXV2_OFFSET 0x807000
+#define HDMI_OFFSET 0x808000
+#define HDCP_OFFSET 0x809000
+#define ARBR0_OFFSET 0x80a000
#define DBUS_OFFSET 0x900000
#define AVE0_OFFSET 0x910000
#define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */
+#define V3D_OFFSET 0xc00000
#define SDRAMC_OFFSET 0xe00000
+#define L2CC_OFFSET 0xe01000 /* Level 2 Cache controller */
+#define L1CC_OFFSET 0xe02000 /* Level 1 Cache controller */
+#define ARBR1_OFFSET 0xe04000
#define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */
+#define DCRC_OFFSET 0xe07000
+#define AXIP_OFFSET 0xe08000
/* GPU interrupts */
#define INTERRUPT_TIMER0 0
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 14/19] python/qemu/machine: Allow to use other serial consoles than default
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (12 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 13/19] hw/arm/raspi: Define various blocks base addresses Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-09-27 12:54 ` bzt
2019-10-09 15:28 ` Cleber Rosa
2019-09-26 17:34 ` [PATCH 15/19] tests/boot_linux_console: Extract the gunzip() helper Philippe Mathieu-Daudé
` (7 subsequent siblings)
21 siblings, 2 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Currently we are limited to use the first serial console available.
Some machines/guest might use another console than the first one as
the 'boot console'.
To be able to use the N console as default, we simply need to connect
all the N - 1 consoles to the null chardev.
Add an index argument, so we can use a specific serial console as
default.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
python/qemu/machine.py | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/python/qemu/machine.py b/python/qemu/machine.py
index 128a3d1dc2..302b158a18 100644
--- a/python/qemu/machine.py
+++ b/python/qemu/machine.py
@@ -235,6 +235,8 @@ class QEMUMachine(object):
'-display', 'none', '-vga', 'none']
if self._machine is not None:
args.extend(['-machine', self._machine])
+ for i in range(self._console_id):
+ args.extend(['-serial', 'null'])
if self._console_set:
self._console_address = os.path.join(self._temp_dir,
self._name + "-console.sock")
@@ -495,7 +497,7 @@ class QEMUMachine(object):
"""
self._machine = machine_type
- def set_console(self, device_type=None):
+ def set_console(self, device_type=None, console_id=0):
"""
Sets the device type for a console device
@@ -519,6 +521,7 @@ class QEMUMachine(object):
"""
self._console_set = True
self._console_device_type = device_type
+ self._console_id = console_id
@property
def console_socket(self):
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 15/19] tests/boot_linux_console: Extract the gunzip() helper
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (13 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 14/19] python/qemu/machine: Allow to use other serial consoles than default Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-10-08 15:33 ` Alex Bennée
` (2 more replies)
2019-09-26 17:34 ` [PATCH 16/19] tests/boot_linux_console: Add a test for the Raspberry Pi 2 Philippe Mathieu-Daudé
` (6 subsequent siblings)
21 siblings, 3 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
We are going to use the same pattern. Instead of keeping
copy/pasting this code, extract as a local function.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
tests/acceptance/boot_linux_console.py | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
index 8a9a314ab4..079590f0c8 100644
--- a/tests/acceptance/boot_linux_console.py
+++ b/tests/acceptance/boot_linux_console.py
@@ -19,6 +19,11 @@ from avocado.utils import process
from avocado.utils import archive
+def gunzip(in_pathname_gz, out_pathname):
+ with gzip.open(in_pathname_gz, 'rb') as f_in:
+ with open(out_pathname, 'wb') as f_out:
+ shutil.copyfileobj(f_in, f_out)
+
class BootLinuxConsole(Test):
"""
Boots a Linux kernel and checks that the console is operational and the
@@ -166,10 +171,7 @@ class BootLinuxConsole(Test):
initrd_hash = 'bf806e17009360a866bf537f6de66590de349a99'
initrd_path_gz = self.fetch_asset(initrd_url, asset_hash=initrd_hash)
initrd_path = self.workdir + "rootfs.cpio"
-
- with gzip.open(initrd_path_gz, 'rb') as f_in:
- with open(initrd_path, 'wb') as f_out:
- shutil.copyfileobj(f_in, f_out)
+ gunzip(initrd_path_gz, initrd_path)
self.vm.set_machine('malta')
self.vm.set_console()
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 16/19] tests/boot_linux_console: Add a test for the Raspberry Pi 2
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (14 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 15/19] tests/boot_linux_console: Extract the gunzip() helper Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-10-08 15:34 ` Alex Bennée
2019-10-09 15:43 ` Cleber Rosa
2019-09-26 17:34 ` [PATCH 17/19] tests/boot_linux_console: Test the raspi2 UART1 (16550 based) Philippe Mathieu-Daudé
` (5 subsequent siblings)
21 siblings, 2 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Similar to the x86_64/pc test, it boots a Linux kernel on a raspi2
board and verify the serial is working.
The kernel image and DeviceTree blob are built by the Raspbian
project (based on Debian):
https://www.raspbian.org/RaspbianImages
as recommended by the Raspberry Pi project:
https://www.raspberrypi.org/downloads/raspbian/
If ARM is a target being built, "make check-acceptance" will
automatically include this test by the use of the "arch:arm" tags.
Alternatively, this test can be run using:
$ avocado run -t arch:arm tests/acceptance
$ avocado run -t machine:raspi2 tests/acceptance
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v3: removed debug printf (Cleber)
use serial_kernel_cmdline dict
---
tests/acceptance/boot_linux_console.py | 36 ++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
index 079590f0c8..7eaf6cb60e 100644
--- a/tests/acceptance/boot_linux_console.py
+++ b/tests/acceptance/boot_linux_console.py
@@ -318,6 +318,42 @@ class BootLinuxConsole(Test):
self.vm.launch()
self.wait_for_console_pattern('init started: BusyBox')
+ def do_test_arm_raspi2(self, uart_id):
+ """
+ The kernel can be rebuilt using the kernel source referenced
+ and following the instructions on the on:
+ https://www.raspberrypi.org/documentation/linux/kernel/building.md
+ """
+ serial_kernel_cmdline = {
+ 0: 'earlycon=pl011,0x3f201000 console=ttyAMA0',
+ }
+ deb_url = ('http://archive.raspberrypi.org/debian/'
+ 'pool/main/r/raspberrypi-firmware/'
+ 'raspberrypi-kernel_1.20190215-1_armhf.deb')
+ deb_hash = 'cd284220b32128c5084037553db3c482426f3972'
+ deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash)
+ kernel_path = self.extract_from_deb(deb_path, '/boot/kernel7.img')
+ dtb_path = self.extract_from_deb(deb_path, '/boot/bcm2709-rpi-2-b.dtb')
+
+ self.vm.set_machine('raspi2')
+ self.vm.set_console()
+ kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
+ serial_kernel_cmdline[uart_id])
+ self.vm.add_args('-kernel', kernel_path,
+ '-dtb', dtb_path,
+ '-append', kernel_command_line)
+ self.vm.launch()
+ console_pattern = 'Kernel command line: %s' % kernel_command_line
+ self.wait_for_console_pattern(console_pattern)
+
+ def test_arm_raspi2_uart0(self):
+ """
+ :avocado: tags=arch:arm
+ :avocado: tags=machine:raspi2
+ :avocado: tags=device:pl011
+ """
+ self.do_test_arm_raspi2(0)
+
def test_s390x_s390_ccw_virtio(self):
"""
:avocado: tags=arch:s390x
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 17/19] tests/boot_linux_console: Test the raspi2 UART1 (16550 based)
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (15 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 16/19] tests/boot_linux_console: Add a test for the Raspberry Pi 2 Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-10-08 15:35 ` Alex Bennée
2019-10-09 15:54 ` Cleber Rosa
2019-09-26 17:34 ` [PATCH 18/19] tests/boot_linux_console: Boot Linux and run few commands on raspi3 Philippe Mathieu-Daudé
` (4 subsequent siblings)
21 siblings, 2 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
The current do_test_arm_raspi2() case tests the PL011 UART0.
Our model also supports the AUX UART (16550 based).
We can very simply test the UART1 with Linux, modifying the
kernel command line.
Add few lines to expand our previous test and cover the AUX
UART.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
tests/acceptance/boot_linux_console.py | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
index 7eaf6cb60e..33e8f6c635 100644
--- a/tests/acceptance/boot_linux_console.py
+++ b/tests/acceptance/boot_linux_console.py
@@ -326,6 +326,7 @@ class BootLinuxConsole(Test):
"""
serial_kernel_cmdline = {
0: 'earlycon=pl011,0x3f201000 console=ttyAMA0',
+ 1: 'earlycon=uart8250,mmio32,0x3f215040 console=ttyS1,115200'
}
deb_url = ('http://archive.raspberrypi.org/debian/'
'pool/main/r/raspberrypi-firmware/'
@@ -336,7 +337,7 @@ class BootLinuxConsole(Test):
dtb_path = self.extract_from_deb(deb_path, '/boot/bcm2709-rpi-2-b.dtb')
self.vm.set_machine('raspi2')
- self.vm.set_console()
+ self.vm.set_console(console_id=uart_id)
kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
serial_kernel_cmdline[uart_id])
self.vm.add_args('-kernel', kernel_path,
@@ -354,6 +355,14 @@ class BootLinuxConsole(Test):
"""
self.do_test_arm_raspi2(0)
+ def test_arm_raspi2_uart1(self):
+ """
+ :avocado: tags=arch:arm
+ :avocado: tags=machine:raspi2
+ :avocado: tags=device:bcm2835_aux
+ """
+ self.do_test_arm_raspi2(1)
+
def test_s390x_s390_ccw_virtio(self):
"""
:avocado: tags=arch:s390x
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 18/19] tests/boot_linux_console: Boot Linux and run few commands on raspi3
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (16 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 17/19] tests/boot_linux_console: Test the raspi2 UART1 (16550 based) Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-10-09 16:12 ` Cleber Rosa
2019-09-26 17:34 ` [PATCH 19/19] tests/boot_linux_console: Test SDHCI and termal sensor " Philippe Mathieu-Daudé
` (3 subsequent siblings)
21 siblings, 1 reply; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Add a test which boots Linux and run basic commands using the serial
port console.
The kernel image is built by the Debian project:
https://wiki.debian.org/RaspberryPi
The DeviceTree blob comes from the official Raspberry Pi project:
https://www.raspberrypi.org/
The cpio image used comes from the linux-build-test project:
https://github.com/groeck/linux-build-test
This test can be run using:
$ avocado run --show=console,app run -t machine:raspi3 tests/acceptance
console: [ 0.000000] Linux version 4.14.0-3-arm64 (debian-kernel@lists.debian.org) (gcc version 7.2.0 (Debian 7.2.0-18)) #1 SMP Debian 4.14.12-2 (2018-01-06)
console: [ 0.000000] Boot CPU: AArch64 Processor [410fd034]
console: [ 0.000000] Machine model: Raspberry Pi 3 Model B
console: [ 0.000000] earlycon: pl11 at MMIO 0x000000003f201000 (options '')
console: [ 0.000000] bootconsole [pl11] enabled
[...]
console: Starting network: OK
console: Found console ttyAMA0
console: Boot successful.
console: / # cat /proc/cpuinfo
console: processor : 0
console: BogoMIPS : 125.00
console: r : 0x41
console: CPU architecture: 8
console: CPU variant
console: : 0x0
console: CPU part : 0xd03
console: CPU revision : 4
console: / # uname -a
console: Linux buildroot 4.14.0-3-arm64 #1 SMP Debian 4.14.12-2 (2018-01-06) aarch64 GNU/Linux
console: reboot
console: / # reboot
console: / # Found console ttyAMA0
console: Stopping network: OK
console: Saving random seed... done.
console: Stopping logging: OK
console: umount: devtmpfs busy - remounted read-only
console: umount: can't unmount /: Invalid argument
console: The system is going down NOW!
console: Sent SIGTERM to all processes
console: Sent SIGKILL to all processes
console: Requesting system reboot
console: kvm: exiting hardware virtualization
console: reboot: Restarting system
PASS (11.08 s)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
some chars are scrambled on the console...
---
tests/acceptance/boot_linux_console.py | 47 ++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
index 33e8f6c635..2a1a23763e 100644
--- a/tests/acceptance/boot_linux_console.py
+++ b/tests/acceptance/boot_linux_console.py
@@ -363,6 +363,53 @@ class BootLinuxConsole(Test):
"""
self.do_test_arm_raspi2(1)
+ def test_arm_raspi3_initrd_uart0(self):
+ """
+ :avocado: tags=arch:aarch64
+ :avocado: tags=machine:raspi3
+ """
+ deb_url = ('https://snapshot.debian.org/archive/debian/'
+ '20180106T174014Z/pool/main/l/linux/'
+ 'linux-image-4.14.0-3-arm64_4.14.12-2_arm64.deb')
+ deb_hash = 'e71c995de57921921895c1162baea5df527d1c6b'
+ deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash)
+ kernel_path = self.extract_from_deb(deb_path,
+ '/boot/vmlinuz-4.14.0-3-arm64')
+
+ dtb_url = ('https://github.com/raspberrypi/firmware/raw/'
+ '1.20180313/boot/bcm2710-rpi-3-b.dtb')
+ dtb_hash = 'eb14d67133401ef2f93523be7341456d38bfc077'
+ dtb_path = self.fetch_asset(dtb_url, asset_hash=dtb_hash)
+
+ initrd_url = ('https://github.com/groeck/linux-build-test/raw/'
+ '9b6b392ea7bc15f0d6632328d429d31c9c6273da/rootfs/'
+ 'arm64/rootfs.cpio.gz')
+ initrd_hash = '6fd05324f17bb950196b5ad9d3a0fa996339f4cd'
+ initrd_path_gz = self.fetch_asset(initrd_url, asset_hash=initrd_hash)
+ initrd_path = self.workdir + "rootfs.cpio"
+ gunzip(initrd_path_gz, initrd_path)
+
+ self.vm.set_machine('raspi3')
+ self.vm.set_console()
+ kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
+ 'earlycon=pl011,0x3f201000 console=ttyAMA0 ' +
+ 'panic=-1 noreboot')
+ self.vm.add_args('-kernel', kernel_path,
+ '-dtb', dtb_path,
+ '-initrd', initrd_path,
+ '-append', kernel_command_line,
+ '-no-reboot')
+ self.vm.launch()
+
+ self.wait_for_console_pattern('Boot successful.')
+
+ self.exec_command_and_wait_for_pattern('cat /proc/cpuinfo',
+ 'BogoMIPS')
+ self.exec_command_and_wait_for_pattern('uname -a',
+ 'Debian')
+ self.exec_command_and_wait_for_pattern('reboot',
+ 'reboot: Restarting system')
+
def test_s390x_s390_ccw_virtio(self):
"""
:avocado: tags=arch:s390x
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* [PATCH 19/19] tests/boot_linux_console: Test SDHCI and termal sensor on raspi3
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (17 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 18/19] tests/boot_linux_console: Boot Linux and run few commands on raspi3 Philippe Mathieu-Daudé
@ 2019-09-26 17:34 ` Philippe Mathieu-Daudé
2019-10-09 16:23 ` Cleber Rosa
2019-09-26 20:32 ` [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability BALATON Zoltan
` (2 subsequent siblings)
21 siblings, 1 reply; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-26 17:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini, Cheng Xiang,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Add a test which loads the root filesystem on a SD card.
Use a kernel recent enough to also test the thermal sensor.
The kernel image comes from:
https://github.com/sakaki-/bcmrpi3-kernel#description
The cpio image used comes from the linux-build-test project:
https://github.com/groeck/linux-build-test
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
tests/acceptance/boot_linux_console.py | 45 ++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
index 2a1a23763e..5c48cacba8 100644
--- a/tests/acceptance/boot_linux_console.py
+++ b/tests/acceptance/boot_linux_console.py
@@ -410,6 +410,51 @@ class BootLinuxConsole(Test):
self.exec_command_and_wait_for_pattern('reboot',
'reboot: Restarting system')
+ def test_arm_raspi3_initrd_sd_temp(self):
+ """
+ :avocado: tags=arch:aarch64
+ :avocado: tags=machine:raspi3
+ """
+ tarball_url = ('https://github.com/sakaki-/bcmrpi3-kernel/releases/'
+ 'download/4.19.71.20190910/'
+ 'bcmrpi3-kernel-4.19.71.20190910.tar.xz')
+ tarball_hash = '844f117a1a6de0532ba92d2a7bceb5b2acfbb298'
+ tarball_path = self.fetch_asset(tarball_url, asset_hash=tarball_hash)
+ archive.extract(tarball_path, self.workdir)
+ dtb_path = self.workdir + "/boot/bcm2837-rpi-3-b.dtb"
+ kernel_path = self.workdir + "/boot/kernel8.img"
+
+ rootfs_url = ('https://github.com/groeck/linux-build-test/raw/'
+ '9b6b392ea7bc15f0d6632328d429d31c9c6273da/rootfs/'
+ 'arm64/rootfs.ext2.gz')
+ rootfs_hash = 'dbe4136f0b4a0d2180b93fd2a3b9a784f9951d10'
+ rootfs_path_gz = self.fetch_asset(rootfs_url, asset_hash=rootfs_hash)
+ rootfs_path = self.workdir + "rootfs.ext2"
+ gunzip(rootfs_path_gz, rootfs_path)
+
+ self.vm.set_machine('raspi3')
+ self.vm.set_console()
+ kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
+ 'earlycon=pl011,0x3f201000 console=ttyAMA0 ' +
+ 'root=/dev/mmcblk0 rootwait rw ' +
+ 'panic=-1 noreboot')
+ self.vm.add_args('-kernel', kernel_path,
+ '-dtb', dtb_path,
+ '-append', kernel_command_line,
+ '-drive', 'file=' + rootfs_path + ',if=sd,format=raw',
+ '-no-reboot')
+ self.vm.launch()
+
+ self.wait_for_console_pattern('Boot successful.')
+
+ self.exec_command_and_wait_for_pattern('cat /proc/cpuinfo',
+ 'Raspberry Pi 3 Model B')
+ self.exec_command_and_wait_for_pattern('cat /sys/devices/virtual/' +
+ 'thermal/thermal_zone0/temp',
+ '25178')
+ self.exec_command_and_wait_for_pattern('reboot',
+ 'reboot: Restarting system')
+
def test_s390x_s390_ccw_virtio(self):
"""
:avocado: tags=arch:s390x
--
2.20.1
^ permalink raw reply related [flat|nested] 74+ messages in thread
* Re: [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (18 preceding siblings ...)
2019-09-26 17:34 ` [PATCH 19/19] tests/boot_linux_console: Test SDHCI and termal sensor " Philippe Mathieu-Daudé
@ 2019-09-26 20:32 ` BALATON Zoltan
2019-09-27 8:50 ` Philippe Mathieu-Daudé
2019-10-14 15:45 ` Peter Maydell
2019-10-16 9:57 ` Bonnans, Laurent
21 siblings, 1 reply; 74+ messages in thread
From: BALATON Zoltan @ 2019-09-26 20:32 UTC (permalink / raw)
To: Philippe Mathieu-Daudé; +Cc: qemu-arm, qemu-devel, Guenter Roeck
[-- Attachment #1: Type: text/plain, Size: 2130 bytes --]
On Thu, 26 Sep 2019, Philippe Mathieu-Daudé wrote:
> and got it almost working (boots Linux kernel to userland, sadly
> I'm still having timeout issues with the eMMC block).
[...]
> $ make aarch64-softmmu/all check-venv
> $ ./tests/venv/bin/avocado --show=app,console run -t machine:raspi2 -t machine:raspi3 tests/acceptance
> JOB ID : 10bf6593659f0b191941265c19fe3dbf1652c3e7
> JOB LOG : /home/phil/avocado/job-results/job-2019-09-26T19.04-10bf659/job.log
> (1/4) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_raspi2_uart0: \console: [ 0.000000] Booting Linux on physical CPU 0xf00
> console: [ 0.000000] Linux version 4.14.98-v7+ (dom@dom-XPS-13-9370) (gcc version 4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1200 SMP Tue Feb 12 20:27:48 GMT 2019
> console: [ 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d
> console: [ 0.000000] CPU: div instructions available: patching division code
> console: [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
> console: [ 0.000000] OF: fdt: Machine model: Raspberry Pi 2 Model B
> console: [ 0.000000] earlycon: pl11 at MMIO 0x3f201000 (options '')
> console: [ 0.000000] bootconsole [pl11] enabled
> console: [ 0.000000] Memory policy: Data cache writealloc
> console: [ 0.000000] cma: Reserved 8 MiB at 0x3b800000
> console: [ 0.000000] percpu: Embedded 17 pages/cpu @baf2e000 s38720 r8192 d22720 u69632
> console: [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 243600
> console: [ 0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x3f201000 console=ttyAMA0
Not sure what timeouts you get related to eMMC but previously we've found
that panic at boot due to mmcblk not ready is avoided with the "rootwait"
kernel option which does not seem to be present in most of these tests.
(It's also not present in images for real hardware so likely this only
happens with QEMU but not on real hardware. Could it be that real hardware
is slower so timing is different?)
Regards,
BALATON Zoltan
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability
2019-09-26 20:32 ` [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability BALATON Zoltan
@ 2019-09-27 8:50 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-27 8:50 UTC (permalink / raw)
To: BALATON Zoltan; +Cc: qemu-arm, qemu-devel@nongnu.org Developers, Guenter Roeck
On Thu, Sep 26, 2019 at 10:32 PM BALATON Zoltan <balaton@eik.bme.hu> wrote:
> On Thu, 26 Sep 2019, Philippe Mathieu-Daudé wrote:
> > and got it almost working (boots Linux kernel to userland, sadly
> > I'm still having timeout issues with the eMMC block).
> [...]
> > $ make aarch64-softmmu/all check-venv
> > $ ./tests/venv/bin/avocado --show=app,console run -t machine:raspi2 -t machine:raspi3 tests/acceptance
> > JOB ID : 10bf6593659f0b191941265c19fe3dbf1652c3e7
> > JOB LOG : /home/phil/avocado/job-results/job-2019-09-26T19.04-10bf659/job.log
> > (1/4) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_raspi2_uart0: \console: [ 0.000000] Booting Linux on physical CPU 0xf00
> > console: [ 0.000000] Linux version 4.14.98-v7+ (dom@dom-XPS-13-9370) (gcc version 4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1200 SMP Tue Feb 12 20:27:48 GMT 2019
> > console: [ 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d
> > console: [ 0.000000] CPU: div instructions available: patching division code
> > console: [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
> > console: [ 0.000000] OF: fdt: Machine model: Raspberry Pi 2 Model B
> > console: [ 0.000000] earlycon: pl11 at MMIO 0x3f201000 (options '')
> > console: [ 0.000000] bootconsole [pl11] enabled
> > console: [ 0.000000] Memory policy: Data cache writealloc
> > console: [ 0.000000] cma: Reserved 8 MiB at 0x3b800000
> > console: [ 0.000000] percpu: Embedded 17 pages/cpu @baf2e000 s38720 r8192 d22720 u69632
> > console: [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 243600
> > console: [ 0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x3f201000 console=ttyAMA0
>
> Not sure what timeouts you get related to eMMC but previously we've found
> that panic at boot due to mmcblk not ready is avoided with the "rootwait"
> kernel option which does not seem to be present in most of these tests.
> (It's also not present in images for real hardware so likely this only
> happens with QEMU but not on real hardware. Could it be that real hardware
> is slower so timing is different?)
The eMMC issue is on the raspi4.
Looking at my notes, I used "root=/dev/mmcblk0 rootwait", and it hangs with:
Waiting for root device /dev/mmcblk0...
[ 0.898870] mmc-bcm2835 3f300000.mmc: mmc_debug:0 mmc_debug2:0
[ 0.901397] mmc-bcm2835 3f300000.mmc: DMA channel allocated
[ 0.930041] sdhost: log_buf @ (ptrval) (fac53000)
[ 0.969910] mmc1: queuing unknown CIS tuple 0x80 (2 bytes)
[ 0.973894] mmc1: queuing unknown CIS tuple 0x80 (3 bytes)
[ 0.977753] mmc1: queuing unknown CIS tuple 0x80 (3 bytes)
[ 0.981228] mmc0: sdhost-bcm2835 loaded - DMA enabled (>1)
So I guess now Linux improved and use new features not covered by our
hw/sd/bcm2835_sdhost.c model :(
(I have to use recent Linux kernels because older don't support the raspi4).
I'll keep you informed, thanks for the hint!
Phil.
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 14/19] python/qemu/machine: Allow to use other serial consoles than default
2019-09-26 17:34 ` [PATCH 14/19] python/qemu/machine: Allow to use other serial consoles than default Philippe Mathieu-Daudé
@ 2019-09-27 12:54 ` bzt
2019-09-27 13:26 ` Guenter Roeck
2019-10-09 15:28 ` Cleber Rosa
1 sibling, 1 reply; 74+ messages in thread
From: bzt @ 2019-09-27 12:54 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Eduardo Habkost, Laurent Bonnans, Esteban Bosse,
Alistair Francis, qemu-devel, Andrew Baumann,
Marc-André Lureau, qemu-arm, Clement Deschamps, Cleber Rosa,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck
Hi,
On 9/26/19, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> Currently we are limited to use the first serial console available.
I'm not so sure. Right now it works like this:
qemu -serial stdio
Connects the VM's UART0 (PL011) serial console to the host terminal
qemu -serial null -serial stdio
Connects the VM's UART1 (AUX) serial console to the host terminal
I think this is simple and good, please don't remove this option. If
your commit does not influence these cli args, I'm not against it.
bzt
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 14/19] python/qemu/machine: Allow to use other serial consoles than default
2019-09-27 12:54 ` bzt
@ 2019-09-27 13:26 ` Guenter Roeck
2019-09-27 13:36 ` Peter Maydell
0 siblings, 1 reply; 74+ messages in thread
From: Guenter Roeck @ 2019-09-27 13:26 UTC (permalink / raw)
To: bzt
Cc: Peter Maydell, Cheng Xiang, Eduardo Habkost, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, qemu-devel, Marc-André Lureau, qemu-arm,
Clement Deschamps, Cleber Rosa, Paolo Bonzini,
Philippe Mathieu-Daudé,
Pekka Enberg
On Fri, Sep 27, 2019 at 02:54:10PM +0200, bzt wrote:
> Hi,
>
> On 9/26/19, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> > Currently we are limited to use the first serial console available.
>
> I'm not so sure. Right now it works like this:
>
> qemu -serial stdio
> Connects the VM's UART0 (PL011) serial console to the host terminal
>
> qemu -serial null -serial stdio
> Connects the VM's UART1 (AUX) serial console to the host terminal
>
> I think this is simple and good, please don't remove this option. If
> your commit does not influence these cli args, I'm not against it.
>
Agreed. I am using that mechanism (raspi3 uses the second console,
not pl011) in my scripts. Please don't take it away.
Guenter
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 14/19] python/qemu/machine: Allow to use other serial consoles than default
2019-09-27 13:26 ` Guenter Roeck
@ 2019-09-27 13:36 ` Peter Maydell
2019-09-27 14:44 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 74+ messages in thread
From: Peter Maydell @ 2019-09-27 13:36 UTC (permalink / raw)
To: Guenter Roeck
Cc: Cheng Xiang, bzt, Laurent Bonnans, Esteban Bosse,
Alistair Francis, QEMU Developers, Andrew Baumann,
Philippe Mathieu-Daudé,
Marc-André Lureau, qemu-arm, Clement Deschamps, Cleber Rosa,
Paolo Bonzini, Philippe Mathieu-Daudé,
Pekka Enberg, Eduardo Habkost
On Fri, 27 Sep 2019 at 14:26, Guenter Roeck <linux@roeck-us.net> wrote:
>
> On Fri, Sep 27, 2019 at 02:54:10PM +0200, bzt wrote:
> > Hi,
> >
> > On 9/26/19, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> > > Currently we are limited to use the first serial console available.
> >
> > I'm not so sure. Right now it works like this:
> >
> > qemu -serial stdio
> > Connects the VM's UART0 (PL011) serial console to the host terminal
> >
> > qemu -serial null -serial stdio
> > Connects the VM's UART1 (AUX) serial console to the host terminal
> >
> > I think this is simple and good, please don't remove this option. If
> > your commit does not influence these cli args, I'm not against it.
> >
> Agreed. I am using that mechanism (raspi3 uses the second console,
> not pl011) in my scripts. Please don't take it away.
This patch is changing our python infrastructure that invokes
QEMU, not QEMU itself. What Philippe's message means is
"currently our code for running QEMU as part of tests like
this is limited to using the first serial console; this doesn't
work for raspi because we want to use the second (aux) console;
so make the test infrastructure able to handle machines like this."
thanks
-- PMM
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 14/19] python/qemu/machine: Allow to use other serial consoles than default
2019-09-27 13:36 ` Peter Maydell
@ 2019-09-27 14:44 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-09-27 14:44 UTC (permalink / raw)
To: Peter Maydell, Guenter Roeck, Cleber Rosa
Cc: bzt, Laurent Bonnans, Alistair Francis, QEMU Developers,
Eduardo Habkost, Esteban Bosse, qemu-arm, Clement Deschamps,
Andrew Baumann, Marc-André Lureau, Paolo Bonzini,
Cheng Xiang, Pekka Enberg, Philippe Mathieu-Daudé
On 9/27/19 3:36 PM, Peter Maydell wrote:
> On Fri, 27 Sep 2019 at 14:26, Guenter Roeck <linux@roeck-us.net> wrote:
>>
>> On Fri, Sep 27, 2019 at 02:54:10PM +0200, bzt wrote:
>>> Hi,
>>>
>>> On 9/26/19, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>>> Currently we are limited to use the first serial console available.
>>>
>>> I'm not so sure. Right now it works like this:
>>>
>>> qemu -serial stdio
>>> Connects the VM's UART0 (PL011) serial console to the host terminal
>>>
>>> qemu -serial null -serial stdio
>>> Connects the VM's UART1 (AUX) serial console to the host terminal
>>>
>>> I think this is simple and good, please don't remove this option. If
>>> your commit does not influence these cli args, I'm not against it.
>>>
>> Agreed. I am using that mechanism (raspi3 uses the second console,
>> not pl011) in my scripts. Please don't take it away.
>
> This patch is changing our python infrastructure that invokes
> QEMU, not QEMU itself. What Philippe's message means is
> "currently our code for running QEMU as part of tests like
> this is limited to using the first serial console; this doesn't
> work for raspi because we want to use the second (aux) console;
> so make the test infrastructure able to handle machines like this."
Exactly, thanks Peter for clarifying.
I'll try to come with a clearer commit description.
Regards,
Phil.
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 01/19] hw/arm/raspi: Use the IEC binary prefix definitions
2019-09-26 17:34 ` [PATCH 01/19] hw/arm/raspi: Use the IEC binary prefix definitions Philippe Mathieu-Daudé
@ 2019-09-27 21:36 ` Alistair Francis
2019-10-08 8:57 ` Alex Bennée
2019-10-09 0:26 ` Cleber Rosa
2 siblings, 0 replies; 74+ messages in thread
From: Alistair Francis @ 2019-09-27 21:36 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, qemu-devel@nongnu.org Developers,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 10:36 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> IEC binary prefixes ease code review: the unit is explicit.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/arm/raspi.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index 74c062d05e..615d755879 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -230,7 +230,7 @@ static void raspi2_machine_init(MachineClass *mc)
> mc->max_cpus = BCM283X_NCPUS;
> mc->min_cpus = BCM283X_NCPUS;
> mc->default_cpus = BCM283X_NCPUS;
> - mc->default_ram_size = 1024 * 1024 * 1024;
> + mc->default_ram_size = 1 * GiB;
> mc->ignore_memory_transaction_failures = true;
> };
> DEFINE_MACHINE("raspi2", raspi2_machine_init)
> @@ -252,7 +252,7 @@ static void raspi3_machine_init(MachineClass *mc)
> mc->max_cpus = BCM283X_NCPUS;
> mc->min_cpus = BCM283X_NCPUS;
> mc->default_cpus = BCM283X_NCPUS;
> - mc->default_ram_size = 1024 * 1024 * 1024;
> + mc->default_ram_size = 1 * GiB;
> }
> DEFINE_MACHINE("raspi3", raspi3_machine_init)
> #endif
> --
> 2.20.1
>
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 02/19] hw/arm/bcm2835_peripherals: Improve logging
2019-09-26 17:34 ` [PATCH 02/19] hw/arm/bcm2835_peripherals: Improve logging Philippe Mathieu-Daudé
@ 2019-09-27 21:37 ` Alistair Francis
2019-10-08 9:00 ` Alex Bennée
1 sibling, 0 replies; 74+ messages in thread
From: Alistair Francis @ 2019-09-27 21:37 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, qemu-devel@nongnu.org Developers,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 10:40 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Various logging improvements as once:
> - Use 0x prefix for hex numbers
> - Display value written during write accesses
> - Move some logs from GUEST_ERROR to UNIMP
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> v2: Use PRIx64 format (pm215)
> ---
> hw/char/bcm2835_aux.c | 5 +++--
> hw/dma/bcm2835_dma.c | 8 ++++----
> hw/intc/bcm2836_control.c | 7 ++++---
> hw/misc/bcm2835_mbox.c | 7 ++++---
> hw/misc/bcm2835_property.c | 16 ++++++++++------
> 5 files changed, 25 insertions(+), 18 deletions(-)
>
> diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c
> index 3f855196e3..a6fc1bf152 100644
> --- a/hw/char/bcm2835_aux.c
> +++ b/hw/char/bcm2835_aux.c
> @@ -162,8 +162,9 @@ static void bcm2835_aux_write(void *opaque, hwaddr offset, uint64_t value,
> switch (offset) {
> case AUX_ENABLES:
> if (value != 1) {
> - qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI "
> - "or disable UART\n", __func__);
> + qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI"
> + " or disable UART: 0x%"PRIx64"\n",
> + __func__, value);
> }
> break;
>
> diff --git a/hw/dma/bcm2835_dma.c b/hw/dma/bcm2835_dma.c
> index 192bd377a0..6acc2b644e 100644
> --- a/hw/dma/bcm2835_dma.c
> +++ b/hw/dma/bcm2835_dma.c
> @@ -180,7 +180,7 @@ static uint64_t bcm2835_dma_read(BCM2835DMAState *s, hwaddr offset,
> res = ch->debug;
> break;
> default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
> __func__, offset);
> break;
> }
> @@ -228,7 +228,7 @@ static void bcm2835_dma_write(BCM2835DMAState *s, hwaddr offset,
> ch->debug = value;
> break;
> default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
> __func__, offset);
> break;
> }
> @@ -247,7 +247,7 @@ static uint64_t bcm2835_dma0_read(void *opaque, hwaddr offset, unsigned size)
> case BCM2708_DMA_ENABLE:
> return s->enable;
> default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
> __func__, offset);
> return 0;
> }
> @@ -274,7 +274,7 @@ static void bcm2835_dma0_write(void *opaque, hwaddr offset, uint64_t value,
> s->enable = (value & 0xffff);
> break;
> default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
> __func__, offset);
> }
> }
> diff --git a/hw/intc/bcm2836_control.c b/hw/intc/bcm2836_control.c
> index 04229b8a17..61f884ff9e 100644
> --- a/hw/intc/bcm2836_control.c
> +++ b/hw/intc/bcm2836_control.c
> @@ -264,7 +264,7 @@ static uint64_t bcm2836_control_read(void *opaque, hwaddr offset, unsigned size)
> } else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
> return s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2];
> } else {
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
> __func__, offset);
> return 0;
> }
> @@ -293,8 +293,9 @@ static void bcm2836_control_write(void *opaque, hwaddr offset,
> } else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
> s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2] &= ~val;
> } else {
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> - __func__, offset);
> + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx
> + " value 0x%"PRIx64"\n",
> + __func__, offset, val);
> return;
> }
>
> diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c
> index 79bad11631..7690b9afaf 100644
> --- a/hw/misc/bcm2835_mbox.c
> +++ b/hw/misc/bcm2835_mbox.c
> @@ -176,7 +176,7 @@ static uint64_t bcm2835_mbox_read(void *opaque, hwaddr offset, unsigned size)
> break;
>
> default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
> __func__, offset);
> return 0;
> }
> @@ -228,8 +228,9 @@ static void bcm2835_mbox_write(void *opaque, hwaddr offset,
> break;
>
> default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> - __func__, offset);
> + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx
> + " value 0x%"PRIx64"\n",
> + __func__, offset, value);
> return;
> }
>
> diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
> index d86d510572..0a1a3eb5d9 100644
> --- a/hw/misc/bcm2835_property.c
> +++ b/hw/misc/bcm2835_property.c
> @@ -56,7 +56,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
> break;
> case 0x00010001: /* Get board model */
> qemu_log_mask(LOG_UNIMP,
> - "bcm2835_property: %x get board model NYI\n", tag);
> + "bcm2835_property: 0x%08x get board model NYI\n",
> + tag);
> resplen = 4;
> break;
> case 0x00010002: /* Get board revision */
> @@ -69,7 +70,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
> break;
> case 0x00010004: /* Get board serial */
> qemu_log_mask(LOG_UNIMP,
> - "bcm2835_property: %x get board serial NYI\n", tag);
> + "bcm2835_property: 0x%08x get board serial NYI\n",
> + tag);
> resplen = 8;
> break;
> case 0x00010005: /* Get ARM memory */
> @@ -104,7 +106,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
>
> case 0x00038001: /* Set clock state */
> qemu_log_mask(LOG_UNIMP,
> - "bcm2835_property: %x set clock state NYI\n", tag);
> + "bcm2835_property: 0x%08x set clock state NYI\n",
> + tag);
> resplen = 8;
> break;
>
> @@ -129,7 +132,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
> case 0x00038004: /* Set max clock rate */
> case 0x00038007: /* Set min clock rate */
> qemu_log_mask(LOG_UNIMP,
> - "bcm2835_property: %x set clock rates NYI\n", tag);
> + "bcm2835_property: 0x%08x set clock rate NYI\n",
> + tag);
> resplen = 8;
> break;
>
> @@ -274,8 +278,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
> break;
>
> default:
> - qemu_log_mask(LOG_GUEST_ERROR,
> - "bcm2835_property: unhandled tag %08x\n", tag);
> + qemu_log_mask(LOG_UNIMP,
> + "bcm2835_property: unhandled tag 0x%08x\n", tag);
> break;
> }
>
> --
> 2.20.1
>
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 03/19] hw/arm/bcm2835_peripherals: Name various address spaces
2019-09-26 17:34 ` [PATCH 03/19] hw/arm/bcm2835_peripherals: Name various address spaces Philippe Mathieu-Daudé
@ 2019-09-27 21:38 ` Alistair Francis
2019-10-08 9:04 ` Alex Bennée
2019-10-09 1:48 ` Cleber Rosa
2 siblings, 0 replies; 74+ messages in thread
From: Alistair Francis @ 2019-09-27 21:38 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, qemu-devel@nongnu.org Developers,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 10:36 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Various address spaces from the BCM2835 are reported as
> 'anonymous' in memory tree:
>
> (qemu) info mtree
>
> address-space: anonymous
> 0000000000000000-000000000000008f (prio 0, i/o): bcm2835-mbox
> 0000000000000010-000000000000001f (prio 0, i/o): bcm2835-fb
> 0000000000000080-000000000000008f (prio 0, i/o): bcm2835-property
>
> address-space: anonymous
> 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
> 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
> 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
>
> [...]
>
> Since the address_space_init() function takes a 'name' argument,
> set it to correctly describe each address space:
>
> (qemu) info mtree
>
> address-space: bcm2835-mbox-memory
> 0000000000000000-000000000000008f (prio 0, i/o): bcm2835-mbox
> 0000000000000010-000000000000001f (prio 0, i/o): bcm2835-fb
> 0000000000000080-000000000000008f (prio 0, i/o): bcm2835-property
>
> address-space: bcm2835-fb-memory
> 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
> 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
> 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
>
> address-space: bcm2835-property-memory
> 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
> 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
> 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
>
> address-space: bcm2835-dma-memory
> 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
> 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
> 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/display/bcm2835_fb.c | 2 +-
> hw/dma/bcm2835_dma.c | 2 +-
> hw/misc/bcm2835_mbox.c | 2 +-
> hw/misc/bcm2835_property.c | 2 +-
> 4 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/display/bcm2835_fb.c b/hw/display/bcm2835_fb.c
> index 8f856878cd..85aaa54330 100644
> --- a/hw/display/bcm2835_fb.c
> +++ b/hw/display/bcm2835_fb.c
> @@ -425,7 +425,7 @@ static void bcm2835_fb_realize(DeviceState *dev, Error **errp)
> s->initial_config.base = s->vcram_base + BCM2835_FB_OFFSET;
>
> s->dma_mr = MEMORY_REGION(obj);
> - address_space_init(&s->dma_as, s->dma_mr, NULL);
> + address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_FB "-memory");
>
> bcm2835_fb_reset(dev);
>
> diff --git a/hw/dma/bcm2835_dma.c b/hw/dma/bcm2835_dma.c
> index 6acc2b644e..1e458d7fba 100644
> --- a/hw/dma/bcm2835_dma.c
> +++ b/hw/dma/bcm2835_dma.c
> @@ -383,7 +383,7 @@ static void bcm2835_dma_realize(DeviceState *dev, Error **errp)
> }
>
> s->dma_mr = MEMORY_REGION(obj);
> - address_space_init(&s->dma_as, s->dma_mr, NULL);
> + address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_DMA "-memory");
>
> bcm2835_dma_reset(dev);
> }
> diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c
> index 7690b9afaf..77285624c9 100644
> --- a/hw/misc/bcm2835_mbox.c
> +++ b/hw/misc/bcm2835_mbox.c
> @@ -311,7 +311,7 @@ static void bcm2835_mbox_realize(DeviceState *dev, Error **errp)
> }
>
> s->mbox_mr = MEMORY_REGION(obj);
> - address_space_init(&s->mbox_as, s->mbox_mr, NULL);
> + address_space_init(&s->mbox_as, s->mbox_mr, TYPE_BCM2835_MBOX "-memory");
> bcm2835_mbox_reset(dev);
> }
>
> diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
> index 0a1a3eb5d9..43a5465c5d 100644
> --- a/hw/misc/bcm2835_property.c
> +++ b/hw/misc/bcm2835_property.c
> @@ -407,7 +407,7 @@ static void bcm2835_property_realize(DeviceState *dev, Error **errp)
> }
>
> s->dma_mr = MEMORY_REGION(obj);
> - address_space_init(&s->dma_as, s->dma_mr, NULL);
> + address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_PROPERTY "-memory");
>
> /* TODO: connect to MAC address of USB NIC device, once we emulate it */
> qemu_macaddr_default_if_unset(&s->macaddr);
> --
> 2.20.1
>
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 04/19] hw/arm/bcm2835: Rename some definitions
2019-09-26 17:34 ` [PATCH 04/19] hw/arm/bcm2835: Rename some definitions Philippe Mathieu-Daudé
@ 2019-09-27 21:40 ` Alistair Francis
2019-10-08 10:40 ` Alex Bennée
1 sibling, 0 replies; 74+ messages in thread
From: Alistair Francis @ 2019-09-27 21:40 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, qemu-devel@nongnu.org Developers,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 10:40 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> The UART1 is part of the AUX peripheral,
> the PCM_CLOCK (yet unimplemented) is part of the CPRMAN.
>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> I dunno if this is OK to do that since the header has:
>
> * These definitions are derived from those in Raspbian Linux at
> * arch/arm/mach-{bcm2708,bcm2709}/include/mach/platform.h
> * where they carry the following notice:
> *
> * Copyright (C) 2010 Broadcom
> ---
> hw/arm/bcm2835_peripherals.c | 7 ++++---
> hw/arm/bcm2836.c | 2 +-
> include/hw/arm/raspi_platform.h | 16 +++++++---------
> 3 files changed, 12 insertions(+), 13 deletions(-)
>
> diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
> index 8984e2e91f..1bd2ff41d5 100644
> --- a/hw/arm/bcm2835_peripherals.c
> +++ b/hw/arm/bcm2835_peripherals.c
> @@ -165,7 +165,8 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0));
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0,
> qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
> - INTERRUPT_UART));
> + INTERRUPT_UART0));
> +
> /* AUX / UART1 */
> qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1));
>
> @@ -175,7 +176,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> return;
> }
>
> - memory_region_add_subregion(&s->peri_mr, UART1_OFFSET,
> + memory_region_add_subregion(&s->peri_mr, AUX_OFFSET,
> sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
> qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
> @@ -268,7 +269,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> return;
> }
>
> - memory_region_add_subregion(&s->peri_mr, EMMC_OFFSET,
> + memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET,
> sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
> qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index 493a913f89..723aef6bf5 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -126,7 +126,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
>
> /* set periphbase/CBAR value for CPU-local registers */
> object_property_set_int(OBJECT(&s->cpus[n]),
> - BCM2836_PERI_BASE + MCORE_OFFSET,
> + BCM2836_PERI_BASE + MSYNC_OFFSET,
> "reset-cbar", &err);
> if (err) {
> error_propagate(errp, err);
> diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
> index 10083d33df..66969fac5d 100644
> --- a/include/hw/arm/raspi_platform.h
> +++ b/include/hw/arm/raspi_platform.h
> @@ -25,8 +25,7 @@
> #ifndef HW_ARM_RASPI_PLATFORM_H
> #define HW_ARM_RASPI_PLATFORM_H
>
> -#define MCORE_OFFSET 0x0000 /* Fake frame buffer device
> - * (the multicore sync block) */
> +#define MSYNC_OFFSET 0x0000 /* Multicore Sync Block */
> #define IC0_OFFSET 0x2000
> #define ST_OFFSET 0x3000 /* System Timer */
> #define MPHI_OFFSET 0x6000 /* Message-based Parallel Host Intf. */
> @@ -37,9 +36,8 @@
> #define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 */
> #define ARMCTRL_0_SBM_OFFSET (ARM_OFFSET + 0x800) /* User 0 (ARM) Semaphores
> * Doorbells & Mailboxes */
> -#define PM_OFFSET 0x100000 /* Power Management, Reset controller
> - * and Watchdog registers */
> -#define PCM_CLOCK_OFFSET 0x101098
> +#define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
> +#define CM_OFFSET 0x101000 /* Clock Management */
> #define RNG_OFFSET 0x104000
> #define GPIO_OFFSET 0x200000
> #define UART0_OFFSET 0x201000
> @@ -47,11 +45,11 @@
> #define I2S_OFFSET 0x203000
> #define SPI0_OFFSET 0x204000
> #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
> -#define UART1_OFFSET 0x215000
> -#define EMMC_OFFSET 0x300000
> +#define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
> +#define EMMC1_OFFSET 0x300000
> #define SMI_OFFSET 0x600000
> #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */
> -#define USB_OFFSET 0x980000 /* DTC_OTG USB controller */
> +#define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */
> #define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */
>
> /* GPU interrupts */
> @@ -112,7 +110,7 @@
> #define INTERRUPT_SPI 54
> #define INTERRUPT_I2SPCM 55
> #define INTERRUPT_SDIO 56
> -#define INTERRUPT_UART 57
> +#define INTERRUPT_UART0 57
> #define INTERRUPT_SLIMBUS 58
> #define INTERRUPT_VEC 59
> #define INTERRUPT_CPG 60
> --
> 2.20.1
>
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 05/19] hw/arm/bcm2835: Add various unimplemented peripherals
2019-09-26 17:34 ` [PATCH 05/19] hw/arm/bcm2835: Add various unimplemented peripherals Philippe Mathieu-Daudé
@ 2019-09-27 21:42 ` Alistair Francis
2019-10-08 9:43 ` Philippe Mathieu-Daudé
2019-10-08 11:09 ` Alex Bennée
1 sibling, 1 reply; 74+ messages in thread
From: Alistair Francis @ 2019-09-27 21:42 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, qemu-devel@nongnu.org Developers,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 10:44 AM Philippe Mathieu-Daudé
<f4bug@amsat.org> wrote:
>
> Base addresses and sizes taken from the "BCM2835 ARM Peripherals"
> datasheet from February 06 2012:
> https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/arm/bcm2835_peripherals.c | 31 ++++++++++++++++++++++++++++
> include/hw/arm/bcm2835_peripherals.h | 15 ++++++++++++++
> include/hw/arm/raspi_platform.h | 8 +++++++
> 3 files changed, 54 insertions(+)
>
> diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
> index 1bd2ff41d5..fdcf616c56 100644
> --- a/hw/arm/bcm2835_peripherals.c
> +++ b/hw/arm/bcm2835_peripherals.c
> @@ -22,6 +22,20 @@
> /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
> #define BCM2835_SDHC_CAPAREG 0x52134b4
>
> +static void create_unimp(BCM2835PeripheralState *ps,
> + UnimplementedDeviceState *uds,
> + const char *name, hwaddr ofs, hwaddr size)
> +{
> + sysbus_init_child_obj(OBJECT(ps), name, uds,
> + sizeof(UnimplementedDeviceState),
> + TYPE_UNIMPLEMENTED_DEVICE);
> + qdev_prop_set_string(DEVICE(uds), "name", name);
> + qdev_prop_set_uint64(DEVICE(uds), "size", size);
> + object_property_set_bool(OBJECT(uds), true, "realized", &error_fatal);
> + memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
> + sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
Why not just use create_unimplemented_device() and not bother saving
the UnimplementedDeviceState members in the struct?
Alistair
> +}
> +
> static void bcm2835_peripherals_init(Object *obj)
> {
> BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
> @@ -323,6 +337,23 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> error_propagate(errp, err);
> return;
> }
> +
> + create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
> + create_unimp(s, &s->systmr, "bcm2835-systimer", ST_OFFSET, 0x20);
> + create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
> + create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
> + create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
> + create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
> + create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
> + create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
> + create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20);
> + create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20);
> + create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20);
> + create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
> + create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
> + create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
> + create_unimp(s, &s->dwc2, "dwc-usb2", USB_OTG_OFFSET, 0x1000);
> + create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
> }
>
> static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
> diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
> index 6b17f6a382..62a4c7b559 100644
> --- a/include/hw/arm/bcm2835_peripherals.h
> +++ b/include/hw/arm/bcm2835_peripherals.h
> @@ -23,6 +23,7 @@
> #include "hw/sd/sdhci.h"
> #include "hw/sd/bcm2835_sdhost.h"
> #include "hw/gpio/bcm2835_gpio.h"
> +#include "hw/misc/unimp.h"
>
> #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
> #define BCM2835_PERIPHERALS(obj) \
> @@ -37,6 +38,10 @@ typedef struct BCM2835PeripheralState {
> MemoryRegion ram_alias[4];
> qemu_irq irq, fiq;
>
> + UnimplementedDeviceState systmr;
> + UnimplementedDeviceState armtmr;
> + UnimplementedDeviceState cprman;
> + UnimplementedDeviceState a2w;
> PL011State uart0;
> BCM2835AuxState aux;
> BCM2835FBState fb;
> @@ -48,6 +53,16 @@ typedef struct BCM2835PeripheralState {
> SDHCIState sdhci;
> BCM2835SDHostState sdhost;
> BCM2835GpioState gpio;
> + UnimplementedDeviceState i2s;
> + UnimplementedDeviceState spi[1];
> + UnimplementedDeviceState i2c[3];
> + UnimplementedDeviceState otp;
> + UnimplementedDeviceState dbus;
> + UnimplementedDeviceState ave0;
> + UnimplementedDeviceState bscsl;
> + UnimplementedDeviceState smi;
> + UnimplementedDeviceState dwc2;
> + UnimplementedDeviceState sdramc;
> } BCM2835PeripheralState;
>
> #endif /* BCM2835_PERIPHERALS_H */
> diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
> index 66969fac5d..cdcbca943f 100644
> --- a/include/hw/arm/raspi_platform.h
> +++ b/include/hw/arm/raspi_platform.h
> @@ -38,6 +38,8 @@
> * Doorbells & Mailboxes */
> #define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
> #define CM_OFFSET 0x101000 /* Clock Management */
> +#define A2W_OFFSET 0x102000 /* Reset controller */
> +#define AVS_OFFSET 0x103000 /* Audio Video Standard */
> #define RNG_OFFSET 0x104000
> #define GPIO_OFFSET 0x200000
> #define UART0_OFFSET 0x201000
> @@ -45,11 +47,17 @@
> #define I2S_OFFSET 0x203000
> #define SPI0_OFFSET 0x204000
> #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
> +#define OTP_OFFSET 0x20f000
> +#define BSC_SL_OFFSET 0x214000 /* SPI slave */
> #define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
> #define EMMC1_OFFSET 0x300000
> #define SMI_OFFSET 0x600000
> #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */
> +#define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */
> +#define DBUS_OFFSET 0x900000
> +#define AVE0_OFFSET 0x910000
> #define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */
> +#define SDRAMC_OFFSET 0xe00000
> #define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */
>
> /* GPU interrupts */
> --
> 2.20.1
>
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 09/19] hw/arm/bcm2835_peripherals: Use the thermal sensor block
2019-09-26 17:34 ` [PATCH 09/19] hw/arm/bcm2835_peripherals: Use the thermal sensor block Philippe Mathieu-Daudé
@ 2019-09-27 21:51 ` Alistair Francis
0 siblings, 0 replies; 74+ messages in thread
From: Alistair Francis @ 2019-09-27 21:51 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, qemu-devel@nongnu.org Developers,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 10:42 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Map the thermal sensor in the BCM2835 block.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/arm/bcm2835_peripherals.c | 13 +++++++++++++
> include/hw/arm/bcm2835_peripherals.h | 2 ++
> include/hw/arm/raspi_platform.h | 1 +
> 3 files changed, 16 insertions(+)
>
> diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
> index fdcf616c56..70bf927a02 100644
> --- a/hw/arm/bcm2835_peripherals.c
> +++ b/hw/arm/bcm2835_peripherals.c
> @@ -111,6 +111,10 @@ static void bcm2835_peripherals_init(Object *obj)
> object_property_add_const_link(OBJECT(&s->dma), "dma-mr",
> OBJECT(&s->gpu_bus_mr), &error_abort);
>
> + /* Thermal */
> + sysbus_init_child_obj(obj, "thermal", &s->thermal, sizeof(s->thermal),
> + TYPE_BCM2835_THERMAL);
> +
> /* GPIO */
> sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio),
> TYPE_BCM2835_GPIO);
> @@ -321,6 +325,15 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> INTERRUPT_DMA0 + n));
> }
>
> + /* THERMAL */
> + object_property_set_bool(OBJECT(&s->thermal), true, "realized", &err);
> + if (err) {
> + error_propagate(errp, err);
> + return;
> + }
> + memory_region_add_subregion(&s->peri_mr, THERMAL_OFFSET,
> + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0));
> +
> /* GPIO */
> object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err);
> if (err) {
> diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
> index 62a4c7b559..be7ad9b499 100644
> --- a/include/hw/arm/bcm2835_peripherals.h
> +++ b/include/hw/arm/bcm2835_peripherals.h
> @@ -20,6 +20,7 @@
> #include "hw/misc/bcm2835_property.h"
> #include "hw/misc/bcm2835_rng.h"
> #include "hw/misc/bcm2835_mbox.h"
> +#include "hw/misc/bcm2835_thermal.h"
> #include "hw/sd/sdhci.h"
> #include "hw/sd/bcm2835_sdhost.h"
> #include "hw/gpio/bcm2835_gpio.h"
> @@ -53,6 +54,7 @@ typedef struct BCM2835PeripheralState {
> SDHCIState sdhci;
> BCM2835SDHostState sdhost;
> BCM2835GpioState gpio;
> + Bcm2835ThermalState thermal;
> UnimplementedDeviceState i2s;
> UnimplementedDeviceState spi[1];
> UnimplementedDeviceState i2c[3];
> diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
> index cdcbca943f..61b04a1bd4 100644
> --- a/include/hw/arm/raspi_platform.h
> +++ b/include/hw/arm/raspi_platform.h
> @@ -48,6 +48,7 @@
> #define SPI0_OFFSET 0x204000
> #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
> #define OTP_OFFSET 0x20f000
> +#define THERMAL_OFFSET 0x212000
> #define BSC_SL_OFFSET 0x214000 /* SPI slave */
> #define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
> #define EMMC1_OFFSET 0x300000
> --
> 2.20.1
>
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 12/19] hw/arm/bcm2835_peripherals: Add Clock/Power/Reset Manager blocks
2019-09-26 17:34 ` [PATCH 12/19] hw/arm/bcm2835_peripherals: Add Clock/Power/Reset Manager blocks Philippe Mathieu-Daudé
@ 2019-10-01 9:51 ` Philippe Mathieu-Daudé
2019-10-07 17:23 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-01 9:51 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Andrew Baumann,
Marc-André Lureau, qemu-arm, Clement Deschamps, Cleber Rosa,
Paolo Bonzini, Cheng Xiang, Pekka Enberg, Guenter Roeck,
Eduardo Habkost
On 9/26/19 7:34 PM, Philippe Mathieu-Daudé wrote:
> Add basic support for BCM283x CPRMAN. Provide support for reading and
> writing CPRMAN registers and initialize registers with sensible default
> values. During runtime retain any written values.
>
> Basic CPRMAN support is necessary and sufficient to boot Linux on raspi2
> and raspi3 systems.
>
> Based on:
> https://github.com/raspberrypi/linux/blob/rpi-5.3.y/drivers/clk/bcm/clk-bcm2835.c
> https://github.com/u-boot/u-boot/blob/v2019.07/include/dt-bindings/clock/bcm2835.h
> https://github.com/arisena-com/rpi_src/blob/master/apps/i2s_test/src/i2s_test.c#L273
>
> Co-developed-by: Guenter Roeck <linux@roeck-us.net>
> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/arm/bcm2835_peripherals.c | 20 +-
> hw/misc/Makefile.objs | 1 +
> hw/misc/bcm2835_cprman.c | 383 +++++++++++++++++++++++++++
> hw/misc/trace-events | 8 +
> include/hw/arm/bcm2835_peripherals.h | 4 +-
> include/hw/misc/bcm2835_cprman.h | 32 +++
> 6 files changed, 444 insertions(+), 4 deletions(-)
> create mode 100644 hw/misc/bcm2835_cprman.c
> create mode 100644 include/hw/misc/bcm2835_cprman.h
>
> diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
> index 965f4c1f3d..c887969795 100644
> --- a/hw/arm/bcm2835_peripherals.c
> +++ b/hw/arm/bcm2835_peripherals.c
> @@ -62,6 +62,11 @@ static void bcm2835_peripherals_init(Object *obj)
> sysbus_init_child_obj(obj, "systimer", &s->systmr, sizeof(s->systmr),
> TYPE_BCM2835_SYSTIMER);
>
> + /* Clock / Power / Reset */
> + object_initialize(&s->cprman, sizeof(s->cprman), TYPE_BCM2835_CPRMAN);
> + object_property_add_child(obj, "cprman", OBJECT(&s->cprman), NULL);
> + qdev_set_parent_bus(DEVICE(&s->cprman), sysbus_get_default());
> +
> /* UART0 */
> sysbus_init_child_obj(obj, "uart0", &s->uart0, sizeof(s->uart0),
> TYPE_PL011);
> @@ -191,6 +196,19 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
> INTERRUPT_ARM_TIMER));
>
> + /* Clock / Power / Reset */
> + object_property_set_bool(OBJECT(&s->cprman), true, "realized", &err);
> + if (err) {
> + error_propagate(errp, err);
> + return;
> + }
> + memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET,
> + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0));
> + memory_region_add_subregion(&s->peri_mr, CM_OFFSET,
> + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 1));
> + memory_region_add_subregion(&s->peri_mr, A2W_OFFSET,
> + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 2));
> +
> /* UART0 */
> qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
> object_property_set_bool(OBJECT(&s->uart0), true, "realized", &err);
> @@ -372,8 +390,6 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> }
>
> create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
> - create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
> - create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
> create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
> create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
> create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
> diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
> index c89f3816a5..64e717e6b3 100644
> --- a/hw/misc/Makefile.objs
> +++ b/hw/misc/Makefile.objs
> @@ -53,6 +53,7 @@ common-obj-$(CONFIG_OMAP) += omap_tap.o
> common-obj-$(CONFIG_RASPI) += bcm2835_mbox.o
> common-obj-$(CONFIG_RASPI) += bcm2835_property.o
> common-obj-$(CONFIG_RASPI) += bcm2835_rng.o
> +common-obj-$(CONFIG_RASPI) += bcm2835_cprman.o
> common-obj-$(CONFIG_RASPI) += bcm2835_thermal.o
> common-obj-$(CONFIG_SLAVIO) += slavio_misc.o
> common-obj-$(CONFIG_ZYNQ) += zynq_slcr.o
> diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
> new file mode 100644
> index 0000000000..6c3b5b6837
> --- /dev/null
> +++ b/hw/misc/bcm2835_cprman.c
> @@ -0,0 +1,383 @@
> +/*
> + * BCM2835 Clock/Power/Reset Manager subsystem (poor man's version)
> + *
> + * Copyright (C) 2018 Guenter Roeck <linux@roeck-us.net>
> + * Copyright (C) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu/log.h"
> +#include "sysemu/runstate.h"
> +#include "hw/registerfields.h"
> +#include "hw/misc/bcm2835_cprman.h"
> +#include "trace.h"
> +
> +#define CPRMAN_PASSWD 'Z'
> +
> +FIELD(CPRMAN, PASSWD, 24, 8)
> +
> +REG32(PM_RSTC, 0x1c)
> +REG32(PM_RSTS, 0x20)
> +REG32(PM_WDOG, 0x24)
> +
> +static const char *pm_name(hwaddr addr)
> +{
> + addr &= ~3;
> + switch (addr) {
> + case A_PM_RSTC: return "RST_CLR";
> + case A_PM_RSTS: return "RST_SET";
> + case A_PM_WDOG: return "WDG";
> + default:
> + return "UNKN";
> + }
> +}
> +
> +static uint64_t bcm2835_cprman_pm_read(void *opaque, hwaddr addr,
> + unsigned size)
> +{
> + uint32_t res = 0;
> +
> + trace_bcm2835_cprman_read(size << 3, addr, "PM", pm_name(addr), "", res);
> +
> + return res;
> +}
> +
> +static void bcm2835_cprman_pm_write(void *opaque, hwaddr addr,
> + uint64_t value, unsigned size)
> +{
> + const char *name;
> +
> + if (FIELD_EX32(value, CPRMAN, PASSWD) != CPRMAN_PASSWD) {
> + qemu_log_mask(LOG_GUEST_ERROR, "[CPRMAN]: password key error w%02d"
> + " *0x%04"HWADDR_PRIx" = 0x%"PRIx64"\n",
> + size << 3, addr, value);
> + return;
> + }
> + value &= ~R_CPRMAN_PASSWD_MASK;
> +
> + name = pm_name(addr);
> + trace_bcm2835_cprman_write_pm(addr, name, value);
> + if (addr == A_PM_RSTC && value & 0x20) { /* TODO remove 0x20 magic */
> + qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
> + }
> +}
> +
> +static const MemoryRegionOps bcm2835_cprman_pm_ops = {
> + .read = bcm2835_cprman_pm_read,
> + .write = bcm2835_cprman_pm_write,
> + .impl.max_access_size = 4,
> + .valid.min_access_size = 4,
> + .endianness = DEVICE_NATIVE_ENDIAN,
> +};
> +
> +REG32(CM_CTL, 0)
> +FIELD(CM_CTL, SRC, 0, 4)
> +FIELD(CM_CTL, ENABLE, 4, 1)
> +FIELD(CM_CTL, KILL, 5, 1)
> +FIELD(CM_CTL, GATE, 6, 1)
> +FIELD(CM_CTL, BUSY, 7, 1)
> +FIELD(CM_CTL, BUSYD, 8, 1)
> +FIELD(CM_CTL, FRAC, 9, 1)
> +
> +REG32(CM_DIV, 4)
> +FIELD(CM_DIV, FRAC, 0, 12)
> +FIELD(CM_DIV, INTEGER, 12, 12)
> +
> +REG32(CM_OSCCOUNT, 0x100)
> +REG32(CM_LOCK, 0x114)
> +REG32(CM_EVENT, 0x118)
> +REG32(CM_PLLB, 0x170)
> +
> +/* Bits used by R_CM_CTL_SRC_MASK */
> +enum cprman_clock_source {
> + SRC_GND = 0,
> + SRC_OSC = 1,
> + SRC_TEST_DBG0 = 2,
> + SRC_TEST_DBG1 = 3,
> + SRC_PLLA = 4,
> + SRC_PLLC_CORE0 = 5,
> + SRC_PLLD = 6,
> + SRC_PLLH_AUX = 7,
> + SRC_PLLC_CORE1 = 8,
> + SRC_PLLC_CORE2 = 9
> +};
> +
> +static const char *src_name(int src)
> +{
> + static const char *src_names[16] = {
> + [SRC_GND] = "GND",
> + [SRC_OSC] = "OSC",
> + [SRC_PLLA] = "PLLA",
> + [SRC_PLLC_CORE0] = "PLLC_CORE0",
> + [SRC_PLLD] = "PLLD",
> + [SRC_PLLH_AUX] = "PLLH_AUX",
> + [SRC_PLLC_CORE1] = "PLLC_CORE1",
> + [SRC_PLLC_CORE2] = "PLLC_CORE2",
> + };
> + return src_names[src] ? src_names[src] : "UNKN";
> +}
> +
> +static const char *ctldiv_names[0x200 / 4] = {
> + [0] = "GENERIC",
> + [1] = "VPU",
> + [2] = "SYS",
> + [3] = "PERIA",
> + [4] = "PERII",
> + [5] = "H264",
> + [6] = "ISP",
> + [7] = "V3D",
> + [8] = "CAM0",
> + [9] = "CAM1",
> + [10] = "CCP2",
> + [11] = "DSI0E",
> + [12] = "DSI0P",
> + [13] = "DPI",
> + [14] = "GP0",
> + [15] = "GP1",
> + [16] = "GP2",
> + [17] = "HSM",
> + [18] = "OTP",
> + [19] = "PCM",
> + [20] = "PWM",
> + [21] = "SLIM",
> + [22] = "SMI",
> + [24] = "TCNT",
> + [25] = "TEC",
> + [26] = "TD0",
> + [27] = "TD1",
> + [28] = "TSENS",
> + [29] = "TIMER",
> + [30] = "UART",
> + [31] = "VEC",
> + [43] = "DSI1E",
> + [44] = "DSI1P",
> + [45] = "DFT",
> + [50] = "PULSE",
> + [53] = "SDC",
> + [54] = "ARM",
> + [55] = "AVEO",
> + [56] = "EMMC",
> +};
> +
> +static const char *cm_name(hwaddr addr)
> +{
> + int idx;
> +
> + addr &= ~3;
> + switch (addr) {
> + case A_CM_OSCCOUNT: return "OSCCOUNT";
> + case 0x104 ... 0x110:
> + case A_CM_PLLB: return "PLLx";
> + case A_CM_LOCK: return "LOCK";
> + case A_CM_EVENT: return "EVENT";
> + default:
> + idx = addr / 8;
> + return ctldiv_names[idx] ? ctldiv_names[idx] : "UNKN";
> + }
> +}
> +
> +static uint32_t scale(uint32_t value)
> +{
> + return (1000ull * value) >> 10;
> +}
> +
> +/*
> + * Available information suggests that CPRMAN registers have default
> + * values which are not overwritten by ROMMON (u-boot). The hardware
> + * default values are unknown at this time.
> + * The default values selected here are necessary and sufficient
> + * to boot Linux directly (on raspi2 and raspi3). The selected
> + * values enable all clocks and set clock rates to match their
> + * parent rates.
> + */
> +static uint64_t bcm2835_cprman_cm_read(void *opaque, hwaddr addr,
> + unsigned size)
> +{
> + uint32_t res = 0;
> +
> + if (addr == A_CM_LOCK) {
> + res = 0b11111 << 8; /* all locked! */
> + } else {
> + switch (addr & 0xf) {
This should be addr & 7 to match [0, 4].
> + case A_CM_CTL:
> + res = SRC_OSC | R_CM_CTL_ENABLE_MASK;
> + break;
> + case A_CM_DIV:
> + res = FIELD_DP32(0, CM_DIV, INTEGER, 1);
> + break;
> + default:
> + qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n",
> + __func__, addr);
> + }
> + }
> + trace_bcm2835_cprman_read(size << 3, addr, "CM", cm_name(addr), "", res);
> +
> + return res;
> +}
> +
> +static void bcm2835_cprman_cm_write(void *opaque, hwaddr addr,
> + uint64_t value, unsigned size)
> +{
> + const char *name;
> +
> + if (FIELD_EX32(value, CPRMAN, PASSWD) != CPRMAN_PASSWD) {
> + qemu_log_mask(LOG_GUEST_ERROR, "[CPRMAN]: password key error w%02d"
> + " *0x%04"HWADDR_PRIx" = 0x%"PRIx64"\n",
> + size << 3, addr, value);
> + return;
> + }
> + value &= ~R_CPRMAN_PASSWD_MASK;
> +
> + name = cm_name(addr);
> + switch (addr) {
> + case A_CM_OSCCOUNT:
> + case 0x104 ... 0x110:
> + case A_CM_PLLB:
> + case A_CM_LOCK:
> + case A_CM_EVENT:
> + trace_bcm2835_cprman_write_cm_generic(name, value);
> + break;
> + default:
> + switch (addr & 0xf) {
Ditto.
> + case A_CM_CTL:
> + trace_bcm2835_cprman_write_cm_ctl(name, src_name(value & 0xf),
> + FIELD_EX32(value, CM_CTL, ENABLE));
> + break;
> + case A_CM_DIV:
> + trace_bcm2835_cprman_write_cm_div(name,
> + FIELD_EX32(value, CM_DIV, INTEGER),
> + scale(FIELD_EX32(value, CM_DIV, FRAC)));
> + }
> + }
> +}
> +
> +static const MemoryRegionOps bcm2835_cprman_cm_ops = {
> + .read = bcm2835_cprman_cm_read,
> + .write = bcm2835_cprman_cm_write,
> + .impl.max_access_size = 4,
> + .valid.min_access_size = 4,
> + .endianness = DEVICE_NATIVE_ENDIAN,
> +};
> +
> +REG32(A2W_PLL_CTRL, 0x00)
> +FIELD(A2W_PLL_CTRL, NDIV, 0, 12)
> +FIELD(A2W_PLL_CTRL, PDIV, 12, 3)
> +FIELD(A2W_PLL_CTRL, POWER_DOWN, 16, 1)
> +FIELD(A2W_PLL_CTRL, POWER_RESET_DISABLE, 17, 1)
> +
> +REG32(A2W_PLL_ANA0, 0x10)
> +
> +FIELD(A2W_PLL_FRAC, DIV, 0, 20)
> +
> +FIELD(A2W_PLL_CHAN, DIV, 0, 8)
> +FIELD(A2W_PLL_CHAN, DISABLE, 8, 1)
> +
> +static const char *a2w_name(hwaddr addr)
> +{
> + if (addr >= 0x300) {
> + return "CHANx";
> + }
> + if (addr >= 0x200) {
> + return "FRACx";
> + }
> + switch (addr & 0x1f) {
> + case A_A2W_PLL_CTRL:
> + return "CTRL";
> + case A_A2W_PLL_ANA0:
> + return "ANA0";
> + default:
> + return "UNKN";
> + }
> +}
> +
> +static const char *pll_name(int idx)
> +{
> + static const char *pll_names[8] = {
> + [0] = "PLLA",
> + [1] = "PLLC",
> + [2] = "PLLD",
> + [3] = "PLLH",
> + [7] = "PLLB",
> + };
> + return pll_names[idx] ? pll_names[idx] : "UNKN";
> +}
> +
> +static uint64_t bcm2835_cprman_a2w_read(void *opaque, hwaddr addr,
> + unsigned size)
> +{
> + uint32_t res = 0;
> +
> + if (addr < 0x200) {
> + /* Power */
> + switch (addr & 0x1f) {
> + case A_A2W_PLL_CTRL:
> + res = R_A2W_PLL_CTRL_POWER_DOWN_MASK; /* On */
> + break;
> + case A_A2W_PLL_ANA0:
> + break;
> + }
> + } else {
> + /* addr < 0x300 is FREQ, else CHANNEL */
> + qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n",
> + __func__, addr);
> + }
> + trace_bcm2835_cprman_read(size << 3, addr, "A2W", a2w_name(addr),
> + pll_name((addr >> 5) & 7), res);
> +
> + return res;
> +}
> +
> +static void bcm2835_cprman_a2w_write(void *opaque, hwaddr addr,
> + uint64_t value, unsigned size)
> +{
> + if (FIELD_EX32(value, CPRMAN, PASSWD) != CPRMAN_PASSWD) {
> + qemu_log_mask(LOG_GUEST_ERROR, "[CPRMAN]: password key error w%02d"
> + " *0x%04"HWADDR_PRIx" = 0x%"PRIx64"\n",
> + size << 3, addr, value);
> + return;
> + }
> + value &= ~R_CPRMAN_PASSWD_MASK;
> +
> + trace_bcm2835_cprman_write_a2w(addr, a2w_name(addr),
> + pll_name((addr >> 5) & 7), value);
> +}
> +
> +static const MemoryRegionOps bcm2835_cprman_a2w_ops = {
> + .read = bcm2835_cprman_a2w_read,
> + .write = bcm2835_cprman_a2w_write,
> + .impl.max_access_size = 4,
> + .valid.min_access_size = 4,
> + .endianness = DEVICE_NATIVE_ENDIAN,
> +};
> +
> +static void bcm2835_cprman_init(Object *obj)
> +{
> + BCM2835CprmanState *s = BCM2835_CPRMAN(obj);
> +
> + memory_region_init_io(&s->iomem.pm, obj, &bcm2835_cprman_pm_ops, s,
> + TYPE_BCM2835_CPRMAN "-pm", 0x1000);
> + memory_region_init_io(&s->iomem.cm, obj, &bcm2835_cprman_cm_ops, s,
> + TYPE_BCM2835_CPRMAN "-cm", 0x1000);
> + memory_region_init_io(&s->iomem.a2w, obj, &bcm2835_cprman_a2w_ops, s,
> + TYPE_BCM2835_CPRMAN "-a2w", 0x1000);
> + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem.pm);
> + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem.cm);
> + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem.a2w);
> +}
> +
> +static TypeInfo bcm2835_cprman_info = {
> + .name = TYPE_BCM2835_CPRMAN,
> + .parent = TYPE_SYS_BUS_DEVICE,
> + .instance_size = sizeof(BCM2835CprmanState),
> + .instance_init = bcm2835_cprman_init,
> +};
> +
> +static void bcm2835_cprman_register_types(void)
> +{
> + type_register_static(&bcm2835_cprman_info);
> +}
> +
> +type_init(bcm2835_cprman_register_types)
> diff --git a/hw/misc/trace-events b/hw/misc/trace-events
> index 1deb1d08c1..30d33e2e1d 100644
> --- a/hw/misc/trace-events
> +++ b/hw/misc/trace-events
> @@ -149,3 +149,11 @@ bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write
> bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
> bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
> bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
> +
> +# bcm2835_cprman.c
> +bcm2835_cprman_read(unsigned size, uint64_t offset, const char *reg_type, const char *reg_name1, const char *reg_name2, uint32_t value) "cprman: rd%u @0x%03" PRIx64 " %s %s.%s val:0x%x"
> +bcm2835_cprman_write_pm(uint64_t offset, const char *reg_name, uint32_t value) "pm: wr @0x%03" PRIx64 " %s val:0x%x"
> +bcm2835_cprman_write_cm_generic(const char *reg_name, uint32_t val) "cprman: wr %s 0x%08x"
> +bcm2835_cprman_write_cm_div(const char *reg_name, uint32_t v0, uint32_t v1) "cprman: wr %s.DIV float:%u.%u"
> +bcm2835_cprman_write_cm_ctl(const char *reg_name, const char *src, uint32_t ena) "cprman: wr %s.CTL src:%s enabled:%u"
> +bcm2835_cprman_write_a2w(uint64_t offset, const char *reg_name, const char *pll_name, uint32_t value) "a2w: wr @0x%03" PRIx64 " %s.%s val:0x%x"
> diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
> index 5b9fc89453..b4360ca1a8 100644
> --- a/include/hw/arm/bcm2835_peripherals.h
> +++ b/include/hw/arm/bcm2835_peripherals.h
> @@ -19,6 +19,7 @@
> #include "hw/intc/bcm2835_ic.h"
> #include "hw/misc/bcm2835_property.h"
> #include "hw/misc/bcm2835_rng.h"
> +#include "hw/misc/bcm2835_cprman.h"
> #include "hw/misc/bcm2835_mbox.h"
> #include "hw/misc/bcm2835_thermal.h"
> #include "hw/sd/sdhci.h"
> @@ -42,8 +43,7 @@ typedef struct BCM2835PeripheralState {
>
> BCM2835SysTimerState systmr;
> UnimplementedDeviceState armtmr;
> - UnimplementedDeviceState cprman;
> - UnimplementedDeviceState a2w;
> + BCM2835CprmanState cprman;
> PL011State uart0;
> BCM2835AuxState aux;
> BCM2835FBState fb;
> diff --git a/include/hw/misc/bcm2835_cprman.h b/include/hw/misc/bcm2835_cprman.h
> new file mode 100644
> index 0000000000..4dd2c8323b
> --- /dev/null
> +++ b/include/hw/misc/bcm2835_cprman.h
> @@ -0,0 +1,32 @@
> +/*
> + * BCM2835 Clock/Power/Reset Manager subsystem (poor man's version)
> + *
> + * Copyright (C) 2018 Guenter Roeck <linux@roeck-us.net>
> + * Copyright (C) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + */
> +
> +#ifndef BCM2835_CPRMAN_H
> +#define BCM2835_CPRMAN_H
> +
> +#include "hw/sysbus.h"
> +
> +#define TYPE_BCM2835_CPRMAN "bcm2835-cprman"
> +#define BCM2835_CPRMAN(obj) \
> + OBJECT_CHECK(BCM2835CprmanState, (obj), TYPE_BCM2835_CPRMAN)
> +
> +typedef struct {
> + /*< private >*/
> + SysBusDevice parent_obj;
> + /*< public >*/
> +
> + struct {
> + MemoryRegion pm;
> + MemoryRegion cm;
> + MemoryRegion a2w;
> + } iomem;
> +} BCM2835CprmanState;
> +
> +#endif
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 12/19] hw/arm/bcm2835_peripherals: Add Clock/Power/Reset Manager blocks
2019-10-01 9:51 ` Philippe Mathieu-Daudé
@ 2019-10-07 17:23 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-07 17:23 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, QEMU Developers
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Esteban Bosse, Alistair Francis, Andrew Baumann,
Marc-André Lureau, qemu-arm, Clement Deschamps, Cleber Rosa,
Paolo Bonzini, Cheng Xiang, Pekka Enberg, Guenter Roeck,
Eduardo Habkost
On Tue, Oct 1, 2019 at 11:51 AM Philippe Mathieu-Daudé
<philmd@redhat.com> wrote:
> On 9/26/19 7:34 PM, Philippe Mathieu-Daudé wrote:
> > Add basic support for BCM283x CPRMAN. Provide support for reading and
> > writing CPRMAN registers and initialize registers with sensible default
> > values. During runtime retain any written values.
> >
> > Basic CPRMAN support is necessary and sufficient to boot Linux on raspi2
> > and raspi3 systems.
> >
> > Based on:
> > https://github.com/raspberrypi/linux/blob/rpi-5.3.y/drivers/clk/bcm/clk-bcm2835.c
> > https://github.com/u-boot/u-boot/blob/v2019.07/include/dt-bindings/clock/bcm2835.h
> > https://github.com/arisena-com/rpi_src/blob/master/apps/i2s_test/src/i2s_test.c#L273
> >
> > Co-developed-by: Guenter Roeck <linux@roeck-us.net>
> > Signed-off-by: Guenter Roeck <linux@roeck-us.net>
> > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > ---
> > hw/arm/bcm2835_peripherals.c | 20 +-
> > hw/misc/Makefile.objs | 1 +
> > hw/misc/bcm2835_cprman.c | 383 +++++++++++++++++++++++++++
> > hw/misc/trace-events | 8 +
> > include/hw/arm/bcm2835_peripherals.h | 4 +-
> > include/hw/misc/bcm2835_cprman.h | 32 +++
> > 6 files changed, 444 insertions(+), 4 deletions(-)
> > create mode 100644 hw/misc/bcm2835_cprman.c
> > create mode 100644 include/hw/misc/bcm2835_cprman.h
> >
> > diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
> > new file mode 100644
> > index 0000000000..6c3b5b6837
> > --- /dev/null
> > +++ b/hw/misc/bcm2835_cprman.c
> > @@ -0,0 +1,383 @@
> > +/*
> > + * BCM2835 Clock/Power/Reset Manager subsystem (poor man's version)
> > + *
> > + * Copyright (C) 2018 Guenter Roeck <linux@roeck-us.net>
> > + * Copyright (C) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
> > + *
> > + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> > + * See the COPYING file in the top-level directory.
> > + */
> > +
> > +#include "qemu/osdep.h"
> > +#include "qemu/log.h"
> > +#include "sysemu/runstate.h"
> > +#include "hw/registerfields.h"
> > +#include "hw/misc/bcm2835_cprman.h"
> > +#include "trace.h"
> > +
> > +#define CPRMAN_PASSWD 'Z'
> > +
> > +FIELD(CPRMAN, PASSWD, 24, 8)
> > +
[...]
> > +REG32(A2W_PLL_CTRL, 0x00)
> > +FIELD(A2W_PLL_CTRL, NDIV, 0, 12)
> > +FIELD(A2W_PLL_CTRL, PDIV, 12, 3)
> > +FIELD(A2W_PLL_CTRL, POWER_DOWN, 16, 1)
> > +FIELD(A2W_PLL_CTRL, POWER_RESET_DISABLE, 17, 1)
> > +
> > +REG32(A2W_PLL_ANA0, 0x10)
> > +
> > +FIELD(A2W_PLL_FRAC, DIV, 0, 20)
> > +
> > +FIELD(A2W_PLL_CHAN, DIV, 0, 8)
> > +FIELD(A2W_PLL_CHAN, DISABLE, 8, 1)
> > +
> > +static const char *a2w_name(hwaddr addr)
> > +{
> > + if (addr >= 0x300) {
> > + return "CHANx";
> > + }
> > + if (addr >= 0x200) {
> > + return "FRACx";
> > + }
> > + switch (addr & 0x1f) {
> > + case A_A2W_PLL_CTRL:
> > + return "CTRL";
> > + case A_A2W_PLL_ANA0:
> > + return "ANA0";
> > + default:
> > + return "UNKN";
> > + }
> > +}
> > +
> > +static const char *pll_name(int idx)
> > +{
> > + static const char *pll_names[8] = {
> > + [0] = "PLLA",
> > + [1] = "PLLC",
> > + [2] = "PLLD",
> > + [3] = "PLLH",
> > + [7] = "PLLB",
> > + };
> > + return pll_names[idx] ? pll_names[idx] : "UNKN";
> > +}
> > +
> > +static uint64_t bcm2835_cprman_a2w_read(void *opaque, hwaddr addr,
> > + unsigned size)
> > +{
> > + uint32_t res = 0;
> > +
> > + if (addr < 0x200) {
> > + /* Power */
> > + switch (addr & 0x1f) {
> > + case A_A2W_PLL_CTRL:
> > + res = R_A2W_PLL_CTRL_POWER_DOWN_MASK; /* On */
This should be R_A2W_PLL_CTRL_POWER_RESET_DISABLE_MASK.
> > + break;
> > + case A_A2W_PLL_ANA0:
> > + break;
> > + }
> > + } else {
> > + /* addr < 0x300 is FREQ, else CHANNEL */
> > + qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n",
> > + __func__, addr);
> > + }
> > + trace_bcm2835_cprman_read(size << 3, addr, "A2W", a2w_name(addr),
> > + pll_name((addr >> 5) & 7), res);
> > +
> > + return res;
> > +}
> > +
> > +static void bcm2835_cprman_a2w_write(void *opaque, hwaddr addr,
> > + uint64_t value, unsigned size)
> > +{
> > + if (FIELD_EX32(value, CPRMAN, PASSWD) != CPRMAN_PASSWD) {
> > + qemu_log_mask(LOG_GUEST_ERROR, "[CPRMAN]: password key error w%02d"
> > + " *0x%04"HWADDR_PRIx" = 0x%"PRIx64"\n",
> > + size << 3, addr, value);
> > + return;
> > + }
> > + value &= ~R_CPRMAN_PASSWD_MASK;
> > +
> > + trace_bcm2835_cprman_write_a2w(addr, a2w_name(addr),
> > + pll_name((addr >> 5) & 7), value);
> > +}
> > +
> > +static const MemoryRegionOps bcm2835_cprman_a2w_ops = {
> > + .read = bcm2835_cprman_a2w_read,
> > + .write = bcm2835_cprman_a2w_write,
> > + .impl.max_access_size = 4,
> > + .valid.min_access_size = 4,
> > + .endianness = DEVICE_NATIVE_ENDIAN,
> > +};
[...]
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 01/19] hw/arm/raspi: Use the IEC binary prefix definitions
2019-09-26 17:34 ` [PATCH 01/19] hw/arm/raspi: Use the IEC binary prefix definitions Philippe Mathieu-Daudé
2019-09-27 21:36 ` Alistair Francis
@ 2019-10-08 8:57 ` Alex Bennée
2019-10-09 0:26 ` Cleber Rosa
2 siblings, 0 replies; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 8:57 UTC (permalink / raw)
To: qemu-arm
Cc: Peter Maydell, Cheng Xiang, Zoltán Baldaszti,
Alistair Francis, qemu-devel, Andrew Baumann,
Philippe Mathieu-Daudé,
Esteban Bosse, Cleber Rosa, Paolo Bonzini, Clement Deschamps,
Marc-André Lureau, Laurent Bonnans,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> IEC binary prefixes ease code review: the unit is explicit.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> hw/arm/raspi.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index 74c062d05e..615d755879 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -230,7 +230,7 @@ static void raspi2_machine_init(MachineClass *mc)
> mc->max_cpus = BCM283X_NCPUS;
> mc->min_cpus = BCM283X_NCPUS;
> mc->default_cpus = BCM283X_NCPUS;
> - mc->default_ram_size = 1024 * 1024 * 1024;
> + mc->default_ram_size = 1 * GiB;
> mc->ignore_memory_transaction_failures = true;
> };
> DEFINE_MACHINE("raspi2", raspi2_machine_init)
> @@ -252,7 +252,7 @@ static void raspi3_machine_init(MachineClass *mc)
> mc->max_cpus = BCM283X_NCPUS;
> mc->min_cpus = BCM283X_NCPUS;
> mc->default_cpus = BCM283X_NCPUS;
> - mc->default_ram_size = 1024 * 1024 * 1024;
> + mc->default_ram_size = 1 * GiB;
> }
> DEFINE_MACHINE("raspi3", raspi3_machine_init)
> #endif
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 02/19] hw/arm/bcm2835_peripherals: Improve logging
2019-09-26 17:34 ` [PATCH 02/19] hw/arm/bcm2835_peripherals: Improve logging Philippe Mathieu-Daudé
2019-09-27 21:37 ` Alistair Francis
@ 2019-10-08 9:00 ` Alex Bennée
2019-10-09 1:28 ` Cleber Rosa
1 sibling, 1 reply; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 9:00 UTC (permalink / raw)
To: qemu-arm
Cc: Peter Maydell, Cheng Xiang, Zoltán Baldaszti,
Alistair Francis, qemu-devel, Andrew Baumann,
Philippe Mathieu-Daudé,
Esteban Bosse, Cleber Rosa, Paolo Bonzini, Clement Deschamps,
Marc-André Lureau, Laurent Bonnans,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> Various logging improvements as once:
> - Use 0x prefix for hex numbers
You can use "%#"PRIxNN"" as an alternative I believe but anyway:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> - Display value written during write accesses
> - Move some logs from GUEST_ERROR to UNIMP
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> v2: Use PRIx64 format (pm215)
> ---
> hw/char/bcm2835_aux.c | 5 +++--
> hw/dma/bcm2835_dma.c | 8 ++++----
> hw/intc/bcm2836_control.c | 7 ++++---
> hw/misc/bcm2835_mbox.c | 7 ++++---
> hw/misc/bcm2835_property.c | 16 ++++++++++------
> 5 files changed, 25 insertions(+), 18 deletions(-)
>
> diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c
> index 3f855196e3..a6fc1bf152 100644
> --- a/hw/char/bcm2835_aux.c
> +++ b/hw/char/bcm2835_aux.c
> @@ -162,8 +162,9 @@ static void bcm2835_aux_write(void *opaque, hwaddr offset, uint64_t value,
> switch (offset) {
> case AUX_ENABLES:
> if (value != 1) {
> - qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI "
> - "or disable UART\n", __func__);
> + qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI"
> + " or disable UART: 0x%"PRIx64"\n",
> + __func__, value);
> }
> break;
>
> diff --git a/hw/dma/bcm2835_dma.c b/hw/dma/bcm2835_dma.c
> index 192bd377a0..6acc2b644e 100644
> --- a/hw/dma/bcm2835_dma.c
> +++ b/hw/dma/bcm2835_dma.c
> @@ -180,7 +180,7 @@ static uint64_t bcm2835_dma_read(BCM2835DMAState *s, hwaddr offset,
> res = ch->debug;
> break;
> default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
> __func__, offset);
> break;
> }
> @@ -228,7 +228,7 @@ static void bcm2835_dma_write(BCM2835DMAState *s, hwaddr offset,
> ch->debug = value;
> break;
> default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
> __func__, offset);
> break;
> }
> @@ -247,7 +247,7 @@ static uint64_t bcm2835_dma0_read(void *opaque, hwaddr offset, unsigned size)
> case BCM2708_DMA_ENABLE:
> return s->enable;
> default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
> __func__, offset);
> return 0;
> }
> @@ -274,7 +274,7 @@ static void bcm2835_dma0_write(void *opaque, hwaddr offset, uint64_t value,
> s->enable = (value & 0xffff);
> break;
> default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
> __func__, offset);
> }
> }
> diff --git a/hw/intc/bcm2836_control.c b/hw/intc/bcm2836_control.c
> index 04229b8a17..61f884ff9e 100644
> --- a/hw/intc/bcm2836_control.c
> +++ b/hw/intc/bcm2836_control.c
> @@ -264,7 +264,7 @@ static uint64_t bcm2836_control_read(void *opaque, hwaddr offset, unsigned size)
> } else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
> return s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2];
> } else {
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
> __func__, offset);
> return 0;
> }
> @@ -293,8 +293,9 @@ static void bcm2836_control_write(void *opaque, hwaddr offset,
> } else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
> s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2] &= ~val;
> } else {
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> - __func__, offset);
> + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx
> + " value 0x%"PRIx64"\n",
> + __func__, offset, val);
> return;
> }
>
> diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c
> index 79bad11631..7690b9afaf 100644
> --- a/hw/misc/bcm2835_mbox.c
> +++ b/hw/misc/bcm2835_mbox.c
> @@ -176,7 +176,7 @@ static uint64_t bcm2835_mbox_read(void *opaque, hwaddr offset, unsigned size)
> break;
>
> default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
> __func__, offset);
> return 0;
> }
> @@ -228,8 +228,9 @@ static void bcm2835_mbox_write(void *opaque, hwaddr offset,
> break;
>
> default:
> - qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
> - __func__, offset);
> + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx
> + " value 0x%"PRIx64"\n",
> + __func__, offset, value);
> return;
> }
>
> diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
> index d86d510572..0a1a3eb5d9 100644
> --- a/hw/misc/bcm2835_property.c
> +++ b/hw/misc/bcm2835_property.c
> @@ -56,7 +56,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
> break;
> case 0x00010001: /* Get board model */
> qemu_log_mask(LOG_UNIMP,
> - "bcm2835_property: %x get board model NYI\n", tag);
> + "bcm2835_property: 0x%08x get board model NYI\n",
> + tag);
> resplen = 4;
> break;
> case 0x00010002: /* Get board revision */
> @@ -69,7 +70,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
> break;
> case 0x00010004: /* Get board serial */
> qemu_log_mask(LOG_UNIMP,
> - "bcm2835_property: %x get board serial NYI\n", tag);
> + "bcm2835_property: 0x%08x get board serial NYI\n",
> + tag);
> resplen = 8;
> break;
> case 0x00010005: /* Get ARM memory */
> @@ -104,7 +106,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
>
> case 0x00038001: /* Set clock state */
> qemu_log_mask(LOG_UNIMP,
> - "bcm2835_property: %x set clock state NYI\n", tag);
> + "bcm2835_property: 0x%08x set clock state NYI\n",
> + tag);
> resplen = 8;
> break;
>
> @@ -129,7 +132,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
> case 0x00038004: /* Set max clock rate */
> case 0x00038007: /* Set min clock rate */
> qemu_log_mask(LOG_UNIMP,
> - "bcm2835_property: %x set clock rates NYI\n", tag);
> + "bcm2835_property: 0x%08x set clock rate NYI\n",
> + tag);
> resplen = 8;
> break;
>
> @@ -274,8 +278,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
> break;
>
> default:
> - qemu_log_mask(LOG_GUEST_ERROR,
> - "bcm2835_property: unhandled tag %08x\n", tag);
> + qemu_log_mask(LOG_UNIMP,
> + "bcm2835_property: unhandled tag 0x%08x\n", tag);
> break;
> }
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 03/19] hw/arm/bcm2835_peripherals: Name various address spaces
2019-09-26 17:34 ` [PATCH 03/19] hw/arm/bcm2835_peripherals: Name various address spaces Philippe Mathieu-Daudé
2019-09-27 21:38 ` Alistair Francis
@ 2019-10-08 9:04 ` Alex Bennée
2019-10-09 1:48 ` Cleber Rosa
2 siblings, 0 replies; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 9:04 UTC (permalink / raw)
To: qemu-arm
Cc: Peter Maydell, Cheng Xiang, Zoltán Baldaszti,
Alistair Francis, qemu-devel, Andrew Baumann,
Philippe Mathieu-Daudé,
Esteban Bosse, Cleber Rosa, Paolo Bonzini, Clement Deschamps,
Marc-André Lureau, Laurent Bonnans,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> Various address spaces from the BCM2835 are reported as
> 'anonymous' in memory tree:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
>
> (qemu) info mtree
>
> address-space: anonymous
> 0000000000000000-000000000000008f (prio 0, i/o): bcm2835-mbox
> 0000000000000010-000000000000001f (prio 0, i/o): bcm2835-fb
> 0000000000000080-000000000000008f (prio 0, i/o): bcm2835-property
>
> address-space: anonymous
> 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
> 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
> 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
>
> [...]
>
> Since the address_space_init() function takes a 'name' argument,
> set it to correctly describe each address space:
>
> (qemu) info mtree
>
> address-space: bcm2835-mbox-memory
> 0000000000000000-000000000000008f (prio 0, i/o): bcm2835-mbox
> 0000000000000010-000000000000001f (prio 0, i/o): bcm2835-fb
> 0000000000000080-000000000000008f (prio 0, i/o): bcm2835-property
>
> address-space: bcm2835-fb-memory
> 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
> 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
> 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
>
> address-space: bcm2835-property-memory
> 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
> 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
> 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
>
> address-space: bcm2835-dma-memory
> 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
> 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
> 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/display/bcm2835_fb.c | 2 +-
> hw/dma/bcm2835_dma.c | 2 +-
> hw/misc/bcm2835_mbox.c | 2 +-
> hw/misc/bcm2835_property.c | 2 +-
> 4 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/display/bcm2835_fb.c b/hw/display/bcm2835_fb.c
> index 8f856878cd..85aaa54330 100644
> --- a/hw/display/bcm2835_fb.c
> +++ b/hw/display/bcm2835_fb.c
> @@ -425,7 +425,7 @@ static void bcm2835_fb_realize(DeviceState *dev, Error **errp)
> s->initial_config.base = s->vcram_base + BCM2835_FB_OFFSET;
>
> s->dma_mr = MEMORY_REGION(obj);
> - address_space_init(&s->dma_as, s->dma_mr, NULL);
> + address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_FB "-memory");
>
> bcm2835_fb_reset(dev);
>
> diff --git a/hw/dma/bcm2835_dma.c b/hw/dma/bcm2835_dma.c
> index 6acc2b644e..1e458d7fba 100644
> --- a/hw/dma/bcm2835_dma.c
> +++ b/hw/dma/bcm2835_dma.c
> @@ -383,7 +383,7 @@ static void bcm2835_dma_realize(DeviceState *dev, Error **errp)
> }
>
> s->dma_mr = MEMORY_REGION(obj);
> - address_space_init(&s->dma_as, s->dma_mr, NULL);
> + address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_DMA "-memory");
>
> bcm2835_dma_reset(dev);
> }
> diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c
> index 7690b9afaf..77285624c9 100644
> --- a/hw/misc/bcm2835_mbox.c
> +++ b/hw/misc/bcm2835_mbox.c
> @@ -311,7 +311,7 @@ static void bcm2835_mbox_realize(DeviceState *dev, Error **errp)
> }
>
> s->mbox_mr = MEMORY_REGION(obj);
> - address_space_init(&s->mbox_as, s->mbox_mr, NULL);
> + address_space_init(&s->mbox_as, s->mbox_mr, TYPE_BCM2835_MBOX "-memory");
> bcm2835_mbox_reset(dev);
> }
>
> diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
> index 0a1a3eb5d9..43a5465c5d 100644
> --- a/hw/misc/bcm2835_property.c
> +++ b/hw/misc/bcm2835_property.c
> @@ -407,7 +407,7 @@ static void bcm2835_property_realize(DeviceState *dev, Error **errp)
> }
>
> s->dma_mr = MEMORY_REGION(obj);
> - address_space_init(&s->dma_as, s->dma_mr, NULL);
> + address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_PROPERTY "-memory");
>
> /* TODO: connect to MAC address of USB NIC device, once we emulate it */
> qemu_macaddr_default_if_unset(&s->macaddr);
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 05/19] hw/arm/bcm2835: Add various unimplemented peripherals
2019-09-27 21:42 ` Alistair Francis
@ 2019-10-08 9:43 ` Philippe Mathieu-Daudé
2019-10-11 21:55 ` Alistair Francis
0 siblings, 1 reply; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-08 9:43 UTC (permalink / raw)
To: Alistair Francis
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, qemu-devel@nongnu.org Developers,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Hi Alistair,
On 9/27/19 11:42 PM, Alistair Francis wrote:
> On Thu, Sep 26, 2019 at 10:44 AM Philippe Mathieu-Daudé
> <f4bug@amsat.org> wrote:
>>
>> Base addresses and sizes taken from the "BCM2835 ARM Peripherals"
>> datasheet from February 06 2012:
>> https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
>>
>> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> hw/arm/bcm2835_peripherals.c | 31 ++++++++++++++++++++++++++++
>> include/hw/arm/bcm2835_peripherals.h | 15 ++++++++++++++
>> include/hw/arm/raspi_platform.h | 8 +++++++
>> 3 files changed, 54 insertions(+)
>>
>> diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
>> index 1bd2ff41d5..fdcf616c56 100644
>> --- a/hw/arm/bcm2835_peripherals.c
>> +++ b/hw/arm/bcm2835_peripherals.c
>> @@ -22,6 +22,20 @@
>> /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
>> #define BCM2835_SDHC_CAPAREG 0x52134b4
>>
>> +static void create_unimp(BCM2835PeripheralState *ps,
>> + UnimplementedDeviceState *uds,
>> + const char *name, hwaddr ofs, hwaddr size)
>> +{
>> + sysbus_init_child_obj(OBJECT(ps), name, uds,
>> + sizeof(UnimplementedDeviceState),
>> + TYPE_UNIMPLEMENTED_DEVICE);
>> + qdev_prop_set_string(DEVICE(uds), "name", name);
>> + qdev_prop_set_uint64(DEVICE(uds), "size", size);
>> + object_property_set_bool(OBJECT(uds), true, "realized", &error_fatal);
>> + memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
>> + sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
>
> Why not just use create_unimplemented_device() and not bother saving
> the UnimplementedDeviceState members in the struct?
create_unimplemented_device() calls
-> sysbus_mmio_map_overlap()
-> sysbus_mmio_map_common()
-> memory_region_del_subregion(get_system_memory())
So it maps the device at *absolute* offset in the system memory.
create_unimp() maps the device at offset *relative* to peri_mr.
Patch 8 of this series maps the PERI (container) block at peri_base
(fixed at BCM2836_PERI_BASE=0x3F000000 for the 2836/2837), then patch 12
adds the 2838 which has PERI mapped at 0xfe000000. So we have the same
"container" block mapped at different addresses.
Not the PERI block itself doesn't know its base address, all offsets are
relative.
So using create_unimp() allow to use the same block in two different SoCs.
8: https://lists.gnu.org/archive/html/qemu-devel/2019-09/msg00678.html
12: https://lists.gnu.org/archive/html/qemu-devel/2019-09/msg00684.html
>> +}
>> +
>> static void bcm2835_peripherals_init(Object *obj)
>> {
>> BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
>> @@ -323,6 +337,23 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
>> error_propagate(errp, err);
>> return;
>> }
>> +
>> + create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
>> + create_unimp(s, &s->systmr, "bcm2835-systimer", ST_OFFSET, 0x20);
>> + create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
>> + create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
>> + create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
>> + create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
>> + create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
>> + create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
>> + create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20);
>> + create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20);
>> + create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20);
>> + create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
>> + create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
>> + create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
>> + create_unimp(s, &s->dwc2, "dwc-usb2", USB_OTG_OFFSET, 0x1000);
>> + create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
>> }
>>
>> static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
>> diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
>> index 6b17f6a382..62a4c7b559 100644
>> --- a/include/hw/arm/bcm2835_peripherals.h
>> +++ b/include/hw/arm/bcm2835_peripherals.h
>> @@ -23,6 +23,7 @@
>> #include "hw/sd/sdhci.h"
>> #include "hw/sd/bcm2835_sdhost.h"
>> #include "hw/gpio/bcm2835_gpio.h"
>> +#include "hw/misc/unimp.h"
>>
>> #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
>> #define BCM2835_PERIPHERALS(obj) \
>> @@ -37,6 +38,10 @@ typedef struct BCM2835PeripheralState {
>> MemoryRegion ram_alias[4];
>> qemu_irq irq, fiq;
>>
>> + UnimplementedDeviceState systmr;
>> + UnimplementedDeviceState armtmr;
>> + UnimplementedDeviceState cprman;
>> + UnimplementedDeviceState a2w;
>> PL011State uart0;
>> BCM2835AuxState aux;
>> BCM2835FBState fb;
>> @@ -48,6 +53,16 @@ typedef struct BCM2835PeripheralState {
>> SDHCIState sdhci;
>> BCM2835SDHostState sdhost;
>> BCM2835GpioState gpio;
>> + UnimplementedDeviceState i2s;
>> + UnimplementedDeviceState spi[1];
>> + UnimplementedDeviceState i2c[3];
>> + UnimplementedDeviceState otp;
>> + UnimplementedDeviceState dbus;
>> + UnimplementedDeviceState ave0;
>> + UnimplementedDeviceState bscsl;
>> + UnimplementedDeviceState smi;
>> + UnimplementedDeviceState dwc2;
>> + UnimplementedDeviceState sdramc;
>> } BCM2835PeripheralState;
>>
>> #endif /* BCM2835_PERIPHERALS_H */
>> diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
>> index 66969fac5d..cdcbca943f 100644
>> --- a/include/hw/arm/raspi_platform.h
>> +++ b/include/hw/arm/raspi_platform.h
>> @@ -38,6 +38,8 @@
>> * Doorbells & Mailboxes */
>> #define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
>> #define CM_OFFSET 0x101000 /* Clock Management */
>> +#define A2W_OFFSET 0x102000 /* Reset controller */
>> +#define AVS_OFFSET 0x103000 /* Audio Video Standard */
>> #define RNG_OFFSET 0x104000
>> #define GPIO_OFFSET 0x200000
>> #define UART0_OFFSET 0x201000
>> @@ -45,11 +47,17 @@
>> #define I2S_OFFSET 0x203000
>> #define SPI0_OFFSET 0x204000
>> #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
>> +#define OTP_OFFSET 0x20f000
>> +#define BSC_SL_OFFSET 0x214000 /* SPI slave */
>> #define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
>> #define EMMC1_OFFSET 0x300000
>> #define SMI_OFFSET 0x600000
>> #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */
>> +#define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */
>> +#define DBUS_OFFSET 0x900000
>> +#define AVE0_OFFSET 0x910000
>> #define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */
>> +#define SDRAMC_OFFSET 0xe00000
>> #define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */
>>
>> /* GPU interrupts */
>> --
>> 2.20.1
>>
>>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 04/19] hw/arm/bcm2835: Rename some definitions
2019-09-26 17:34 ` [PATCH 04/19] hw/arm/bcm2835: Rename some definitions Philippe Mathieu-Daudé
2019-09-27 21:40 ` Alistair Francis
@ 2019-10-08 10:40 ` Alex Bennée
1 sibling, 0 replies; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 10:40 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> The UART1 is part of the AUX peripheral,
> the PCM_CLOCK (yet unimplemented) is part of the CPRMAN.
>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> I dunno if this is OK to do that since the header has:
>
> * These definitions are derived from those in Raspbian Linux at
> * arch/arm/mach-{bcm2708,bcm2709}/include/mach/platform.h
> * where they carry the following notice:
FWIW these seem to have moved about. I couldn't find stuff in the
upstream Linux tree but in the raspbian kernel tree there is stuff in:
include/linux/platform_data
but I couldn't find the exact place for these definitions. However I
wouldn't worry too much if they did come from a distributed kernel they
should be GPLv2.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> *
> * Copyright (C) 2010 Broadcom
> ---
> hw/arm/bcm2835_peripherals.c | 7 ++++---
> hw/arm/bcm2836.c | 2 +-
> include/hw/arm/raspi_platform.h | 16 +++++++---------
> 3 files changed, 12 insertions(+), 13 deletions(-)
>
> diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
> index 8984e2e91f..1bd2ff41d5 100644
> --- a/hw/arm/bcm2835_peripherals.c
> +++ b/hw/arm/bcm2835_peripherals.c
> @@ -165,7 +165,8 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0));
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0,
> qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
> - INTERRUPT_UART));
> + INTERRUPT_UART0));
> +
> /* AUX / UART1 */
> qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1));
>
> @@ -175,7 +176,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> return;
> }
>
> - memory_region_add_subregion(&s->peri_mr, UART1_OFFSET,
> + memory_region_add_subregion(&s->peri_mr, AUX_OFFSET,
> sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
> qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
> @@ -268,7 +269,7 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> return;
> }
>
> - memory_region_add_subregion(&s->peri_mr, EMMC_OFFSET,
> + memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET,
> sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
> qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index 493a913f89..723aef6bf5 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -126,7 +126,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
>
> /* set periphbase/CBAR value for CPU-local registers */
> object_property_set_int(OBJECT(&s->cpus[n]),
> - BCM2836_PERI_BASE + MCORE_OFFSET,
> + BCM2836_PERI_BASE + MSYNC_OFFSET,
> "reset-cbar", &err);
> if (err) {
> error_propagate(errp, err);
> diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
> index 10083d33df..66969fac5d 100644
> --- a/include/hw/arm/raspi_platform.h
> +++ b/include/hw/arm/raspi_platform.h
> @@ -25,8 +25,7 @@
> #ifndef HW_ARM_RASPI_PLATFORM_H
> #define HW_ARM_RASPI_PLATFORM_H
>
> -#define MCORE_OFFSET 0x0000 /* Fake frame buffer device
> - * (the multicore sync block) */
> +#define MSYNC_OFFSET 0x0000 /* Multicore Sync Block */
> #define IC0_OFFSET 0x2000
> #define ST_OFFSET 0x3000 /* System Timer */
> #define MPHI_OFFSET 0x6000 /* Message-based Parallel Host Intf. */
> @@ -37,9 +36,8 @@
> #define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 */
> #define ARMCTRL_0_SBM_OFFSET (ARM_OFFSET + 0x800) /* User 0 (ARM) Semaphores
> * Doorbells & Mailboxes */
> -#define PM_OFFSET 0x100000 /* Power Management, Reset controller
> - * and Watchdog registers */
> -#define PCM_CLOCK_OFFSET 0x101098
> +#define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
> +#define CM_OFFSET 0x101000 /* Clock Management */
> #define RNG_OFFSET 0x104000
> #define GPIO_OFFSET 0x200000
> #define UART0_OFFSET 0x201000
> @@ -47,11 +45,11 @@
> #define I2S_OFFSET 0x203000
> #define SPI0_OFFSET 0x204000
> #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
> -#define UART1_OFFSET 0x215000
> -#define EMMC_OFFSET 0x300000
> +#define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
> +#define EMMC1_OFFSET 0x300000
> #define SMI_OFFSET 0x600000
> #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */
> -#define USB_OFFSET 0x980000 /* DTC_OTG USB controller */
> +#define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */
> #define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */
>
> /* GPU interrupts */
> @@ -112,7 +110,7 @@
> #define INTERRUPT_SPI 54
> #define INTERRUPT_I2SPCM 55
> #define INTERRUPT_SDIO 56
> -#define INTERRUPT_UART 57
> +#define INTERRUPT_UART0 57
> #define INTERRUPT_SLIMBUS 58
> #define INTERRUPT_VEC 59
> #define INTERRUPT_CPG 60
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 05/19] hw/arm/bcm2835: Add various unimplemented peripherals
2019-09-26 17:34 ` [PATCH 05/19] hw/arm/bcm2835: Add various unimplemented peripherals Philippe Mathieu-Daudé
2019-09-27 21:42 ` Alistair Francis
@ 2019-10-08 11:09 ` Alex Bennée
1 sibling, 0 replies; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 11:09 UTC (permalink / raw)
To: qemu-arm
Cc: Peter Maydell, Cheng Xiang, Zoltán Baldaszti,
Alistair Francis, qemu-devel, Andrew Baumann,
Philippe Mathieu-Daudé,
Esteban Bosse, Cleber Rosa, Paolo Bonzini, Clement Deschamps,
Marc-André Lureau, Laurent Bonnans,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> Base addresses and sizes taken from the "BCM2835 ARM Peripherals"
> datasheet from February 06 2012:
> https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> hw/arm/bcm2835_peripherals.c | 31 ++++++++++++++++++++++++++++
> include/hw/arm/bcm2835_peripherals.h | 15 ++++++++++++++
> include/hw/arm/raspi_platform.h | 8 +++++++
> 3 files changed, 54 insertions(+)
>
> diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
> index 1bd2ff41d5..fdcf616c56 100644
> --- a/hw/arm/bcm2835_peripherals.c
> +++ b/hw/arm/bcm2835_peripherals.c
> @@ -22,6 +22,20 @@
> /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
> #define BCM2835_SDHC_CAPAREG 0x52134b4
>
> +static void create_unimp(BCM2835PeripheralState *ps,
> + UnimplementedDeviceState *uds,
> + const char *name, hwaddr ofs, hwaddr size)
> +{
> + sysbus_init_child_obj(OBJECT(ps), name, uds,
> + sizeof(UnimplementedDeviceState),
> + TYPE_UNIMPLEMENTED_DEVICE);
> + qdev_prop_set_string(DEVICE(uds), "name", name);
> + qdev_prop_set_uint64(DEVICE(uds), "size", size);
> + object_property_set_bool(OBJECT(uds), true, "realized", &error_fatal);
> + memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
> + sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
> +}
> +
> static void bcm2835_peripherals_init(Object *obj)
> {
> BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
> @@ -323,6 +337,23 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> error_propagate(errp, err);
> return;
> }
> +
> + create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
> + create_unimp(s, &s->systmr, "bcm2835-systimer", ST_OFFSET, 0x20);
> + create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
> + create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
> + create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
> + create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
> + create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
> + create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
> + create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20);
> + create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20);
> + create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20);
> + create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
> + create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
> + create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
> + create_unimp(s, &s->dwc2, "dwc-usb2", USB_OTG_OFFSET, 0x1000);
> + create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
> }
>
> static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
> diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
> index 6b17f6a382..62a4c7b559 100644
> --- a/include/hw/arm/bcm2835_peripherals.h
> +++ b/include/hw/arm/bcm2835_peripherals.h
> @@ -23,6 +23,7 @@
> #include "hw/sd/sdhci.h"
> #include "hw/sd/bcm2835_sdhost.h"
> #include "hw/gpio/bcm2835_gpio.h"
> +#include "hw/misc/unimp.h"
>
> #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
> #define BCM2835_PERIPHERALS(obj) \
> @@ -37,6 +38,10 @@ typedef struct BCM2835PeripheralState {
> MemoryRegion ram_alias[4];
> qemu_irq irq, fiq;
>
> + UnimplementedDeviceState systmr;
> + UnimplementedDeviceState armtmr;
> + UnimplementedDeviceState cprman;
> + UnimplementedDeviceState a2w;
> PL011State uart0;
> BCM2835AuxState aux;
> BCM2835FBState fb;
> @@ -48,6 +53,16 @@ typedef struct BCM2835PeripheralState {
> SDHCIState sdhci;
> BCM2835SDHostState sdhost;
> BCM2835GpioState gpio;
> + UnimplementedDeviceState i2s;
> + UnimplementedDeviceState spi[1];
> + UnimplementedDeviceState i2c[3];
> + UnimplementedDeviceState otp;
> + UnimplementedDeviceState dbus;
> + UnimplementedDeviceState ave0;
> + UnimplementedDeviceState bscsl;
> + UnimplementedDeviceState smi;
> + UnimplementedDeviceState dwc2;
> + UnimplementedDeviceState sdramc;
> } BCM2835PeripheralState;
>
> #endif /* BCM2835_PERIPHERALS_H */
> diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
> index 66969fac5d..cdcbca943f 100644
> --- a/include/hw/arm/raspi_platform.h
> +++ b/include/hw/arm/raspi_platform.h
> @@ -38,6 +38,8 @@
> * Doorbells & Mailboxes */
> #define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
> #define CM_OFFSET 0x101000 /* Clock Management */
> +#define A2W_OFFSET 0x102000 /* Reset controller */
> +#define AVS_OFFSET 0x103000 /* Audio Video Standard */
> #define RNG_OFFSET 0x104000
> #define GPIO_OFFSET 0x200000
> #define UART0_OFFSET 0x201000
> @@ -45,11 +47,17 @@
> #define I2S_OFFSET 0x203000
> #define SPI0_OFFSET 0x204000
> #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
> +#define OTP_OFFSET 0x20f000
> +#define BSC_SL_OFFSET 0x214000 /* SPI slave */
> #define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
> #define EMMC1_OFFSET 0x300000
> #define SMI_OFFSET 0x600000
> #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */
> +#define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */
> +#define DBUS_OFFSET 0x900000
> +#define AVE0_OFFSET 0x910000
> #define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */
> +#define SDRAMC_OFFSET 0xe00000
> #define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */
>
> /* GPU interrupts */
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 06/19] hw/char/bcm2835_aux: Add trace events
2019-09-26 17:34 ` [PATCH 06/19] hw/char/bcm2835_aux: Add trace events Philippe Mathieu-Daudé
@ 2019-10-08 11:22 ` Alex Bennée
2019-10-14 15:36 ` Peter Maydell
1 sibling, 0 replies; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 11:22 UTC (permalink / raw)
To: qemu-arm
Cc: Peter Maydell, Cheng Xiang, Zoltán Baldaszti,
Alistair Francis, qemu-devel, Andrew Baumann,
Philippe Mathieu-Daudé,
Esteban Bosse, Cleber Rosa, Paolo Bonzini, Clement Deschamps,
Marc-André Lureau, Laurent Bonnans,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> The BCM2835 AUX UART is compatible with the 16650 model, when
> the registers belong the the 16650 block, use its trace events,
> else use bcm2835_aux_read/write.
My only concern here is how we surface that detail to the potential
user. It's not a major thing as I assume most users of the trace points
are developers so maybe...
> diff --git a/hw/char/trace-events b/hw/char/trace-events
> index 2ce7f2f998..a7d477ab1e 100644
> --- a/hw/char/trace-events
> +++ b/hw/char/trace-events
> @@ -1,5 +1,9 @@
> # See docs/devel/tracing.txt for syntax documentation.
>
> +# bcm2835_aux.c
"(accesses to the 16650 areas are logged via the serial_ioport_write tracepoint)"?
> +bcm2835_aux_read(uint64_t addr, uint32_t value) "read addr 0x%"PRIx64" value 0x%x"
> +bcm2835_aux_write(uint64_t addr, uint32_t value) "read addr 0x%"PRIx64" value 0x%x"
> +
> # parallel.c
> parallel_ioport_read(const char *desc, uint16_t addr, uint8_t value) "read [%s] addr 0x%02x val 0x%02x"
> parallel_ioport_write(const char *desc, uint16_t addr, uint8_t value) "write [%s] addr 0x%02x val 0x%02x"
Otherwise:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 07/19] hw/misc/bcm2835_mbox: Add trace events
2019-09-26 17:34 ` [PATCH 07/19] hw/misc/bcm2835_mbox: " Philippe Mathieu-Daudé
@ 2019-10-08 11:32 ` Alex Bennée
2019-10-08 11:38 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 11:32 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> Add trace events for read/write accesses and IRQ.
>
> Properties are structures used for the ARM particular MBOX.
> Since one call in bcm2835_property.c concerns the mbox block,
> name this trace event in the same bcm2835_mbox* namespace.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/misc/bcm2835_mbox.c | 5 +++++
> hw/misc/bcm2835_property.c | 2 ++
> hw/misc/trace-events | 6 ++++++
> 3 files changed, 13 insertions(+)
>
> diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c
> index 77285624c9..77d2d80706 100644
> --- a/hw/misc/bcm2835_mbox.c
> +++ b/hw/misc/bcm2835_mbox.c
> @@ -15,6 +15,7 @@
> #include "migration/vmstate.h"
> #include "qemu/log.h"
> #include "qemu/module.h"
> +#include "trace.h"
>
> #define MAIL0_PEEK 0x90
> #define MAIL0_SENDER 0x94
> @@ -123,6 +124,7 @@ static void bcm2835_mbox_update(BCM2835MboxState *s)
> set = true;
> }
> }
> + trace_bcm2835_mbox_irq(set);
> qemu_set_irq(s->arm_irq, set);
I'm kind surprised we don't have a common trace point for all IRQs.
> }
>
> @@ -178,8 +180,10 @@ static uint64_t bcm2835_mbox_read(void *opaque, hwaddr offset, unsigned size)
> default:
> qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
> __func__, offset);
> + trace_bcm2835_mbox_read(size, offset, res);
> return 0;
> }
> + trace_bcm2835_mbox_read(size, offset, res);
>
> bcm2835_mbox_update(s);
>
> @@ -195,6 +199,7 @@ static void bcm2835_mbox_write(void *opaque, hwaddr offset,
>
> offset &= 0xff;
>
> + trace_bcm2835_mbox_write(size, offset, value);
> switch (offset) {
> case MAIL0_SENDER:
> break;
> diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
> index 43a5465c5d..0eea2e20f7 100644
> --- a/hw/misc/bcm2835_property.c
> +++ b/hw/misc/bcm2835_property.c
> @@ -13,6 +13,7 @@
> #include "sysemu/dma.h"
> #include "qemu/log.h"
> #include "qemu/module.h"
> +#include "trace.h"
>
> /* https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface */
>
> @@ -283,6 +284,7 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
> break;
> }
>
> + trace_bcm2835_mbox_property(tag, bufsize, resplen);
> if (tag == 0) {
> break;
> }
> diff --git a/hw/misc/trace-events b/hw/misc/trace-events
> index 74276225f8..1deb1d08c1 100644
> --- a/hw/misc/trace-events
> +++ b/hw/misc/trace-events
> @@ -143,3 +143,9 @@ armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU wri
>
> # aspeed_xdma.c
> aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64
> +
> +# bcm2835_mbox.c
> +bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
> +bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
> +bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
> +bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
Anyway:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 08/19] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
2019-09-26 17:34 ` [PATCH 08/19] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor Philippe Mathieu-Daudé
@ 2019-10-08 11:36 ` Alex Bennée
2019-10-08 11:42 ` Philippe Mathieu-Daudé
2019-10-14 15:37 ` Peter Maydell
1 sibling, 1 reply; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 11:36 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> We will soon implement the SYS_timer. This timer is used by Linux
> in the thermal subsystem, so once available, the subsystem will be
> enabled and poll the temperature sensors. We need to provide the
> minimum required to keep Linux booting.
>
> Add a dummy thermal sensor returning ~25°C based on:
> https://github.com/raspberrypi/linux/blob/rpi-5.3.y/drivers/thermal/broadcom/bcm2835_thermal.c
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> checkpatch warning:
> WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
> This is OK because the regex are:
>
> F: hw/*/bcm283*
> F: include/hw/*/bcm283*
> ---
> hw/misc/Makefile.objs | 1 +
> hw/misc/bcm2835_thermal.c | 109 ++++++++++++++++++++++++++++++
> include/hw/misc/bcm2835_thermal.h | 27 ++++++++
> 3 files changed, 137 insertions(+)
> create mode 100644 hw/misc/bcm2835_thermal.c
> create mode 100644 include/hw/misc/bcm2835_thermal.h
>
> diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
> index a150680966..c89f3816a5 100644
> --- a/hw/misc/Makefile.objs
> +++ b/hw/misc/Makefile.objs
> @@ -53,6 +53,7 @@ common-obj-$(CONFIG_OMAP) += omap_tap.o
> common-obj-$(CONFIG_RASPI) += bcm2835_mbox.o
> common-obj-$(CONFIG_RASPI) += bcm2835_property.o
> common-obj-$(CONFIG_RASPI) += bcm2835_rng.o
> +common-obj-$(CONFIG_RASPI) += bcm2835_thermal.o
> common-obj-$(CONFIG_SLAVIO) += slavio_misc.o
> common-obj-$(CONFIG_ZYNQ) += zynq_slcr.o
> common-obj-$(CONFIG_ZYNQ) += zynq-xadc.o
> diff --git a/hw/misc/bcm2835_thermal.c b/hw/misc/bcm2835_thermal.c
> new file mode 100644
> index 0000000000..bac23f21ea
> --- /dev/null
> +++ b/hw/misc/bcm2835_thermal.c
> @@ -0,0 +1,109 @@
> +/*
> + * BCM2835 dummy thermal sensor
> + *
> + * Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +#include "qemu/osdep.h"
> +#include "hw/sysbus.h"
> +#include "hw/misc/bcm2835_thermal.h"
> +#include "qemu/log.h"
> +#include "qapi/error.h"
> +#include "hw/registerfields.h"
> +
> +REG32(CTL, 0)
> +FIELD(CTL, POWER_DOWN, 0, 1)
> +FIELD(CTL, RESET, 1, 1)
> +FIELD(CTL, BANDGAP_CTRL, 2, 3)
> +FIELD(CTL, INTERRUPT_ENABLE, 5, 1)
> +FIELD(CTL, DIRECT, 6, 1)
> +FIELD(CTL, INTERRUPT_CLEAR, 7, 1)
> +FIELD(CTL, HOLD, 8, 10)
> +FIELD(CTL, RESET_DELAY, 18, 8)
> +FIELD(CTL, REGULATOR_ENABLE, 26, 1)
> +
> +REG32(STAT, 4)
> +FIELD(STAT, DATA, 0, 10)
> +FIELD(STAT, VALID, 10, 1)
> +FIELD(STAT, INTERRUPT, 11, 1)
> +
> +#define THERMAL_OFFSET_C 412
> +#define THERMAL_COEFF (-0.538f)
> +
> +static uint16_t bcm2835_thermal_temp2adc(int temp_C)
> +{
> + return (temp_C - THERMAL_OFFSET_C) / THERMAL_COEFF;
> +}
> +
> +static uint64_t bcm2835_thermal_read(void *opaque, hwaddr addr, unsigned size)
> +{
> + Bcm2835ThermalState *s = BCM2835_THERMAL(opaque);
> + uint32_t val = 0;
> +
> + switch (addr) {
> + case A_CTL:
> + val = s->ctl;
> + break;
> + case A_STAT:
> + val = FIELD_DP32(bcm2835_thermal_temp2adc(25), STAT, VALID, true);
> + break;
> + default:
> + g_assert_not_reached();
Will a unaligned read already have faulted and delivered an exception to
the guest? As this access it controlled by the guest it could
potentially take down QEMU. Perhaps it should be a LOG_GUEST_ERROR as
bellow?
> + }
> + return val;
> +}
> +
> +static void bcm2835_thermal_write(void *opaque, hwaddr addr,
> + uint64_t value, unsigned size)
> +{
> + Bcm2835ThermalState *s = BCM2835_THERMAL(opaque);
> +
> + switch (addr) {
> + case A_CTL:
> + s->ctl = value;
> + break;
> + default:
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: write 0x%" PRIx64
> + " to 0x%" HWADDR_PRIx "\n",
> + __func__, value, addr);
> + }
> +}
> +
> +static const MemoryRegionOps bcm2835_thermal_ops = {
> + .read = bcm2835_thermal_read,
> + .write = bcm2835_thermal_write,
> + .impl.max_access_size = 4,
> + .valid.min_access_size = 4,
> + .endianness = DEVICE_NATIVE_ENDIAN,
> +};
> +
> +static void bcm2835_thermal_realize(DeviceState *dev, Error **errp)
> +{
> + Bcm2835ThermalState *s = BCM2835_THERMAL(dev);
> +
> + memory_region_init_io(&s->iomem, OBJECT(s), &bcm2835_thermal_ops,
> + s, TYPE_BCM2835_THERMAL, 8);
> + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem);
> +}
> +
> +static void bcm2835_thermal_class_init(ObjectClass *klass, void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(klass);
> +
> + dc->realize = bcm2835_thermal_realize;
> +}
> +
> +static const TypeInfo bcm2835_thermal_info = {
> + .name = TYPE_BCM2835_THERMAL,
> + .parent = TYPE_SYS_BUS_DEVICE,
> + .instance_size = sizeof(Bcm2835ThermalState),
> + .class_init = bcm2835_thermal_class_init,
> +};
> +
> +static void bcm2835_thermal_register_types(void)
> +{
> + type_register_static(&bcm2835_thermal_info);
> +}
> +
> +type_init(bcm2835_thermal_register_types)
> diff --git a/include/hw/misc/bcm2835_thermal.h b/include/hw/misc/bcm2835_thermal.h
> new file mode 100644
> index 0000000000..f85cce7214
> --- /dev/null
> +++ b/include/hw/misc/bcm2835_thermal.h
> @@ -0,0 +1,27 @@
> +/*
> + * BCM2835 dummy thermal sensor
> + *
> + * Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +#ifndef HW_MISC_BCM2835_THERMAL_H
> +#define HW_MISC_BCM2835_THERMAL_H
> +
> +#include "hw/qdev-properties.h"
> +#include "hw/sysbus.h"
> +
> +#define TYPE_BCM2835_THERMAL "bcm2835-thermal"
> +
> +#define BCM2835_THERMAL(obj) \
> + OBJECT_CHECK(Bcm2835ThermalState, (obj), TYPE_BCM2835_THERMAL)
> +
> +typedef struct {
> + /*< private >*/
> + SysBusDevice parent_obj;
> + /*< public >*/
> + MemoryRegion iomem;
> + uint32_t ctl;
> +} Bcm2835ThermalState;
> +
> +#endif
Otherwise:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 07/19] hw/misc/bcm2835_mbox: Add trace events
2019-10-08 11:32 ` Alex Bennée
@ 2019-10-08 11:38 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-08 11:38 UTC (permalink / raw)
To: Alex Bennée, qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Pekka Enberg, Guenter Roeck, Eduardo Habkost
On 10/8/19 1:32 PM, Alex Bennée wrote:
>
> Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
>
>> Add trace events for read/write accesses and IRQ.
>>
>> Properties are structures used for the ARM particular MBOX.
>> Since one call in bcm2835_property.c concerns the mbox block,
>> name this trace event in the same bcm2835_mbox* namespace.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> hw/misc/bcm2835_mbox.c | 5 +++++
>> hw/misc/bcm2835_property.c | 2 ++
>> hw/misc/trace-events | 6 ++++++
>> 3 files changed, 13 insertions(+)
>>
>> diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c
>> index 77285624c9..77d2d80706 100644
>> --- a/hw/misc/bcm2835_mbox.c
>> +++ b/hw/misc/bcm2835_mbox.c
>> @@ -15,6 +15,7 @@
>> #include "migration/vmstate.h"
>> #include "qemu/log.h"
>> #include "qemu/module.h"
>> +#include "trace.h"
>>
>> #define MAIL0_PEEK 0x90
>> #define MAIL0_SENDER 0x94
>> @@ -123,6 +124,7 @@ static void bcm2835_mbox_update(BCM2835MboxState *s)
>> set = true;
>> }
>> }
>> + trace_bcm2835_mbox_irq(set);
>> qemu_set_irq(s->arm_irq, set);
>
> I'm kind surprised we don't have a common trace point for all IRQs.
Trace event names are used for filtering. You usually don't want to
display all the IRQs, but rather a filtered set of devices you are
working on/analyzing.
>> }
>>
>> @@ -178,8 +180,10 @@ static uint64_t bcm2835_mbox_read(void *opaque, hwaddr offset, unsigned size)
>> default:
>> qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
>> __func__, offset);
>> + trace_bcm2835_mbox_read(size, offset, res);
>> return 0;
>> }
>> + trace_bcm2835_mbox_read(size, offset, res);
>>
>> bcm2835_mbox_update(s);
>>
>> @@ -195,6 +199,7 @@ static void bcm2835_mbox_write(void *opaque, hwaddr offset,
>>
>> offset &= 0xff;
>>
>> + trace_bcm2835_mbox_write(size, offset, value);
>> switch (offset) {
>> case MAIL0_SENDER:
>> break;
>> diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
>> index 43a5465c5d..0eea2e20f7 100644
>> --- a/hw/misc/bcm2835_property.c
>> +++ b/hw/misc/bcm2835_property.c
>> @@ -13,6 +13,7 @@
>> #include "sysemu/dma.h"
>> #include "qemu/log.h"
>> #include "qemu/module.h"
>> +#include "trace.h"
>>
>> /* https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface */
>>
>> @@ -283,6 +284,7 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
>> break;
>> }
>>
>> + trace_bcm2835_mbox_property(tag, bufsize, resplen);
>> if (tag == 0) {
>> break;
>> }
>> diff --git a/hw/misc/trace-events b/hw/misc/trace-events
>> index 74276225f8..1deb1d08c1 100644
>> --- a/hw/misc/trace-events
>> +++ b/hw/misc/trace-events
>> @@ -143,3 +143,9 @@ armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU wri
>>
>> # aspeed_xdma.c
>> aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64
>> +
>> +# bcm2835_mbox.c
>> +bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
>> +bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
>> +bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
>> +bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
>
> Anyway:
>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Thanks!
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 08/19] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
2019-10-08 11:36 ` Alex Bennée
@ 2019-10-08 11:42 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-08 11:42 UTC (permalink / raw)
To: Alex Bennée, qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Pekka Enberg, Guenter Roeck, Eduardo Habkost
On 10/8/19 1:36 PM, Alex Bennée wrote:
> Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
>
>> We will soon implement the SYS_timer. This timer is used by Linux
>> in the thermal subsystem, so once available, the subsystem will be
>> enabled and poll the temperature sensors. We need to provide the
>> minimum required to keep Linux booting.
>>
>> Add a dummy thermal sensor returning ~25°C based on:
>> https://github.com/raspberrypi/linux/blob/rpi-5.3.y/drivers/thermal/broadcom/bcm2835_thermal.c
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> checkpatch warning:
>> WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
>> This is OK because the regex are:
>>
>> F: hw/*/bcm283*
>> F: include/hw/*/bcm283*
>> ---
>> hw/misc/Makefile.objs | 1 +
>> hw/misc/bcm2835_thermal.c | 109 ++++++++++++++++++++++++++++++
>> include/hw/misc/bcm2835_thermal.h | 27 ++++++++
>> 3 files changed, 137 insertions(+)
>> create mode 100644 hw/misc/bcm2835_thermal.c
>> create mode 100644 include/hw/misc/bcm2835_thermal.h
>>
>> diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
>> index a150680966..c89f3816a5 100644
>> --- a/hw/misc/Makefile.objs
>> +++ b/hw/misc/Makefile.objs
>> @@ -53,6 +53,7 @@ common-obj-$(CONFIG_OMAP) += omap_tap.o
>> common-obj-$(CONFIG_RASPI) += bcm2835_mbox.o
>> common-obj-$(CONFIG_RASPI) += bcm2835_property.o
>> common-obj-$(CONFIG_RASPI) += bcm2835_rng.o
>> +common-obj-$(CONFIG_RASPI) += bcm2835_thermal.o
>> common-obj-$(CONFIG_SLAVIO) += slavio_misc.o
>> common-obj-$(CONFIG_ZYNQ) += zynq_slcr.o
>> common-obj-$(CONFIG_ZYNQ) += zynq-xadc.o
>> diff --git a/hw/misc/bcm2835_thermal.c b/hw/misc/bcm2835_thermal.c
>> new file mode 100644
>> index 0000000000..bac23f21ea
>> --- /dev/null
>> +++ b/hw/misc/bcm2835_thermal.c
>> @@ -0,0 +1,109 @@
>> +/*
>> + * BCM2835 dummy thermal sensor
>> + *
>> + * Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0-or-later
>> + */
>> +#include "qemu/osdep.h"
>> +#include "hw/sysbus.h"
>> +#include "hw/misc/bcm2835_thermal.h"
>> +#include "qemu/log.h"
>> +#include "qapi/error.h"
>> +#include "hw/registerfields.h"
>> +
>> +REG32(CTL, 0)
>> +FIELD(CTL, POWER_DOWN, 0, 1)
>> +FIELD(CTL, RESET, 1, 1)
>> +FIELD(CTL, BANDGAP_CTRL, 2, 3)
>> +FIELD(CTL, INTERRUPT_ENABLE, 5, 1)
>> +FIELD(CTL, DIRECT, 6, 1)
>> +FIELD(CTL, INTERRUPT_CLEAR, 7, 1)
>> +FIELD(CTL, HOLD, 8, 10)
>> +FIELD(CTL, RESET_DELAY, 18, 8)
>> +FIELD(CTL, REGULATOR_ENABLE, 26, 1)
>> +
>> +REG32(STAT, 4)
>> +FIELD(STAT, DATA, 0, 10)
>> +FIELD(STAT, VALID, 10, 1)
>> +FIELD(STAT, INTERRUPT, 11, 1)
>> +
>> +#define THERMAL_OFFSET_C 412
>> +#define THERMAL_COEFF (-0.538f)
>> +
>> +static uint16_t bcm2835_thermal_temp2adc(int temp_C)
>> +{
>> + return (temp_C - THERMAL_OFFSET_C) / THERMAL_COEFF;
>> +}
>> +
>> +static uint64_t bcm2835_thermal_read(void *opaque, hwaddr addr, unsigned size)
>> +{
>> + Bcm2835ThermalState *s = BCM2835_THERMAL(opaque);
>> + uint32_t val = 0;
>> +
>> + switch (addr) {
>> + case A_CTL:
>> + val = s->ctl;
>> + break;
>> + case A_STAT:
>> + val = FIELD_DP32(bcm2835_thermal_temp2adc(25), STAT, VALID, true);
>> + break;
>> + default:
>> + g_assert_not_reached();
>
> Will a unaligned read already have faulted and delivered an exception to
> the guest? As this access it controlled by the guest it could
> potentially take down QEMU. Perhaps it should be a LOG_GUEST_ERROR as
> bellow?
MemoryRegionOps::(valid|impl).unaligned default to false, so unaligned
accesses won't reach this device, the guest will get a MEMTX_DECODE_ERROR.
>> + }
>> + return val;
>> +}
>> +
>> +static void bcm2835_thermal_write(void *opaque, hwaddr addr,
>> + uint64_t value, unsigned size)
>> +{
>> + Bcm2835ThermalState *s = BCM2835_THERMAL(opaque);
>> +
>> + switch (addr) {
>> + case A_CTL:
>> + s->ctl = value;
>> + break;
>> + default:
>> + qemu_log_mask(LOG_GUEST_ERROR, "%s: write 0x%" PRIx64
>> + " to 0x%" HWADDR_PRIx "\n",
>> + __func__, value, addr);
>> + }
>> +}
>> +
>> +static const MemoryRegionOps bcm2835_thermal_ops = {
>> + .read = bcm2835_thermal_read,
>> + .write = bcm2835_thermal_write,
>> + .impl.max_access_size = 4,
>> + .valid.min_access_size = 4,
>> + .endianness = DEVICE_NATIVE_ENDIAN,
>> +};
>> +
>> +static void bcm2835_thermal_realize(DeviceState *dev, Error **errp)
>> +{
>> + Bcm2835ThermalState *s = BCM2835_THERMAL(dev);
>> +
>> + memory_region_init_io(&s->iomem, OBJECT(s), &bcm2835_thermal_ops,
>> + s, TYPE_BCM2835_THERMAL, 8);
>> + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem);
>> +}
>> +
>> +static void bcm2835_thermal_class_init(ObjectClass *klass, void *data)
>> +{
>> + DeviceClass *dc = DEVICE_CLASS(klass);
>> +
>> + dc->realize = bcm2835_thermal_realize;
>> +}
>> +
>> +static const TypeInfo bcm2835_thermal_info = {
>> + .name = TYPE_BCM2835_THERMAL,
>> + .parent = TYPE_SYS_BUS_DEVICE,
>> + .instance_size = sizeof(Bcm2835ThermalState),
>> + .class_init = bcm2835_thermal_class_init,
>> +};
>> +
>> +static void bcm2835_thermal_register_types(void)
>> +{
>> + type_register_static(&bcm2835_thermal_info);
>> +}
>> +
>> +type_init(bcm2835_thermal_register_types)
>> diff --git a/include/hw/misc/bcm2835_thermal.h b/include/hw/misc/bcm2835_thermal.h
>> new file mode 100644
>> index 0000000000..f85cce7214
>> --- /dev/null
>> +++ b/include/hw/misc/bcm2835_thermal.h
>> @@ -0,0 +1,27 @@
>> +/*
>> + * BCM2835 dummy thermal sensor
>> + *
>> + * Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0-or-later
>> + */
>> +#ifndef HW_MISC_BCM2835_THERMAL_H
>> +#define HW_MISC_BCM2835_THERMAL_H
>> +
>> +#include "hw/qdev-properties.h"
>> +#include "hw/sysbus.h"
>> +
>> +#define TYPE_BCM2835_THERMAL "bcm2835-thermal"
>> +
>> +#define BCM2835_THERMAL(obj) \
>> + OBJECT_CHECK(Bcm2835ThermalState, (obj), TYPE_BCM2835_THERMAL)
>> +
>> +typedef struct {
>> + /*< private >*/
>> + SysBusDevice parent_obj;
>> + /*< public >*/
>> + MemoryRegion iomem;
>> + uint32_t ctl;
>> +} Bcm2835ThermalState;
>> +
>> +#endif
>
> Otherwise:
>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Thanks :)
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 10/19] hw/timer/bcm2835: Add the BCM2835 SYS_timer
2019-09-26 17:34 ` [PATCH 10/19] hw/timer/bcm2835: Add the BCM2835 SYS_timer Philippe Mathieu-Daudé
@ 2019-10-08 14:52 ` Alex Bennée
2019-10-08 14:53 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 14:52 UTC (permalink / raw)
To: qemu-arm
Cc: Peter Maydell, Cheng Xiang, Zoltán Baldaszti,
Alistair Francis, qemu-devel, Andrew Baumann,
Philippe Mathieu-Daudé,
Esteban Bosse, Cleber Rosa, Paolo Bonzini, Clement Deschamps,
Marc-André Lureau, Laurent Bonnans,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> Add the 64-bit free running timer. Do not model the COMPARE register
> (no IRQ generated).
> This timer is used by U-Boot and recent Linux kernels:
> https://github.com/u-boot/u-boot/blob/v2019.07/include/configs/rpi.h#L19
>
> Datasheet used:
> https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> Since which kernels? 4.19 seems to use it.
>
> checkpatch warning:
> WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
> This is OK because the regex are:
>
> F: hw/*/bcm283*
> F: include/hw/*/bcm283*
> ---
> hw/timer/Makefile.objs | 1 +
> hw/timer/bcm2835_systmr.c | 100 ++++++++++++++++++++++++++++++
> hw/timer/trace-events | 4 ++
> include/hw/timer/bcm2835_systmr.h | 30 +++++++++
> 4 files changed, 135 insertions(+)
> create mode 100644 hw/timer/bcm2835_systmr.c
> create mode 100644 include/hw/timer/bcm2835_systmr.h
>
> diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
> index 123d92c969..696cda5905 100644
> --- a/hw/timer/Makefile.objs
> +++ b/hw/timer/Makefile.objs
> @@ -47,3 +47,4 @@ common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
> common-obj-$(CONFIG_CMSDK_APB_TIMER) += cmsdk-apb-timer.o
> common-obj-$(CONFIG_CMSDK_APB_DUALTIMER) += cmsdk-apb-dualtimer.o
> common-obj-$(CONFIG_MSF2) += mss-timer.o
> +common-obj-$(CONFIG_RASPI) += bcm2835_systmr.o
> diff --git a/hw/timer/bcm2835_systmr.c b/hw/timer/bcm2835_systmr.c
> new file mode 100644
> index 0000000000..c4d2b488bd
> --- /dev/null
> +++ b/hw/timer/bcm2835_systmr.c
> @@ -0,0 +1,100 @@
> +/*
> + * BCM2835 SYS timer emulation
> + *
> + * Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 or
> + * (at your option) any later version.
> + *
> + * Datasheet: BCM2835 ARM Peripherals (C6357-M-1398)
> + * https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
> + *
> + * Only the free running 64-bit counter is implemented.
> + * The 4 COMPARE registers and the interruption are not implemented.
> + */
> +
> +#include "qemu/osdep.h"
> +#include "qemu/timer.h"
> +#include "qemu/log.h"
> +#include "hw/registerfields.h"
> +#include "hw/timer/bcm2835_systmr.h"
> +#include "trace.h"
> +
> +REG32(CTRL_STATUS, 0x00)
> +REG32(COUNTER_LOW, 0x04)
> +REG32(COUNTER_HIGH, 0x08)
> +REG32(COMPARE0, 0x0c)
> +REG32(COMPARE1, 0x10)
> +REG32(COMPARE2, 0x14)
> +REG32(COMPARE3, 0x18)
> +
> +static uint64_t bcm2835_sys_timer_read(void *opaque, hwaddr offset,
> + unsigned size)
> +{
> + uint64_t r = 0;
> +
> + switch (offset) {
> + case A_CTRL_STATUS:
> + case A_COMPARE0 ... A_COMPARE3:
Probably worth a LOG_UNIMP in here if we are not going to do it.
> + break;
> + case A_COUNTER_LOW:
> + case A_COUNTER_HIGH:
> + /* Free running counter at 1MHz */
> + r = qemu_clock_get_us(QEMU_CLOCK_VIRTUAL);
> + r >>= 8 * (offset - A_COUNTER_LOW);
> + r &= UINT32_MAX;
> + break;
> + default:
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: bad offset 0x%" HWADDR_PRIx "\n",
> + __func__, offset);
> + break;
> + }
> + trace_bcm2835_sys_timer_read(offset, r);
> +
> + return r;
> +}
> +
> +static void bcm2835_sys_timer_write(void *opaque, hwaddr offset,
> + uint64_t value, unsigned size)
> +{
> + trace_bcm2835_sys_timer_write(offset, value);
> +
> + qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n",
> + __func__, offset);
> +}
> +
> +static const MemoryRegionOps bcm2835_sys_timer_ops = {
> + .read = bcm2835_sys_timer_read,
> + .write = bcm2835_sys_timer_write,
> + .endianness = DEVICE_LITTLE_ENDIAN,
> + .impl = {
> + .min_access_size = 4,
> + .max_access_size = 4,
> + },
> +};
> +
> +static void bcm2835_sys_timer_init(Object *obj)
> +{
> + SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> + BCM2835SysTimerState *s = BCM2835_SYSTIMER(obj);
> +
> + memory_region_init_io(&s->iomem, obj, &bcm2835_sys_timer_ops,
> + s, "bcm2835-sys-timer", 0x20);
> + sysbus_init_mmio(sbd, &s->iomem);
> + sysbus_init_irq(sbd, &s->irq);
> +}
> +
> +static const TypeInfo bcm2835_sys_timer_info = {
> + .name = TYPE_BCM2835_SYSTIMER,
> + .parent = TYPE_SYS_BUS_DEVICE,
> + .instance_size = sizeof(BCM2835SysTimerState),
> + .instance_init = bcm2835_sys_timer_init,
> +};
> +
> +static void bcm2835_sys_timer_register_types(void)
> +{
> + type_register_static(&bcm2835_sys_timer_info);
> +}
> +
> +type_init(bcm2835_sys_timer_register_types);
> diff --git a/hw/timer/trace-events b/hw/timer/trace-events
> index db02a9142c..81967a1a19 100644
> --- a/hw/timer/trace-events
> +++ b/hw/timer/trace-events
> @@ -87,3 +87,7 @@ pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
> pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
> pl031_alarm_raised(void) "alarm raised"
> pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
> +
> +# bcm2835_systmr.c
> +bcm2835_sys_timer_read(uint64_t offset, uint64_t data) "timer read: offset 0x%" PRIx64 " data 0x%" PRIx64
> +bcm2835_sys_timer_write(uint64_t offset, uint64_t data) "timer write: offset 0x%" PRIx64 " data 0x%" PRIx64
> diff --git a/include/hw/timer/bcm2835_systmr.h b/include/hw/timer/bcm2835_systmr.h
> new file mode 100644
> index 0000000000..6ac7f8ec5a
> --- /dev/null
> +++ b/include/hw/timer/bcm2835_systmr.h
> @@ -0,0 +1,30 @@
> +/*
> + * BCM2835 SYS timer emulation
> + *
> + * Copyright (c) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 or
> + * (at your option) any later version.
> + */
> +
> +#ifndef BCM2835_SYSTIMER_H
> +#define BCM2835_SYSTIMER_H
> +
> +#include "hw/sysbus.h"
> +#include "hw/irq.h"
> +
> +#define TYPE_BCM2835_SYSTIMER "bcm2835-sys-timer"
> +#define BCM2835_SYSTIMER(obj) \
> + OBJECT_CHECK(BCM2835SysTimerState, (obj), TYPE_BCM2835_SYSTIMER)
> +
> +typedef struct {
> + /*< private >*/
> + SysBusDevice parent_obj;
> +
> + /*< public >*/
> + MemoryRegion iomem;
> + qemu_irq irq;
> +} BCM2835SysTimerState;
> +
> +#endif
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 10/19] hw/timer/bcm2835: Add the BCM2835 SYS_timer
2019-10-08 14:52 ` Alex Bennée
@ 2019-10-08 14:53 ` Philippe Mathieu-Daudé
2019-10-09 11:06 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-08 14:53 UTC (permalink / raw)
To: Alex Bennée, qemu-arm
Cc: Peter Maydell, Cheng Xiang, Zoltán Baldaszti,
Alistair Francis, qemu-devel, Andrew Baumann,
Philippe Mathieu-Daudé,
Esteban Bosse, Cleber Rosa, Paolo Bonzini, Clement Deschamps,
Marc-André Lureau, Laurent Bonnans, Pekka Enberg,
Guenter Roeck, Eduardo Habkost
On 10/8/19 4:52 PM, Alex Bennée wrote:
> Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
>
>> Add the 64-bit free running timer. Do not model the COMPARE register
>> (no IRQ generated).
>> This timer is used by U-Boot and recent Linux kernels:
>> https://github.com/u-boot/u-boot/blob/v2019.07/include/configs/rpi.h#L19
>>
>> Datasheet used:
>> https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> Since which kernels? 4.19 seems to use it.
>>
>> checkpatch warning:
>> WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
>> This is OK because the regex are:
>>
>> F: hw/*/bcm283*
>> F: include/hw/*/bcm283*
>> ---
>> hw/timer/Makefile.objs | 1 +
>> hw/timer/bcm2835_systmr.c | 100 ++++++++++++++++++++++++++++++
>> hw/timer/trace-events | 4 ++
>> include/hw/timer/bcm2835_systmr.h | 30 +++++++++
>> 4 files changed, 135 insertions(+)
>> create mode 100644 hw/timer/bcm2835_systmr.c
>> create mode 100644 include/hw/timer/bcm2835_systmr.h
>>
>> diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
>> index 123d92c969..696cda5905 100644
>> --- a/hw/timer/Makefile.objs
>> +++ b/hw/timer/Makefile.objs
>> @@ -47,3 +47,4 @@ common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
>> common-obj-$(CONFIG_CMSDK_APB_TIMER) += cmsdk-apb-timer.o
>> common-obj-$(CONFIG_CMSDK_APB_DUALTIMER) += cmsdk-apb-dualtimer.o
>> common-obj-$(CONFIG_MSF2) += mss-timer.o
>> +common-obj-$(CONFIG_RASPI) += bcm2835_systmr.o
>> diff --git a/hw/timer/bcm2835_systmr.c b/hw/timer/bcm2835_systmr.c
>> new file mode 100644
>> index 0000000000..c4d2b488bd
>> --- /dev/null
>> +++ b/hw/timer/bcm2835_systmr.c
>> @@ -0,0 +1,100 @@
>> +/*
>> + * BCM2835 SYS timer emulation
>> + *
>> + * Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 or
>> + * (at your option) any later version.
>> + *
>> + * Datasheet: BCM2835 ARM Peripherals (C6357-M-1398)
>> + * https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
>> + *
>> + * Only the free running 64-bit counter is implemented.
>> + * The 4 COMPARE registers and the interruption are not implemented.
>> + */
>> +
>> +#include "qemu/osdep.h"
>> +#include "qemu/timer.h"
>> +#include "qemu/log.h"
>> +#include "hw/registerfields.h"
>> +#include "hw/timer/bcm2835_systmr.h"
>> +#include "trace.h"
>> +
>> +REG32(CTRL_STATUS, 0x00)
>> +REG32(COUNTER_LOW, 0x04)
>> +REG32(COUNTER_HIGH, 0x08)
>> +REG32(COMPARE0, 0x0c)
>> +REG32(COMPARE1, 0x10)
>> +REG32(COMPARE2, 0x14)
>> +REG32(COMPARE3, 0x18)
>> +
>> +static uint64_t bcm2835_sys_timer_read(void *opaque, hwaddr offset,
>> + unsigned size)
>> +{
>> + uint64_t r = 0;
>> +
>> + switch (offset) {
>> + case A_CTRL_STATUS:
>> + case A_COMPARE0 ... A_COMPARE3:
>
> Probably worth a LOG_UNIMP in here if we are not going to do it.
Correct :)
>> + break;
>> + case A_COUNTER_LOW:
>> + case A_COUNTER_HIGH:
>> + /* Free running counter at 1MHz */
>> + r = qemu_clock_get_us(QEMU_CLOCK_VIRTUAL);
>> + r >>= 8 * (offset - A_COUNTER_LOW);
>> + r &= UINT32_MAX;
>> + break;
>> + default:
>> + qemu_log_mask(LOG_GUEST_ERROR, "%s: bad offset 0x%" HWADDR_PRIx "\n",
>> + __func__, offset);
>> + break;
>> + }
>> + trace_bcm2835_sys_timer_read(offset, r);
>> +
>> + return r;
>> +}
>> +
>> +static void bcm2835_sys_timer_write(void *opaque, hwaddr offset,
>> + uint64_t value, unsigned size)
>> +{
>> + trace_bcm2835_sys_timer_write(offset, value);
>> +
>> + qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n",
>> + __func__, offset);
>> +}
>> +
>> +static const MemoryRegionOps bcm2835_sys_timer_ops = {
>> + .read = bcm2835_sys_timer_read,
>> + .write = bcm2835_sys_timer_write,
>> + .endianness = DEVICE_LITTLE_ENDIAN,
>> + .impl = {
>> + .min_access_size = 4,
>> + .max_access_size = 4,
>> + },
>> +};
>> +
>> +static void bcm2835_sys_timer_init(Object *obj)
>> +{
>> + SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
>> + BCM2835SysTimerState *s = BCM2835_SYSTIMER(obj);
>> +
>> + memory_region_init_io(&s->iomem, obj, &bcm2835_sys_timer_ops,
>> + s, "bcm2835-sys-timer", 0x20);
>> + sysbus_init_mmio(sbd, &s->iomem);
>> + sysbus_init_irq(sbd, &s->irq);
>> +}
>> +
>> +static const TypeInfo bcm2835_sys_timer_info = {
>> + .name = TYPE_BCM2835_SYSTIMER,
>> + .parent = TYPE_SYS_BUS_DEVICE,
>> + .instance_size = sizeof(BCM2835SysTimerState),
>> + .instance_init = bcm2835_sys_timer_init,
>> +};
>> +
>> +static void bcm2835_sys_timer_register_types(void)
>> +{
>> + type_register_static(&bcm2835_sys_timer_info);
>> +}
>> +
>> +type_init(bcm2835_sys_timer_register_types);
>> diff --git a/hw/timer/trace-events b/hw/timer/trace-events
>> index db02a9142c..81967a1a19 100644
>> --- a/hw/timer/trace-events
>> +++ b/hw/timer/trace-events
>> @@ -87,3 +87,7 @@ pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
>> pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
>> pl031_alarm_raised(void) "alarm raised"
>> pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
>> +
>> +# bcm2835_systmr.c
>> +bcm2835_sys_timer_read(uint64_t offset, uint64_t data) "timer read: offset 0x%" PRIx64 " data 0x%" PRIx64
>> +bcm2835_sys_timer_write(uint64_t offset, uint64_t data) "timer write: offset 0x%" PRIx64 " data 0x%" PRIx64
>> diff --git a/include/hw/timer/bcm2835_systmr.h b/include/hw/timer/bcm2835_systmr.h
>> new file mode 100644
>> index 0000000000..6ac7f8ec5a
>> --- /dev/null
>> +++ b/include/hw/timer/bcm2835_systmr.h
>> @@ -0,0 +1,30 @@
>> +/*
>> + * BCM2835 SYS timer emulation
>> + *
>> + * Copyright (c) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 or
>> + * (at your option) any later version.
>> + */
>> +
>> +#ifndef BCM2835_SYSTIMER_H
>> +#define BCM2835_SYSTIMER_H
>> +
>> +#include "hw/sysbus.h"
>> +#include "hw/irq.h"
>> +
>> +#define TYPE_BCM2835_SYSTIMER "bcm2835-sys-timer"
>> +#define BCM2835_SYSTIMER(obj) \
>> + OBJECT_CHECK(BCM2835SysTimerState, (obj), TYPE_BCM2835_SYSTIMER)
>> +
>> +typedef struct {
>> + /*< private >*/
>> + SysBusDevice parent_obj;
>> +
>> + /*< public >*/
>> + MemoryRegion iomem;
>> + qemu_irq irq;
>> +} BCM2835SysTimerState;
>> +
>> +#endif
>
>
> --
> Alex Bennée
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 11/19] hw/arm/bcm2835_peripherals: Use the SYS_timer
2019-09-26 17:34 ` [PATCH 11/19] hw/arm/bcm2835_peripherals: Use the SYS_timer Philippe Mathieu-Daudé
@ 2019-10-08 15:22 ` Alex Bennée
2019-10-09 7:39 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 15:22 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> Connect the recently added SYS_timer.
> Now U-Boot does not hang anymore polling a free running counter
> stuck at 0.
> This timer is also used by the Linux kernel thermal subsystem.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/arm/bcm2835_peripherals.c | 21 ++++++++++++++++++++-
> include/hw/arm/bcm2835_peripherals.h | 3 ++-
> 2 files changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
> index 70bf927a02..965f4c1f3d 100644
> --- a/hw/arm/bcm2835_peripherals.c
> +++ b/hw/arm/bcm2835_peripherals.c
> @@ -58,6 +58,10 @@ static void bcm2835_peripherals_init(Object *obj)
> /* Interrupt Controller */
> sysbus_init_child_obj(obj, "ic", &s->ic, sizeof(s->ic), TYPE_BCM2835_IC);
>
> + /* SYS Timer */
> + sysbus_init_child_obj(obj, "systimer", &s->systmr, sizeof(s->systmr),
> + TYPE_BCM2835_SYSTIMER);
> +
> /* UART0 */
> sysbus_init_child_obj(obj, "uart0", &s->uart0, sizeof(s->uart0),
> TYPE_PL011);
> @@ -171,6 +175,22 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
> sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
>
> + /* Sys Timer */
> + if (err) {
> + error_propagate(errp, err);
> + return;
> + }
This looks like an extra check because err is checked above and hasn't
been messed with since.
> + object_property_set_bool(OBJECT(&s->systmr), true, "realized", &err);
> + if (err) {
> + error_propagate(errp, err);
> + return;
> + }
> + memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
> + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0));
> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0,
> + qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
> + INTERRUPT_ARM_TIMER));
> +
> /* UART0 */
> qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
> object_property_set_bool(OBJECT(&s->uart0), true, "realized", &err);
> @@ -352,7 +372,6 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> }
>
> create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
> - create_unimp(s, &s->systmr, "bcm2835-systimer", ST_OFFSET, 0x20);
> create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
> create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
> create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
> diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
> index be7ad9b499..5b9fc89453 100644
> --- a/include/hw/arm/bcm2835_peripherals.h
> +++ b/include/hw/arm/bcm2835_peripherals.h
> @@ -24,6 +24,7 @@
> #include "hw/sd/sdhci.h"
> #include "hw/sd/bcm2835_sdhost.h"
> #include "hw/gpio/bcm2835_gpio.h"
> +#include "hw/timer/bcm2835_systmr.h"
> #include "hw/misc/unimp.h"
>
> #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
> @@ -39,7 +40,7 @@ typedef struct BCM2835PeripheralState {
> MemoryRegion ram_alias[4];
> qemu_irq irq, fiq;
>
> - UnimplementedDeviceState systmr;
> + BCM2835SysTimerState systmr;
> UnimplementedDeviceState armtmr;
> UnimplementedDeviceState cprman;
> UnimplementedDeviceState a2w;
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 13/19] hw/arm/raspi: Define various blocks base addresses
2019-09-26 17:34 ` [PATCH 13/19] hw/arm/raspi: Define various blocks base addresses Philippe Mathieu-Daudé
@ 2019-10-08 15:32 ` Alex Bennée
0 siblings, 0 replies; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 15:32 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> The Raspberry firmware is closed-source. While running it, it
> accesses various I/O registers. Logging these accesses as UNIMP
> (unimplemented) help to understand what the firmware is doing
> (ideally we want it able to boot a Linux kernel).
>
> Document various blocks we might use later.
>
> Adresses and names based on:
> https://github.com/hermanhermitage/videocoreiv/wiki/MMIO-Register-map
I'd put this link in the header as well to save diving into the git
record to find this out.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> Now the header is incorrect, should I add that in another file or
> update the header?
>
> * These definitions are derived from those in Raspbian Linux at
> * arch/arm/mach-{bcm2708,bcm2709}/include/mach/platform.h
> * where they carry the following notice:
"Some of these definitions..."
"additional definitions from..."
will be fine I think. The links are out of date w.r.t. current kernel
master anyway so they could do with being fixed up.
Anyway:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> *
> * Copyright (C) 2010 Broadcom
> ---
> include/hw/arm/raspi_platform.h | 47 +++++++++++++++++++++++++++------
> 1 file changed, 39 insertions(+), 8 deletions(-)
>
> diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
> index 61b04a1bd4..8bcf1c7c93 100644
> --- a/include/hw/arm/raspi_platform.h
> +++ b/include/hw/arm/raspi_platform.h
> @@ -26,14 +26,19 @@
> #define HW_ARM_RASPI_PLATFORM_H
>
> #define MSYNC_OFFSET 0x0000 /* Multicore Sync Block */
> -#define IC0_OFFSET 0x2000
> +#define CCPT_OFFSET 0x1000 /* Compact Camera Port 2 TX */
> +#define INTE_OFFSET 0x2000 /* VC Interrupt controller */
> #define ST_OFFSET 0x3000 /* System Timer */
> +#define TXP_OFFSET 0x4000
> +#define JPEG_OFFSET 0x5000
> #define MPHI_OFFSET 0x6000 /* Message-based Parallel Host Intf. */
> #define DMA_OFFSET 0x7000 /* DMA controller, channels 0-14 */
> -#define ARM_OFFSET 0xB000 /* BCM2708 ARM control block */
> +#define ARBA_OFFSET 0x9000
> +#define BRDG_OFFSET 0xa000
> +#define ARM_OFFSET 0xB000 /* ARM control block */
> #define ARMCTRL_OFFSET (ARM_OFFSET + 0x000)
> #define ARMCTRL_IC_OFFSET (ARM_OFFSET + 0x200) /* Interrupt controller */
> -#define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 */
> +#define ARMCTRL_TIMER0_1_OFFSET (ARM_OFFSET + 0x400) /* Timer 0 and 1 (SP804) */
> #define ARMCTRL_0_SBM_OFFSET (ARM_OFFSET + 0x800) /* User 0 (ARM) Semaphores
> * Doorbells & Mailboxes */
> #define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
> @@ -42,24 +47,50 @@
> #define AVS_OFFSET 0x103000 /* Audio Video Standard */
> #define RNG_OFFSET 0x104000
> #define GPIO_OFFSET 0x200000
> -#define UART0_OFFSET 0x201000
> -#define MMCI0_OFFSET 0x202000
> -#define I2S_OFFSET 0x203000
> -#define SPI0_OFFSET 0x204000
> +#define UART0_OFFSET 0x201000 /* PL011 */
> +#define MMCI0_OFFSET 0x202000 /* Legacy MMC */
> +#define I2S_OFFSET 0x203000 /* PCM */
> +#define SPI0_OFFSET 0x204000 /* SPI master */
> #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
> +#define PIXV0_OFFSET 0x206000
> +#define PIXV1_OFFSET 0x207000
> +#define DPI_OFFSET 0x208000
> +#define DSI0_OFFSET 0x209000 /* Display Serial Interface */
> +#define PWM_OFFSET 0x20c000
> +#define PERM_OFFSET 0x20d000
> +#define TEC_OFFSET 0x20e000
> #define OTP_OFFSET 0x20f000
> +#define SLIM_OFFSET 0x210000 /* SLIMbus */
> +#define CPG_OFFSET 0x211000
> #define THERMAL_OFFSET 0x212000
> -#define BSC_SL_OFFSET 0x214000 /* SPI slave */
> +#define AVSP_OFFSET 0x213000
> +#define BSC_SL_OFFSET 0x214000 /* SPI slave (bootrom) */
> #define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
> #define EMMC1_OFFSET 0x300000
> +#define EMMC2_OFFSET 0x340000
> +#define HVS_OFFSET 0x400000
> #define SMI_OFFSET 0x600000
> +#define DSI1_OFFSET 0x700000
> +#define UCAM_OFFSET 0x800000
> +#define CMI_OFFSET 0x802000
> #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */
> #define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */
> +#define VECA_OFFSET 0x806000
> +#define PIXV2_OFFSET 0x807000
> +#define HDMI_OFFSET 0x808000
> +#define HDCP_OFFSET 0x809000
> +#define ARBR0_OFFSET 0x80a000
> #define DBUS_OFFSET 0x900000
> #define AVE0_OFFSET 0x910000
> #define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */
> +#define V3D_OFFSET 0xc00000
> #define SDRAMC_OFFSET 0xe00000
> +#define L2CC_OFFSET 0xe01000 /* Level 2 Cache controller */
> +#define L1CC_OFFSET 0xe02000 /* Level 1 Cache controller */
> +#define ARBR1_OFFSET 0xe04000
> #define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */
> +#define DCRC_OFFSET 0xe07000
> +#define AXIP_OFFSET 0xe08000
>
> /* GPU interrupts */
> #define INTERRUPT_TIMER0 0
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 15/19] tests/boot_linux_console: Extract the gunzip() helper
2019-09-26 17:34 ` [PATCH 15/19] tests/boot_linux_console: Extract the gunzip() helper Philippe Mathieu-Daudé
@ 2019-10-08 15:33 ` Alex Bennée
2019-10-09 15:31 ` Cleber Rosa
2019-10-24 9:23 ` Esteban Bosse
2 siblings, 0 replies; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 15:33 UTC (permalink / raw)
To: qemu-arm
Cc: Peter Maydell, Cheng Xiang, Zoltán Baldaszti,
Alistair Francis, qemu-devel, Andrew Baumann,
Philippe Mathieu-Daudé,
Esteban Bosse, Cleber Rosa, Paolo Bonzini, Clement Deschamps,
Marc-André Lureau, Laurent Bonnans,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> We are going to use the same pattern. Instead of keeping
> copy/pasting this code, extract as a local function.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> tests/acceptance/boot_linux_console.py | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
> index 8a9a314ab4..079590f0c8 100644
> --- a/tests/acceptance/boot_linux_console.py
> +++ b/tests/acceptance/boot_linux_console.py
> @@ -19,6 +19,11 @@ from avocado.utils import process
> from avocado.utils import archive
>
>
> +def gunzip(in_pathname_gz, out_pathname):
> + with gzip.open(in_pathname_gz, 'rb') as f_in:
> + with open(out_pathname, 'wb') as f_out:
> + shutil.copyfileobj(f_in, f_out)
> +
> class BootLinuxConsole(Test):
> """
> Boots a Linux kernel and checks that the console is operational and the
> @@ -166,10 +171,7 @@ class BootLinuxConsole(Test):
> initrd_hash = 'bf806e17009360a866bf537f6de66590de349a99'
> initrd_path_gz = self.fetch_asset(initrd_url, asset_hash=initrd_hash)
> initrd_path = self.workdir + "rootfs.cpio"
> -
> - with gzip.open(initrd_path_gz, 'rb') as f_in:
> - with open(initrd_path, 'wb') as f_out:
> - shutil.copyfileobj(f_in, f_out)
> + gunzip(initrd_path_gz, initrd_path)
>
> self.vm.set_machine('malta')
> self.vm.set_console()
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 16/19] tests/boot_linux_console: Add a test for the Raspberry Pi 2
2019-09-26 17:34 ` [PATCH 16/19] tests/boot_linux_console: Add a test for the Raspberry Pi 2 Philippe Mathieu-Daudé
@ 2019-10-08 15:34 ` Alex Bennée
2019-10-09 15:43 ` Cleber Rosa
1 sibling, 0 replies; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 15:34 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> Similar to the x86_64/pc test, it boots a Linux kernel on a raspi2
> board and verify the serial is working.
>
> The kernel image and DeviceTree blob are built by the Raspbian
> project (based on Debian):
> https://www.raspbian.org/RaspbianImages
> as recommended by the Raspberry Pi project:
> https://www.raspberrypi.org/downloads/raspbian/
>
> If ARM is a target being built, "make check-acceptance" will
> automatically include this test by the use of the "arch:arm" tags.
>
> Alternatively, this test can be run using:
>
> $ avocado run -t arch:arm tests/acceptance
> $ avocado run -t machine:raspi2 tests/acceptance
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> v3: removed debug printf (Cleber)
> use serial_kernel_cmdline dict
> ---
> tests/acceptance/boot_linux_console.py | 36 ++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
> index 079590f0c8..7eaf6cb60e 100644
> --- a/tests/acceptance/boot_linux_console.py
> +++ b/tests/acceptance/boot_linux_console.py
> @@ -318,6 +318,42 @@ class BootLinuxConsole(Test):
> self.vm.launch()
> self.wait_for_console_pattern('init started: BusyBox')
>
> + def do_test_arm_raspi2(self, uart_id):
> + """
> + The kernel can be rebuilt using the kernel source referenced
> + and following the instructions on the on:
> + https://www.raspberrypi.org/documentation/linux/kernel/building.md
> + """
> + serial_kernel_cmdline = {
> + 0: 'earlycon=pl011,0x3f201000 console=ttyAMA0',
> + }
> + deb_url = ('http://archive.raspberrypi.org/debian/'
> + 'pool/main/r/raspberrypi-firmware/'
> + 'raspberrypi-kernel_1.20190215-1_armhf.deb')
> + deb_hash = 'cd284220b32128c5084037553db3c482426f3972'
> + deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash)
> + kernel_path = self.extract_from_deb(deb_path, '/boot/kernel7.img')
> + dtb_path = self.extract_from_deb(deb_path, '/boot/bcm2709-rpi-2-b.dtb')
> +
> + self.vm.set_machine('raspi2')
> + self.vm.set_console()
> + kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
> + serial_kernel_cmdline[uart_id])
> + self.vm.add_args('-kernel', kernel_path,
> + '-dtb', dtb_path,
> + '-append', kernel_command_line)
> + self.vm.launch()
> + console_pattern = 'Kernel command line: %s' % kernel_command_line
> + self.wait_for_console_pattern(console_pattern)
> +
> + def test_arm_raspi2_uart0(self):
> + """
> + :avocado: tags=arch:arm
> + :avocado: tags=machine:raspi2
> + :avocado: tags=device:pl011
> + """
> + self.do_test_arm_raspi2(0)
> +
> def test_s390x_s390_ccw_virtio(self):
> """
> :avocado: tags=arch:s390x
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 17/19] tests/boot_linux_console: Test the raspi2 UART1 (16550 based)
2019-09-26 17:34 ` [PATCH 17/19] tests/boot_linux_console: Test the raspi2 UART1 (16550 based) Philippe Mathieu-Daudé
@ 2019-10-08 15:35 ` Alex Bennée
2019-10-09 15:54 ` Cleber Rosa
1 sibling, 0 replies; 74+ messages in thread
From: Alex Bennée @ 2019-10-08 15:35 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, Philippe Mathieu-Daudé,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> The current do_test_arm_raspi2() case tests the PL011 UART0.
> Our model also supports the AUX UART (16550 based).
> We can very simply test the UART1 with Linux, modifying the
> kernel command line.
>
> Add few lines to expand our previous test and cover the AUX
> UART.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> tests/acceptance/boot_linux_console.py | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
> index 7eaf6cb60e..33e8f6c635 100644
> --- a/tests/acceptance/boot_linux_console.py
> +++ b/tests/acceptance/boot_linux_console.py
> @@ -326,6 +326,7 @@ class BootLinuxConsole(Test):
> """
> serial_kernel_cmdline = {
> 0: 'earlycon=pl011,0x3f201000 console=ttyAMA0',
> + 1: 'earlycon=uart8250,mmio32,0x3f215040 console=ttyS1,115200'
> }
> deb_url = ('http://archive.raspberrypi.org/debian/'
> 'pool/main/r/raspberrypi-firmware/'
> @@ -336,7 +337,7 @@ class BootLinuxConsole(Test):
> dtb_path = self.extract_from_deb(deb_path, '/boot/bcm2709-rpi-2-b.dtb')
>
> self.vm.set_machine('raspi2')
> - self.vm.set_console()
> + self.vm.set_console(console_id=uart_id)
> kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
> serial_kernel_cmdline[uart_id])
> self.vm.add_args('-kernel', kernel_path,
> @@ -354,6 +355,14 @@ class BootLinuxConsole(Test):
> """
> self.do_test_arm_raspi2(0)
>
> + def test_arm_raspi2_uart1(self):
> + """
> + :avocado: tags=arch:arm
> + :avocado: tags=machine:raspi2
> + :avocado: tags=device:bcm2835_aux
> + """
> + self.do_test_arm_raspi2(1)
> +
> def test_s390x_s390_ccw_virtio(self):
> """
> :avocado: tags=arch:s390x
--
Alex Bennée
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 01/19] hw/arm/raspi: Use the IEC binary prefix definitions
2019-09-26 17:34 ` [PATCH 01/19] hw/arm/raspi: Use the IEC binary prefix definitions Philippe Mathieu-Daudé
2019-09-27 21:36 ` Alistair Francis
2019-10-08 8:57 ` Alex Bennée
@ 2019-10-09 0:26 ` Cleber Rosa
2 siblings, 0 replies; 74+ messages in thread
From: Cleber Rosa @ 2019-10-09 0:26 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Alistair Francis, qemu-devel, Andrew Baumann, Esteban Bosse,
qemu-arm, Clement Deschamps, Marc-André Lureau,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 07:34:09PM +0200, Philippe Mathieu-Daudé wrote:
> IEC binary prefixes ease code review: the unit is explicit.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/arm/raspi.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index 74c062d05e..615d755879 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -230,7 +230,7 @@ static void raspi2_machine_init(MachineClass *mc)
> mc->max_cpus = BCM283X_NCPUS;
> mc->min_cpus = BCM283X_NCPUS;
> mc->default_cpus = BCM283X_NCPUS;
> - mc->default_ram_size = 1024 * 1024 * 1024;
> + mc->default_ram_size = 1 * GiB;
> mc->ignore_memory_transaction_failures = true;
> };
> DEFINE_MACHINE("raspi2", raspi2_machine_init)
> @@ -252,7 +252,7 @@ static void raspi3_machine_init(MachineClass *mc)
> mc->max_cpus = BCM283X_NCPUS;
> mc->min_cpus = BCM283X_NCPUS;
> mc->default_cpus = BCM283X_NCPUS;
> - mc->default_ram_size = 1024 * 1024 * 1024;
> + mc->default_ram_size = 1 * GiB;
> }
> DEFINE_MACHINE("raspi3", raspi3_machine_init)
> #endif
> --
> 2.20.1
>
Reviewed-by: Cleber Rosa <crosa@redhat.com>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 02/19] hw/arm/bcm2835_peripherals: Improve logging
2019-10-08 9:00 ` Alex Bennée
@ 2019-10-09 1:28 ` Cleber Rosa
0 siblings, 0 replies; 74+ messages in thread
From: Cleber Rosa @ 2019-10-09 1:28 UTC (permalink / raw)
To: Alex Bennée
Cc: Peter Maydell, Cheng Xiang, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, qemu-devel, Andrew Baumann,
Philippe Mathieu-Daudé,
Esteban Bosse, qemu-arm, Clement Deschamps,
Marc-André Lureau, Laurent Bonnans,
Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Tue, Oct 08, 2019 at 10:00:57AM +0100, Alex Bennée wrote:
>
> Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
>
> > Various logging improvements as once:
> > - Use 0x prefix for hex numbers
>
> You can use "%#"PRIxNN"" as an alternative I believe but anyway:
>
Unless the value given to the formatting string is zero, then the "0x"
prefix is not applied to the resulting string.
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Cleber Rosa <crosa@redhat.com>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 03/19] hw/arm/bcm2835_peripherals: Name various address spaces
2019-09-26 17:34 ` [PATCH 03/19] hw/arm/bcm2835_peripherals: Name various address spaces Philippe Mathieu-Daudé
2019-09-27 21:38 ` Alistair Francis
2019-10-08 9:04 ` Alex Bennée
@ 2019-10-09 1:48 ` Cleber Rosa
2 siblings, 0 replies; 74+ messages in thread
From: Cleber Rosa @ 2019-10-09 1:48 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Alistair Francis, qemu-devel, Andrew Baumann, Esteban Bosse,
qemu-arm, Clement Deschamps, Marc-André Lureau,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 07:34:11PM +0200, Philippe Mathieu-Daudé wrote:
> Various address spaces from the BCM2835 are reported as
> 'anonymous' in memory tree:
>
> (qemu) info mtree
>
> address-space: anonymous
> 0000000000000000-000000000000008f (prio 0, i/o): bcm2835-mbox
> 0000000000000010-000000000000001f (prio 0, i/o): bcm2835-fb
> 0000000000000080-000000000000008f (prio 0, i/o): bcm2835-property
>
> address-space: anonymous
> 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
> 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
> 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
>
> [...]
>
> Since the address_space_init() function takes a 'name' argument,
> set it to correctly describe each address space:
>
> (qemu) info mtree
>
> address-space: bcm2835-mbox-memory
> 0000000000000000-000000000000008f (prio 0, i/o): bcm2835-mbox
> 0000000000000010-000000000000001f (prio 0, i/o): bcm2835-fb
> 0000000000000080-000000000000008f (prio 0, i/o): bcm2835-property
>
> address-space: bcm2835-fb-memory
> 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
> 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
> 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
>
> address-space: bcm2835-property-memory
> 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
> 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
> 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
>
> address-space: bcm2835-dma-memory
> 0000000000000000-00000000ffffffff (prio 0, i/o): bcm2835-gpu
> 0000000000000000-000000003fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 0000000040000000-000000007fffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 000000007e000000-000000007effffff (prio 1, i/o): alias bcm2835-peripherals @bcm2835-peripherals 0000000000000000-0000000000ffffff
> 0000000080000000-00000000bfffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
> 00000000c0000000-00000000ffffffff (prio 0, i/o): alias bcm2835-gpu-ram-alias[*] @ram 0000000000000000-000000003fffffff
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/display/bcm2835_fb.c | 2 +-
> hw/dma/bcm2835_dma.c | 2 +-
> hw/misc/bcm2835_mbox.c | 2 +-
> hw/misc/bcm2835_property.c | 2 +-
> 4 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/display/bcm2835_fb.c b/hw/display/bcm2835_fb.c
> index 8f856878cd..85aaa54330 100644
> --- a/hw/display/bcm2835_fb.c
> +++ b/hw/display/bcm2835_fb.c
> @@ -425,7 +425,7 @@ static void bcm2835_fb_realize(DeviceState *dev, Error **errp)
> s->initial_config.base = s->vcram_base + BCM2835_FB_OFFSET;
>
> s->dma_mr = MEMORY_REGION(obj);
> - address_space_init(&s->dma_as, s->dma_mr, NULL);
> + address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_FB "-memory");
>
> bcm2835_fb_reset(dev);
>
> diff --git a/hw/dma/bcm2835_dma.c b/hw/dma/bcm2835_dma.c
> index 6acc2b644e..1e458d7fba 100644
> --- a/hw/dma/bcm2835_dma.c
> +++ b/hw/dma/bcm2835_dma.c
> @@ -383,7 +383,7 @@ static void bcm2835_dma_realize(DeviceState *dev, Error **errp)
> }
>
> s->dma_mr = MEMORY_REGION(obj);
> - address_space_init(&s->dma_as, s->dma_mr, NULL);
> + address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_DMA "-memory");
>
> bcm2835_dma_reset(dev);
> }
> diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c
> index 7690b9afaf..77285624c9 100644
> --- a/hw/misc/bcm2835_mbox.c
> +++ b/hw/misc/bcm2835_mbox.c
> @@ -311,7 +311,7 @@ static void bcm2835_mbox_realize(DeviceState *dev, Error **errp)
> }
>
> s->mbox_mr = MEMORY_REGION(obj);
> - address_space_init(&s->mbox_as, s->mbox_mr, NULL);
> + address_space_init(&s->mbox_as, s->mbox_mr, TYPE_BCM2835_MBOX "-memory");
> bcm2835_mbox_reset(dev);
> }
>
> diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
> index 0a1a3eb5d9..43a5465c5d 100644
> --- a/hw/misc/bcm2835_property.c
> +++ b/hw/misc/bcm2835_property.c
> @@ -407,7 +407,7 @@ static void bcm2835_property_realize(DeviceState *dev, Error **errp)
> }
>
> s->dma_mr = MEMORY_REGION(obj);
> - address_space_init(&s->dma_as, s->dma_mr, NULL);
> + address_space_init(&s->dma_as, s->dma_mr, TYPE_BCM2835_PROPERTY "-memory");
>
> /* TODO: connect to MAC address of USB NIC device, once we emulate it */
> qemu_macaddr_default_if_unset(&s->macaddr);
> --
> 2.20.1
>
The names you're giving are much more detailed than most other
examples I found for address_space_init(), and I like that approach a
lot.
Reviewed-by: Cleber Rosa <crosa@redhat.com>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 11/19] hw/arm/bcm2835_peripherals: Use the SYS_timer
2019-10-08 15:22 ` Alex Bennée
@ 2019-10-09 7:39 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-09 7:39 UTC (permalink / raw)
To: Alex Bennée, qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, Andrew Baumann, Esteban Bosse, Cleber Rosa,
qemu-arm, Clement Deschamps, Marc-André Lureau,
Laurent Bonnans, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On 10/8/19 5:22 PM, Alex Bennée wrote:
> Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
>
>> Connect the recently added SYS_timer.
>> Now U-Boot does not hang anymore polling a free running counter
>> stuck at 0.
>> This timer is also used by the Linux kernel thermal subsystem.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> hw/arm/bcm2835_peripherals.c | 21 ++++++++++++++++++++-
>> include/hw/arm/bcm2835_peripherals.h | 3 ++-
>> 2 files changed, 22 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
>> index 70bf927a02..965f4c1f3d 100644
>> --- a/hw/arm/bcm2835_peripherals.c
>> +++ b/hw/arm/bcm2835_peripherals.c
>> @@ -58,6 +58,10 @@ static void bcm2835_peripherals_init(Object *obj)
>> /* Interrupt Controller */
>> sysbus_init_child_obj(obj, "ic", &s->ic, sizeof(s->ic), TYPE_BCM2835_IC);
>>
>> + /* SYS Timer */
>> + sysbus_init_child_obj(obj, "systimer", &s->systmr, sizeof(s->systmr),
>> + TYPE_BCM2835_SYSTIMER);
>> +
>> /* UART0 */
>> sysbus_init_child_obj(obj, "uart0", &s->uart0, sizeof(s->uart0),
>> TYPE_PL011);
>> @@ -171,6 +175,22 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
>> sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
>> sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
>>
>> + /* Sys Timer */
>> + if (err) {
>> + error_propagate(errp, err);
>> + return;
>> + }
>
> This looks like an extra check because err is checked above and hasn't
> been messed with since.
Oops good catch. Looking at older branch I had this property:
object_property_set_uint(OBJECT(&s->systmr), 1000000, "freq_hz", &err);
but then when I removed it I forgot to clean the error check. Thanks!
>> + object_property_set_bool(OBJECT(&s->systmr), true, "realized", &err);
>> + if (err) {
>> + error_propagate(errp, err);
>> + return;
>> + }
>> + memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
>> + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0));
>> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0,
>> + qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
>> + INTERRUPT_ARM_TIMER));
>> +
>> /* UART0 */
>> qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
>> object_property_set_bool(OBJECT(&s->uart0), true, "realized", &err);
>> @@ -352,7 +372,6 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
>> }
>>
>> create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
>> - create_unimp(s, &s->systmr, "bcm2835-systimer", ST_OFFSET, 0x20);
>> create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
>> create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
>> create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
>> diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
>> index be7ad9b499..5b9fc89453 100644
>> --- a/include/hw/arm/bcm2835_peripherals.h
>> +++ b/include/hw/arm/bcm2835_peripherals.h
>> @@ -24,6 +24,7 @@
>> #include "hw/sd/sdhci.h"
>> #include "hw/sd/bcm2835_sdhost.h"
>> #include "hw/gpio/bcm2835_gpio.h"
>> +#include "hw/timer/bcm2835_systmr.h"
>> #include "hw/misc/unimp.h"
>>
>> #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
>> @@ -39,7 +40,7 @@ typedef struct BCM2835PeripheralState {
>> MemoryRegion ram_alias[4];
>> qemu_irq irq, fiq;
>>
>> - UnimplementedDeviceState systmr;
>> + BCM2835SysTimerState systmr;
>> UnimplementedDeviceState armtmr;
>> UnimplementedDeviceState cprman;
>> UnimplementedDeviceState a2w;
>
>
> --
> Alex Bennée
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 10/19] hw/timer/bcm2835: Add the BCM2835 SYS_timer
2019-10-08 14:53 ` Philippe Mathieu-Daudé
@ 2019-10-09 11:06 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-09 11:06 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, Alex Bennée, qemu-arm
Cc: Peter Maydell, Zoltán Baldaszti, Alistair Francis,
qemu-devel, Andrew Baumann, Esteban Bosse, Cleber Rosa,
Paolo Bonzini, Clement Deschamps, Marc-André Lureau,
Laurent Bonnans, Cheng Xiang, Pekka Enberg, Guenter Roeck,
Eduardo Habkost
On 10/8/19 4:53 PM, Philippe Mathieu-Daudé wrote:
> On 10/8/19 4:52 PM, Alex Bennée wrote:
>> Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
>>
>>> Add the 64-bit free running timer. Do not model the COMPARE register
>>> (no IRQ generated).
>>> This timer is used by U-Boot and recent Linux kernels:
>>> https://github.com/u-boot/u-boot/blob/v2019.07/include/configs/rpi.h#L19
>>>
>>> Datasheet used:
>>> https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
>>>
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>> ---
>>> Since which kernels? 4.19 seems to use it.
>>>
>>> checkpatch warning:
>>> WARNING: added, moved or deleted file(s), does MAINTAINERS need
>>> updating?
>>> This is OK because the regex are:
>>>
>>> F: hw/*/bcm283*
>>> F: include/hw/*/bcm283*
>>> ---
>>> hw/timer/Makefile.objs | 1 +
>>> hw/timer/bcm2835_systmr.c | 100 ++++++++++++++++++++++++++++++
>>> hw/timer/trace-events | 4 ++
>>> include/hw/timer/bcm2835_systmr.h | 30 +++++++++
>>> 4 files changed, 135 insertions(+)
>>> create mode 100644 hw/timer/bcm2835_systmr.c
>>> create mode 100644 include/hw/timer/bcm2835_systmr.h
>>>
>>> diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
>>> index 123d92c969..696cda5905 100644
>>> --- a/hw/timer/Makefile.objs
>>> +++ b/hw/timer/Makefile.objs
>>> @@ -47,3 +47,4 @@ common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
>>> common-obj-$(CONFIG_CMSDK_APB_TIMER) += cmsdk-apb-timer.o
>>> common-obj-$(CONFIG_CMSDK_APB_DUALTIMER) += cmsdk-apb-dualtimer.o
>>> common-obj-$(CONFIG_MSF2) += mss-timer.o
>>> +common-obj-$(CONFIG_RASPI) += bcm2835_systmr.o
>>> diff --git a/hw/timer/bcm2835_systmr.c b/hw/timer/bcm2835_systmr.c
>>> new file mode 100644
>>> index 0000000000..c4d2b488bd
>>> --- /dev/null
>>> +++ b/hw/timer/bcm2835_systmr.c
>>> @@ -0,0 +1,100 @@
>>> +/*
>>> + * BCM2835 SYS timer emulation
>>> + *
>>> + * Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 or
>>> + * (at your option) any later version.
>>> + *
>>> + * Datasheet: BCM2835 ARM Peripherals (C6357-M-1398)
>>> + *
>>> https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
>>>
>>> + *
>>> + * Only the free running 64-bit counter is implemented.
>>> + * The 4 COMPARE registers and the interruption are not implemented.
>>> + */
>>> +
>>> +#include "qemu/osdep.h"
>>> +#include "qemu/timer.h"
>>> +#include "qemu/log.h"
>>> +#include "hw/registerfields.h"
>>> +#include "hw/timer/bcm2835_systmr.h"
>>> +#include "trace.h"
>>> +
>>> +REG32(CTRL_STATUS, 0x00)
>>> +REG32(COUNTER_LOW, 0x04)
>>> +REG32(COUNTER_HIGH, 0x08)
>>> +REG32(COMPARE0, 0x0c)
>>> +REG32(COMPARE1, 0x10)
>>> +REG32(COMPARE2, 0x14)
>>> +REG32(COMPARE3, 0x18)
>>> +
>>> +static uint64_t bcm2835_sys_timer_read(void *opaque, hwaddr offset,
>>> + unsigned size)
>>> +{
>>> + uint64_t r = 0;
>>> +
>>> + switch (offset) {
>>> + case A_CTRL_STATUS:
>>> + case A_COMPARE0 ... A_COMPARE3:
>>
>> Probably worth a LOG_UNIMP in here if we are not going to do it.
Checking the datasheet again, returning 0 is correct (as long as the
gest doesn't write them) since we don't implement the COMPARE registers.
I'll see if I can implement them.
>>> + break;
>>> + case A_COUNTER_LOW:
>>> + case A_COUNTER_HIGH:
>>> + /* Free running counter at 1MHz */
>>> + r = qemu_clock_get_us(QEMU_CLOCK_VIRTUAL);
>>> + r >>= 8 * (offset - A_COUNTER_LOW);
>>> + r &= UINT32_MAX;
>>> + break;
>>> + default:
>>> + qemu_log_mask(LOG_GUEST_ERROR, "%s: bad offset 0x%"
>>> HWADDR_PRIx "\n",
>>> + __func__, offset);
>>> + break;
>>> + }
>>> + trace_bcm2835_sys_timer_read(offset, r);
>>> +
>>> + return r;
>>> +}
>>> +
>>> +static void bcm2835_sys_timer_write(void *opaque, hwaddr offset,
>>> + uint64_t value, unsigned size)
>>> +{
>>> + trace_bcm2835_sys_timer_write(offset, value);
>>> +
>>> + qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n",
>>> + __func__, offset);
>>> +}
>>> +
>>> +static const MemoryRegionOps bcm2835_sys_timer_ops = {
>>> + .read = bcm2835_sys_timer_read,
>>> + .write = bcm2835_sys_timer_write,
>>> + .endianness = DEVICE_LITTLE_ENDIAN,
>>> + .impl = {
>>> + .min_access_size = 4,
>>> + .max_access_size = 4,
>>> + },
>>> +};
>>> +
>>> +static void bcm2835_sys_timer_init(Object *obj)
>>> +{
>>> + SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
>>> + BCM2835SysTimerState *s = BCM2835_SYSTIMER(obj);
>>> +
>>> + memory_region_init_io(&s->iomem, obj, &bcm2835_sys_timer_ops,
>>> + s, "bcm2835-sys-timer", 0x20);
>>> + sysbus_init_mmio(sbd, &s->iomem);
>>> + sysbus_init_irq(sbd, &s->irq);
>>> +}
>>> +
>>> +static const TypeInfo bcm2835_sys_timer_info = {
>>> + .name = TYPE_BCM2835_SYSTIMER,
>>> + .parent = TYPE_SYS_BUS_DEVICE,
>>> + .instance_size = sizeof(BCM2835SysTimerState),
>>> + .instance_init = bcm2835_sys_timer_init,
>>> +};
>>> +
>>> +static void bcm2835_sys_timer_register_types(void)
>>> +{
>>> + type_register_static(&bcm2835_sys_timer_info);
>>> +}
>>> +
>>> +type_init(bcm2835_sys_timer_register_types);
>>> diff --git a/hw/timer/trace-events b/hw/timer/trace-events
>>> index db02a9142c..81967a1a19 100644
>>> --- a/hw/timer/trace-events
>>> +++ b/hw/timer/trace-events
>>> @@ -87,3 +87,7 @@ pl031_read(uint32_t addr, uint32_t value) "addr
>>> 0x%08x value 0x%08x"
>>> pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
>>> pl031_alarm_raised(void) "alarm raised"
>>> pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
>>> +
>>> +# bcm2835_systmr.c
>>> +bcm2835_sys_timer_read(uint64_t offset, uint64_t data) "timer read:
>>> offset 0x%" PRIx64 " data 0x%" PRIx64
>>> +bcm2835_sys_timer_write(uint64_t offset, uint64_t data) "timer
>>> write: offset 0x%" PRIx64 " data 0x%" PRIx64
>>> diff --git a/include/hw/timer/bcm2835_systmr.h
>>> b/include/hw/timer/bcm2835_systmr.h
>>> new file mode 100644
>>> index 0000000000..6ac7f8ec5a
>>> --- /dev/null
>>> +++ b/include/hw/timer/bcm2835_systmr.h
>>> @@ -0,0 +1,30 @@
>>> +/*
>>> + * BCM2835 SYS timer emulation
>>> + *
>>> + * Copyright (c) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> modify
>>> + * it under the terms of the GNU General Public License version 2 or
>>> + * (at your option) any later version.
>>> + */
>>> +
>>> +#ifndef BCM2835_SYSTIMER_H
>>> +#define BCM2835_SYSTIMER_H
>>> +
>>> +#include "hw/sysbus.h"
>>> +#include "hw/irq.h"
>>> +
>>> +#define TYPE_BCM2835_SYSTIMER "bcm2835-sys-timer"
>>> +#define BCM2835_SYSTIMER(obj) \
>>> + OBJECT_CHECK(BCM2835SysTimerState, (obj), TYPE_BCM2835_SYSTIMER)
>>> +
>>> +typedef struct {
>>> + /*< private >*/
>>> + SysBusDevice parent_obj;
>>> +
>>> + /*< public >*/
>>> + MemoryRegion iomem;
>>> + qemu_irq irq;
>>> +} BCM2835SysTimerState;
>>> +
>>> +#endif
>>
>>
>> --
>> Alex Bennée
>>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 14/19] python/qemu/machine: Allow to use other serial consoles than default
2019-09-26 17:34 ` [PATCH 14/19] python/qemu/machine: Allow to use other serial consoles than default Philippe Mathieu-Daudé
2019-09-27 12:54 ` bzt
@ 2019-10-09 15:28 ` Cleber Rosa
1 sibling, 0 replies; 74+ messages in thread
From: Cleber Rosa @ 2019-10-09 15:28 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Alistair Francis, qemu-devel, Andrew Baumann, Esteban Bosse,
qemu-arm, Clement Deschamps, Marc-André Lureau,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 07:34:22PM +0200, Philippe Mathieu-Daudé wrote:
> Currently we are limited to use the first serial console available.
> Some machines/guest might use another console than the first one as
> the 'boot console'.
>
> To be able to use the N console as default, we simply need to connect
> all the N - 1 consoles to the null chardev.
>
> Add an index argument, so we can use a specific serial console as
> default.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> python/qemu/machine.py | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/python/qemu/machine.py b/python/qemu/machine.py
> index 128a3d1dc2..302b158a18 100644
> --- a/python/qemu/machine.py
> +++ b/python/qemu/machine.py
> @@ -235,6 +235,8 @@ class QEMUMachine(object):
> '-display', 'none', '-vga', 'none']
> if self._machine is not None:
> args.extend(['-machine', self._machine])
> + for i in range(self._console_id):
> + args.extend(['-serial', 'null'])
> if self._console_set:
> self._console_address = os.path.join(self._temp_dir,
> self._name + "-console.sock")
> @@ -495,7 +497,7 @@ class QEMUMachine(object):
> """
> self._machine = machine_type
>
> - def set_console(self, device_type=None):
> + def set_console(self, device_type=None, console_id=0):
My guts tell me that we'll need to support multiple devices of a single
type shortly, but for now, this looks fine.
Would you please add a docstring parameter entry for console_id
explaining its effect?
Thanks,
- Cleber.
> """
> Sets the device type for a console device
>
> @@ -519,6 +521,7 @@ class QEMUMachine(object):
> """
> self._console_set = True
> self._console_device_type = device_type
> + self._console_id = console_id
>
> @property
> def console_socket(self):
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 15/19] tests/boot_linux_console: Extract the gunzip() helper
2019-09-26 17:34 ` [PATCH 15/19] tests/boot_linux_console: Extract the gunzip() helper Philippe Mathieu-Daudé
2019-10-08 15:33 ` Alex Bennée
@ 2019-10-09 15:31 ` Cleber Rosa
2019-10-24 9:23 ` Esteban Bosse
2 siblings, 0 replies; 74+ messages in thread
From: Cleber Rosa @ 2019-10-09 15:31 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Alistair Francis, qemu-devel, Andrew Baumann, Esteban Bosse,
qemu-arm, Clement Deschamps, Marc-André Lureau,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 07:34:23PM +0200, Philippe Mathieu-Daudé wrote:
> We are going to use the same pattern. Instead of keeping
> copy/pasting this code, extract as a local function.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> tests/acceptance/boot_linux_console.py | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
> index 8a9a314ab4..079590f0c8 100644
> --- a/tests/acceptance/boot_linux_console.py
> +++ b/tests/acceptance/boot_linux_console.py
> @@ -19,6 +19,11 @@ from avocado.utils import process
> from avocado.utils import archive
>
>
> +def gunzip(in_pathname_gz, out_pathname):
> + with gzip.open(in_pathname_gz, 'rb') as f_in:
> + with open(out_pathname, 'wb') as f_out:
> + shutil.copyfileobj(f_in, f_out)
> +
> class BootLinuxConsole(Test):
> """
> Boots a Linux kernel and checks that the console is operational and the
> @@ -166,10 +171,7 @@ class BootLinuxConsole(Test):
> initrd_hash = 'bf806e17009360a866bf537f6de66590de349a99'
> initrd_path_gz = self.fetch_asset(initrd_url, asset_hash=initrd_hash)
> initrd_path = self.workdir + "rootfs.cpio"
> -
> - with gzip.open(initrd_path_gz, 'rb') as f_in:
> - with open(initrd_path, 'wb') as f_out:
> - shutil.copyfileobj(f_in, f_out)
I'd rather see this eliminated...
> + gunzip(initrd_path_gz, initrd_path)
... and this becoming:
archive.gzip_uncompress(initrd_path_gz, initrd_path)
- Cleber.
>
> self.vm.set_machine('malta')
> self.vm.set_console()
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 16/19] tests/boot_linux_console: Add a test for the Raspberry Pi 2
2019-09-26 17:34 ` [PATCH 16/19] tests/boot_linux_console: Add a test for the Raspberry Pi 2 Philippe Mathieu-Daudé
2019-10-08 15:34 ` Alex Bennée
@ 2019-10-09 15:43 ` Cleber Rosa
2019-10-09 15:43 ` Cleber Rosa
1 sibling, 1 reply; 74+ messages in thread
From: Cleber Rosa @ 2019-10-09 15:43 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Alistair Francis, qemu-devel, Andrew Baumann, Esteban Bosse,
qemu-arm, Clement Deschamps, Marc-André Lureau,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 07:34:24PM +0200, Philippe Mathieu-Daudé wrote:
> Similar to the x86_64/pc test, it boots a Linux kernel on a raspi2
> board and verify the serial is working.
>
> The kernel image and DeviceTree blob are built by the Raspbian
> project (based on Debian):
> https://www.raspbian.org/RaspbianImages
> as recommended by the Raspberry Pi project:
> https://www.raspberrypi.org/downloads/raspbian/
>
> If ARM is a target being built, "make check-acceptance" will
> automatically include this test by the use of the "arch:arm" tags.
>
> Alternatively, this test can be run using:
>
> $ avocado run -t arch:arm tests/acceptance
> $ avocado run -t machine:raspi2 tests/acceptance
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> v3: removed debug printf (Cleber)
> use serial_kernel_cmdline dict
> ---
> tests/acceptance/boot_linux_console.py | 36 ++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
> index 079590f0c8..7eaf6cb60e 100644
> --- a/tests/acceptance/boot_linux_console.py
> +++ b/tests/acceptance/boot_linux_console.py
> @@ -318,6 +318,42 @@ class BootLinuxConsole(Test):
> self.vm.launch()
> self.wait_for_console_pattern('init started: BusyBox')
>
> + def do_test_arm_raspi2(self, uart_id):
> + """
> + The kernel can be rebuilt using the kernel source referenced
> + and following the instructions on the on:
> + https://www.raspberrypi.org/documentation/linux/kernel/building.md
> + """
> + serial_kernel_cmdline = {
> + 0: 'earlycon=pl011,0x3f201000 console=ttyAMA0',
> + }
> + deb_url = ('http://archive.raspberrypi.org/debian/'
> + 'pool/main/r/raspberrypi-firmware/'
> + 'raspberrypi-kernel_1.20190215-1_armhf.deb')
> + deb_hash = 'cd284220b32128c5084037553db3c482426f3972'
> + deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash)
> + kernel_path = self.extract_from_deb(deb_path, '/boot/kernel7.img')
> + dtb_path = self.extract_from_deb(deb_path, '/boot/bcm2709-rpi-2-b.dtb')
> +
> + self.vm.set_machine('raspi2')
> + self.vm.set_console()
> + kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
> + serial_kernel_cmdline[uart_id])
> + self.vm.add_args('-kernel', kernel_path,
> + '-dtb', dtb_path,
> + '-append', kernel_command_line)
> + self.vm.launch()
> + console_pattern = 'Kernel command line: %s' % kernel_command_line
> + self.wait_for_console_pattern(console_pattern)
> +
> + def test_arm_raspi2_uart0(self):
> + """
> + :avocado: tags=arch:arm
> + :avocado: tags=machine:raspi2
> + :avocado: tags=device:pl011
> + """
> + self.do_test_arm_raspi2(0)
> +
> def test_s390x_s390_ccw_virtio(self):
> """
> :avocado: tags=arch:s390x
> --
> 2.20.1
>
Reviewed-by: Cleber Rosa <crosa@redhat.com>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 16/19] tests/boot_linux_console: Add a test for the Raspberry Pi 2
2019-10-09 15:43 ` Cleber Rosa
@ 2019-10-09 15:43 ` Cleber Rosa
0 siblings, 0 replies; 74+ messages in thread
From: Cleber Rosa @ 2019-10-09 15:43 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Alistair Francis, qemu-devel, Andrew Baumann, Esteban Bosse,
qemu-arm, Clement Deschamps, Marc-André Lureau,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Wed, Oct 09, 2019 at 11:43:15AM -0400, Cleber Rosa wrote:
> On Thu, Sep 26, 2019 at 07:34:24PM +0200, Philippe Mathieu-Daudé wrote:
> > Similar to the x86_64/pc test, it boots a Linux kernel on a raspi2
> > board and verify the serial is working.
> >
> > The kernel image and DeviceTree blob are built by the Raspbian
> > project (based on Debian):
> > https://www.raspbian.org/RaspbianImages
> > as recommended by the Raspberry Pi project:
> > https://www.raspberrypi.org/downloads/raspbian/
> >
> > If ARM is a target being built, "make check-acceptance" will
> > automatically include this test by the use of the "arch:arm" tags.
> >
> > Alternatively, this test can be run using:
> >
> > $ avocado run -t arch:arm tests/acceptance
> > $ avocado run -t machine:raspi2 tests/acceptance
> >
> > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > ---
> > v3: removed debug printf (Cleber)
> > use serial_kernel_cmdline dict
> > ---
> > tests/acceptance/boot_linux_console.py | 36 ++++++++++++++++++++++++++
> > 1 file changed, 36 insertions(+)
> >
> > diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
> > index 079590f0c8..7eaf6cb60e 100644
> > --- a/tests/acceptance/boot_linux_console.py
> > +++ b/tests/acceptance/boot_linux_console.py
> > @@ -318,6 +318,42 @@ class BootLinuxConsole(Test):
> > self.vm.launch()
> > self.wait_for_console_pattern('init started: BusyBox')
> >
> > + def do_test_arm_raspi2(self, uart_id):
> > + """
> > + The kernel can be rebuilt using the kernel source referenced
> > + and following the instructions on the on:
> > + https://www.raspberrypi.org/documentation/linux/kernel/building.md
> > + """
> > + serial_kernel_cmdline = {
> > + 0: 'earlycon=pl011,0x3f201000 console=ttyAMA0',
> > + }
> > + deb_url = ('http://archive.raspberrypi.org/debian/'
> > + 'pool/main/r/raspberrypi-firmware/'
> > + 'raspberrypi-kernel_1.20190215-1_armhf.deb')
> > + deb_hash = 'cd284220b32128c5084037553db3c482426f3972'
> > + deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash)
> > + kernel_path = self.extract_from_deb(deb_path, '/boot/kernel7.img')
> > + dtb_path = self.extract_from_deb(deb_path, '/boot/bcm2709-rpi-2-b.dtb')
> > +
> > + self.vm.set_machine('raspi2')
> > + self.vm.set_console()
> > + kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
> > + serial_kernel_cmdline[uart_id])
> > + self.vm.add_args('-kernel', kernel_path,
> > + '-dtb', dtb_path,
> > + '-append', kernel_command_line)
> > + self.vm.launch()
> > + console_pattern = 'Kernel command line: %s' % kernel_command_line
> > + self.wait_for_console_pattern(console_pattern)
> > +
> > + def test_arm_raspi2_uart0(self):
> > + """
> > + :avocado: tags=arch:arm
> > + :avocado: tags=machine:raspi2
> > + :avocado: tags=device:pl011
> > + """
> > + self.do_test_arm_raspi2(0)
> > +
> > def test_s390x_s390_ccw_virtio(self):
> > """
> > :avocado: tags=arch:s390x
> > --
> > 2.20.1
> >
>
> Reviewed-by: Cleber Rosa <crosa@redhat.com>
I also meant:
Tested-by: Cleber Rosa <crosa@redhat.com>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 17/19] tests/boot_linux_console: Test the raspi2 UART1 (16550 based)
2019-09-26 17:34 ` [PATCH 17/19] tests/boot_linux_console: Test the raspi2 UART1 (16550 based) Philippe Mathieu-Daudé
2019-10-08 15:35 ` Alex Bennée
@ 2019-10-09 15:54 ` Cleber Rosa
1 sibling, 0 replies; 74+ messages in thread
From: Cleber Rosa @ 2019-10-09 15:54 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Alistair Francis, qemu-devel, Andrew Baumann, Esteban Bosse,
qemu-arm, Clement Deschamps, Marc-André Lureau,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 07:34:25PM +0200, Philippe Mathieu-Daudé wrote:
> The current do_test_arm_raspi2() case tests the PL011 UART0.
> Our model also supports the AUX UART (16550 based).
> We can very simply test the UART1 with Linux, modifying the
> kernel command line.
>
> Add few lines to expand our previous test and cover the AUX
> UART.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> tests/acceptance/boot_linux_console.py | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
> index 7eaf6cb60e..33e8f6c635 100644
> --- a/tests/acceptance/boot_linux_console.py
> +++ b/tests/acceptance/boot_linux_console.py
> @@ -326,6 +326,7 @@ class BootLinuxConsole(Test):
> """
> serial_kernel_cmdline = {
> 0: 'earlycon=pl011,0x3f201000 console=ttyAMA0',
> + 1: 'earlycon=uart8250,mmio32,0x3f215040 console=ttyS1,115200'
> }
> deb_url = ('http://archive.raspberrypi.org/debian/'
> 'pool/main/r/raspberrypi-firmware/'
> @@ -336,7 +337,7 @@ class BootLinuxConsole(Test):
> dtb_path = self.extract_from_deb(deb_path, '/boot/bcm2709-rpi-2-b.dtb')
>
> self.vm.set_machine('raspi2')
> - self.vm.set_console()
> + self.vm.set_console(console_id=uart_id)
> kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
> serial_kernel_cmdline[uart_id])
> self.vm.add_args('-kernel', kernel_path,
> @@ -354,6 +355,14 @@ class BootLinuxConsole(Test):
> """
> self.do_test_arm_raspi2(0)
>
> + def test_arm_raspi2_uart1(self):
> + """
> + :avocado: tags=arch:arm
> + :avocado: tags=machine:raspi2
> + :avocado: tags=device:bcm2835_aux
> + """
> + self.do_test_arm_raspi2(1)
> +
> def test_s390x_s390_ccw_virtio(self):
> """
> :avocado: tags=arch:s390x
> --
> 2.20.1
>
Reviewed-by: Cleber Rosa <crosa@redhat.com>
Tested-by: Cleber Rosa <crosa@redhat.com>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 18/19] tests/boot_linux_console: Boot Linux and run few commands on raspi3
2019-09-26 17:34 ` [PATCH 18/19] tests/boot_linux_console: Boot Linux and run few commands on raspi3 Philippe Mathieu-Daudé
@ 2019-10-09 16:12 ` Cleber Rosa
2019-10-09 16:21 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 74+ messages in thread
From: Cleber Rosa @ 2019-10-09 16:12 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Alistair Francis, qemu-devel, Andrew Baumann, Esteban Bosse,
qemu-arm, Clement Deschamps, Marc-André Lureau,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 07:34:26PM +0200, Philippe Mathieu-Daudé wrote:
> Add a test which boots Linux and run basic commands using the serial
> port console.
>
> The kernel image is built by the Debian project:
> https://wiki.debian.org/RaspberryPi
>
> The DeviceTree blob comes from the official Raspberry Pi project:
> https://www.raspberrypi.org/
>
> The cpio image used comes from the linux-build-test project:
> https://github.com/groeck/linux-build-test
>
> This test can be run using:
>
> $ avocado run --show=console,app run -t machine:raspi3 tests/acceptance
> console: [ 0.000000] Linux version 4.14.0-3-arm64 (debian-kernel@lists.debian.org) (gcc version 7.2.0 (Debian 7.2.0-18)) #1 SMP Debian 4.14.12-2 (2018-01-06)
> console: [ 0.000000] Boot CPU: AArch64 Processor [410fd034]
> console: [ 0.000000] Machine model: Raspberry Pi 3 Model B
> console: [ 0.000000] earlycon: pl11 at MMIO 0x000000003f201000 (options '')
> console: [ 0.000000] bootconsole [pl11] enabled
> [...]
> console: Starting network: OK
> console: Found console ttyAMA0
> console: Boot successful.
> console: / # cat /proc/cpuinfo
> console: processor : 0
> console: BogoMIPS : 125.00
> console: r : 0x41
> console: CPU architecture: 8
> console: CPU variant
> console: : 0x0
> console: CPU part : 0xd03
> console: CPU revision : 4
> console: / # uname -a
> console: Linux buildroot 4.14.0-3-arm64 #1 SMP Debian 4.14.12-2 (2018-01-06) aarch64 GNU/Linux
> console: reboot
> console: / # reboot
> console: / # Found console ttyAMA0
> console: Stopping network: OK
> console: Saving random seed... done.
> console: Stopping logging: OK
> console: umount: devtmpfs busy - remounted read-only
> console: umount: can't unmount /: Invalid argument
> console: The system is going down NOW!
> console: Sent SIGTERM to all processes
> console: Sent SIGKILL to all processes
> console: Requesting system reboot
> console: kvm: exiting hardware virtualization
> console: reboot: Restarting system
> PASS (11.08 s)
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> some chars are scrambled on the console...
> ---
> tests/acceptance/boot_linux_console.py | 47 ++++++++++++++++++++++++++
> 1 file changed, 47 insertions(+)
>
> diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
> index 33e8f6c635..2a1a23763e 100644
> --- a/tests/acceptance/boot_linux_console.py
> +++ b/tests/acceptance/boot_linux_console.py
> @@ -363,6 +363,53 @@ class BootLinuxConsole(Test):
> """
> self.do_test_arm_raspi2(1)
>
> + def test_arm_raspi3_initrd_uart0(self):
> + """
> + :avocado: tags=arch:aarch64
> + :avocado: tags=machine:raspi3
> + """
> + deb_url = ('https://snapshot.debian.org/archive/debian/'
> + '20180106T174014Z/pool/main/l/linux/'
> + 'linux-image-4.14.0-3-arm64_4.14.12-2_arm64.deb')
> + deb_hash = 'e71c995de57921921895c1162baea5df527d1c6b'
> + deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash)
> + kernel_path = self.extract_from_deb(deb_path,
> + '/boot/vmlinuz-4.14.0-3-arm64')
> +
> + dtb_url = ('https://github.com/raspberrypi/firmware/raw/'
> + '1.20180313/boot/bcm2710-rpi-3-b.dtb')
> + dtb_hash = 'eb14d67133401ef2f93523be7341456d38bfc077'
> + dtb_path = self.fetch_asset(dtb_url, asset_hash=dtb_hash)
> +
> + initrd_url = ('https://github.com/groeck/linux-build-test/raw/'
> + '9b6b392ea7bc15f0d6632328d429d31c9c6273da/rootfs/'
> + 'arm64/rootfs.cpio.gz')
> + initrd_hash = '6fd05324f17bb950196b5ad9d3a0fa996339f4cd'
> + initrd_path_gz = self.fetch_asset(initrd_url, asset_hash=initrd_hash)
> + initrd_path = self.workdir + "rootfs.cpio"
> + gunzip(initrd_path_gz, initrd_path)
> +
> + self.vm.set_machine('raspi3')
> + self.vm.set_console()
> + kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
> + 'earlycon=pl011,0x3f201000 console=ttyAMA0 ' +
> + 'panic=-1 noreboot')
> + self.vm.add_args('-kernel', kernel_path,
> + '-dtb', dtb_path,
> + '-initrd', initrd_path,
> + '-append', kernel_command_line,
> + '-no-reboot')
> + self.vm.launch()
> +
> + self.wait_for_console_pattern('Boot successful.')
> +
> + self.exec_command_and_wait_for_pattern('cat /proc/cpuinfo',
> + 'BogoMIPS')
> + self.exec_command_and_wait_for_pattern('uname -a',
> + 'Debian')
> + self.exec_command_and_wait_for_pattern('reboot',
> + 'reboot: Restarting system')
> +
> def test_s390x_s390_ccw_virtio(self):
> """
> :avocado: tags=arch:s390x
> --
> 2.20.1
>
Reviewed-by: Cleber Rosa <crosa@redhat.com>
And even though you mentioned some trouble with the console, I've run
this 100 times and had no issues that disturbed the test, so:
Tested-by: Cleber Rosa <crosa@redhat.com>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 18/19] tests/boot_linux_console: Boot Linux and run few commands on raspi3
2019-10-09 16:12 ` Cleber Rosa
@ 2019-10-09 16:21 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-09 16:21 UTC (permalink / raw)
To: Cleber Rosa
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Alistair Francis, qemu-devel, Andrew Baumann, Esteban Bosse,
qemu-arm, Clement Deschamps, Marc-André Lureau,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On 10/9/19 6:12 PM, Cleber Rosa wrote:
> On Thu, Sep 26, 2019 at 07:34:26PM +0200, Philippe Mathieu-Daudé wrote:
>> Add a test which boots Linux and run basic commands using the serial
>> port console.
>>
>> The kernel image is built by the Debian project:
>> https://wiki.debian.org/RaspberryPi
>>
>> The DeviceTree blob comes from the official Raspberry Pi project:
>> https://www.raspberrypi.org/
>>
>> The cpio image used comes from the linux-build-test project:
>> https://github.com/groeck/linux-build-test
>>
>> This test can be run using:
>>
>> $ avocado run --show=console,app run -t machine:raspi3 tests/acceptance
>> console: [ 0.000000] Linux version 4.14.0-3-arm64 (debian-kernel@lists.debian.org) (gcc version 7.2.0 (Debian 7.2.0-18)) #1 SMP Debian 4.14.12-2 (2018-01-06)
>> console: [ 0.000000] Boot CPU: AArch64 Processor [410fd034]
>> console: [ 0.000000] Machine model: Raspberry Pi 3 Model B
>> console: [ 0.000000] earlycon: pl11 at MMIO 0x000000003f201000 (options '')
>> console: [ 0.000000] bootconsole [pl11] enabled
>> [...]
>> console: Starting network: OK
>> console: Found console ttyAMA0
>> console: Boot successful.
>> console: / # cat /proc/cpuinfo
>> console: processor : 0
>> console: BogoMIPS : 125.00
>> console: r : 0x41
>> console: CPU architecture: 8
>> console: CPU variant
>> console: : 0x0
>> console: CPU part : 0xd03
>> console: CPU revision : 4
>> console: / # uname -a
>> console: Linux buildroot 4.14.0-3-arm64 #1 SMP Debian 4.14.12-2 (2018-01-06) aarch64 GNU/Linux
>> console: reboot
>> console: / # reboot
>> console: / # Found console ttyAMA0
>> console: Stopping network: OK
>> console: Saving random seed... done.
>> console: Stopping logging: OK
>> console: umount: devtmpfs busy - remounted read-only
>> console: umount: can't unmount /: Invalid argument
>> console: The system is going down NOW!
>> console: Sent SIGTERM to all processes
>> console: Sent SIGKILL to all processes
>> console: Requesting system reboot
>> console: kvm: exiting hardware virtualization
>> console: reboot: Restarting system
>> PASS (11.08 s)
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> some chars are scrambled on the console...
>> ---
>> tests/acceptance/boot_linux_console.py | 47 ++++++++++++++++++++++++++
>> 1 file changed, 47 insertions(+)
>>
>> diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
>> index 33e8f6c635..2a1a23763e 100644
>> --- a/tests/acceptance/boot_linux_console.py
>> +++ b/tests/acceptance/boot_linux_console.py
>> @@ -363,6 +363,53 @@ class BootLinuxConsole(Test):
>> """
>> self.do_test_arm_raspi2(1)
>>
>> + def test_arm_raspi3_initrd_uart0(self):
>> + """
>> + :avocado: tags=arch:aarch64
>> + :avocado: tags=machine:raspi3
>> + """
>> + deb_url = ('https://snapshot.debian.org/archive/debian/'
>> + '20180106T174014Z/pool/main/l/linux/'
>> + 'linux-image-4.14.0-3-arm64_4.14.12-2_arm64.deb')
>> + deb_hash = 'e71c995de57921921895c1162baea5df527d1c6b'
>> + deb_path = self.fetch_asset(deb_url, asset_hash=deb_hash)
>> + kernel_path = self.extract_from_deb(deb_path,
>> + '/boot/vmlinuz-4.14.0-3-arm64')
>> +
>> + dtb_url = ('https://github.com/raspberrypi/firmware/raw/'
>> + '1.20180313/boot/bcm2710-rpi-3-b.dtb')
>> + dtb_hash = 'eb14d67133401ef2f93523be7341456d38bfc077'
>> + dtb_path = self.fetch_asset(dtb_url, asset_hash=dtb_hash)
>> +
>> + initrd_url = ('https://github.com/groeck/linux-build-test/raw/'
>> + '9b6b392ea7bc15f0d6632328d429d31c9c6273da/rootfs/'
>> + 'arm64/rootfs.cpio.gz')
>> + initrd_hash = '6fd05324f17bb950196b5ad9d3a0fa996339f4cd'
>> + initrd_path_gz = self.fetch_asset(initrd_url, asset_hash=initrd_hash)
>> + initrd_path = self.workdir + "rootfs.cpio"
>> + gunzip(initrd_path_gz, initrd_path)
>> +
>> + self.vm.set_machine('raspi3')
>> + self.vm.set_console()
>> + kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
>> + 'earlycon=pl011,0x3f201000 console=ttyAMA0 ' +
>> + 'panic=-1 noreboot')
>> + self.vm.add_args('-kernel', kernel_path,
>> + '-dtb', dtb_path,
>> + '-initrd', initrd_path,
>> + '-append', kernel_command_line,
>> + '-no-reboot')
>> + self.vm.launch()
>> +
>> + self.wait_for_console_pattern('Boot successful.')
>> +
>> + self.exec_command_and_wait_for_pattern('cat /proc/cpuinfo',
>> + 'BogoMIPS')
>> + self.exec_command_and_wait_for_pattern('uname -a',
>> + 'Debian')
>> + self.exec_command_and_wait_for_pattern('reboot',
>> + 'reboot: Restarting system')
>> +
>> def test_s390x_s390_ccw_virtio(self):
>> """
>> :avocado: tags=arch:s390x
>> --
>> 2.20.1
>>
>
> Reviewed-by: Cleber Rosa <crosa@redhat.com>
>
> And even though you mentioned some trouble with the console, I've run
> this 100 times and had no issues that disturbed the test, so:
Ahaha thanks for insisting :)
I ran the Exynos4210 test 20 times and it did not fail, I'll try 80 more
times.
>
> Tested-by: Cleber Rosa <crosa@redhat.com>
Thanks!
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 19/19] tests/boot_linux_console: Test SDHCI and termal sensor on raspi3
2019-09-26 17:34 ` [PATCH 19/19] tests/boot_linux_console: Test SDHCI and termal sensor " Philippe Mathieu-Daudé
@ 2019-10-09 16:23 ` Cleber Rosa
0 siblings, 0 replies; 74+ messages in thread
From: Cleber Rosa @ 2019-10-09 16:23 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Alistair Francis, qemu-devel, Andrew Baumann, Esteban Bosse,
qemu-arm, Clement Deschamps, Marc-André Lureau,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, Sep 26, 2019 at 07:34:27PM +0200, Philippe Mathieu-Daudé wrote:
> Add a test which loads the root filesystem on a SD card.
> Use a kernel recent enough to also test the thermal sensor.
>
> The kernel image comes from:
> https://github.com/sakaki-/bcmrpi3-kernel#description
>
> The cpio image used comes from the linux-build-test project:
> https://github.com/groeck/linux-build-test
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> tests/acceptance/boot_linux_console.py | 45 ++++++++++++++++++++++++++
> 1 file changed, 45 insertions(+)
>
> diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
> index 2a1a23763e..5c48cacba8 100644
> --- a/tests/acceptance/boot_linux_console.py
> +++ b/tests/acceptance/boot_linux_console.py
> @@ -410,6 +410,51 @@ class BootLinuxConsole(Test):
> self.exec_command_and_wait_for_pattern('reboot',
> 'reboot: Restarting system')
>
> + def test_arm_raspi3_initrd_sd_temp(self):
> + """
> + :avocado: tags=arch:aarch64
> + :avocado: tags=machine:raspi3
> + """
> + tarball_url = ('https://github.com/sakaki-/bcmrpi3-kernel/releases/'
> + 'download/4.19.71.20190910/'
> + 'bcmrpi3-kernel-4.19.71.20190910.tar.xz')
> + tarball_hash = '844f117a1a6de0532ba92d2a7bceb5b2acfbb298'
> + tarball_path = self.fetch_asset(tarball_url, asset_hash=tarball_hash)
> + archive.extract(tarball_path, self.workdir)
> + dtb_path = self.workdir + "/boot/bcm2837-rpi-3-b.dtb"
> + kernel_path = self.workdir + "/boot/kernel8.img"
> +
> + rootfs_url = ('https://github.com/groeck/linux-build-test/raw/'
> + '9b6b392ea7bc15f0d6632328d429d31c9c6273da/rootfs/'
> + 'arm64/rootfs.ext2.gz')
> + rootfs_hash = 'dbe4136f0b4a0d2180b93fd2a3b9a784f9951d10'
> + rootfs_path_gz = self.fetch_asset(rootfs_url, asset_hash=rootfs_hash)
> + rootfs_path = self.workdir + "rootfs.ext2"
> + gunzip(rootfs_path_gz, rootfs_path)
If you drop the local gunzip method utility, you'll have to touch this.
> +
> + self.vm.set_machine('raspi3')
> + self.vm.set_console()
> + kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
> + 'earlycon=pl011,0x3f201000 console=ttyAMA0 ' +
> + 'root=/dev/mmcblk0 rootwait rw ' +
> + 'panic=-1 noreboot')
> + self.vm.add_args('-kernel', kernel_path,
> + '-dtb', dtb_path,
> + '-append', kernel_command_line,
> + '-drive', 'file=' + rootfs_path + ',if=sd,format=raw',
> + '-no-reboot')
> + self.vm.launch()
> +
> + self.wait_for_console_pattern('Boot successful.')
> +
> + self.exec_command_and_wait_for_pattern('cat /proc/cpuinfo',
> + 'Raspberry Pi 3 Model B')
> + self.exec_command_and_wait_for_pattern('cat /sys/devices/virtual/' +
> + 'thermal/thermal_zone0/temp',
> + '25178')
Nitpick: you could avoid the strings concatenation operation with:
self.exec_command_and_wait_for_pattern(('cat /sys/devices/virtual/'
'thermal/thermal_zone0/temp'),
'25178')
> + self.exec_command_and_wait_for_pattern('reboot',
> + 'reboot: Restarting system')
> +
> def test_s390x_s390_ccw_virtio(self):
> """
> :avocado: tags=arch:s390x
> --
> 2.20.1
>
Either way,
Reviewed-by: Cleber Rosa <crosa@redhat.com>
Tested-by: Cleber Rosa <crosa@redhat.com>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 05/19] hw/arm/bcm2835: Add various unimplemented peripherals
2019-10-08 9:43 ` Philippe Mathieu-Daudé
@ 2019-10-11 21:55 ` Alistair Francis
0 siblings, 0 replies; 74+ messages in thread
From: Alistair Francis @ 2019-10-11 21:55 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, Zoltán Baldaszti, Paolo Bonzini,
Alistair Francis, qemu-devel@nongnu.org Developers,
Andrew Baumann, Esteban Bosse, Cleber Rosa, qemu-arm,
Clement Deschamps, Marc-André Lureau, Laurent Bonnans,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Tue, Oct 8, 2019 at 2:43 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Hi Alistair,
>
> On 9/27/19 11:42 PM, Alistair Francis wrote:
> > On Thu, Sep 26, 2019 at 10:44 AM Philippe Mathieu-Daudé
> > <f4bug@amsat.org> wrote:
> >>
> >> Base addresses and sizes taken from the "BCM2835 ARM Peripherals"
> >> datasheet from February 06 2012:
> >> https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
> >>
> >> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> >> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> >> ---
> >> hw/arm/bcm2835_peripherals.c | 31 ++++++++++++++++++++++++++++
> >> include/hw/arm/bcm2835_peripherals.h | 15 ++++++++++++++
> >> include/hw/arm/raspi_platform.h | 8 +++++++
> >> 3 files changed, 54 insertions(+)
> >>
> >> diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
> >> index 1bd2ff41d5..fdcf616c56 100644
> >> --- a/hw/arm/bcm2835_peripherals.c
> >> +++ b/hw/arm/bcm2835_peripherals.c
> >> @@ -22,6 +22,20 @@
> >> /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
> >> #define BCM2835_SDHC_CAPAREG 0x52134b4
> >>
> >> +static void create_unimp(BCM2835PeripheralState *ps,
> >> + UnimplementedDeviceState *uds,
> >> + const char *name, hwaddr ofs, hwaddr size)
> >> +{
> >> + sysbus_init_child_obj(OBJECT(ps), name, uds,
> >> + sizeof(UnimplementedDeviceState),
> >> + TYPE_UNIMPLEMENTED_DEVICE);
> >> + qdev_prop_set_string(DEVICE(uds), "name", name);
> >> + qdev_prop_set_uint64(DEVICE(uds), "size", size);
> >> + object_property_set_bool(OBJECT(uds), true, "realized", &error_fatal);
> >> + memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
> >> + sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
> >
> > Why not just use create_unimplemented_device() and not bother saving
> > the UnimplementedDeviceState members in the struct?
>
> create_unimplemented_device() calls
> -> sysbus_mmio_map_overlap()
> -> sysbus_mmio_map_common()
> -> memory_region_del_subregion(get_system_memory())
>
> So it maps the device at *absolute* offset in the system memory.
>
> create_unimp() maps the device at offset *relative* to peri_mr.
>
> Patch 8 of this series maps the PERI (container) block at peri_base
> (fixed at BCM2836_PERI_BASE=0x3F000000 for the 2836/2837), then patch 12
> adds the 2838 which has PERI mapped at 0xfe000000. So we have the same
> "container" block mapped at different addresses.
> Not the PERI block itself doesn't know its base address, all offsets are
> relative.
>
> So using create_unimp() allow to use the same block in two different SoCs.
Ah, makes sense.
Maybe that is worth adding in the commit message, unless it's just
obvious and I am missing something.
Either way:
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
>
> 8: https://lists.gnu.org/archive/html/qemu-devel/2019-09/msg00678.html
> 12: https://lists.gnu.org/archive/html/qemu-devel/2019-09/msg00684.html
>
> >> +}
> >> +
> >> static void bcm2835_peripherals_init(Object *obj)
> >> {
> >> BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
> >> @@ -323,6 +337,23 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
> >> error_propagate(errp, err);
> >> return;
> >> }
> >> +
> >> + create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
> >> + create_unimp(s, &s->systmr, "bcm2835-systimer", ST_OFFSET, 0x20);
> >> + create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
> >> + create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
> >> + create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
> >> + create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
> >> + create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
> >> + create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
> >> + create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20);
> >> + create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20);
> >> + create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20);
> >> + create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
> >> + create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
> >> + create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
> >> + create_unimp(s, &s->dwc2, "dwc-usb2", USB_OTG_OFFSET, 0x1000);
> >> + create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
> >> }
> >>
> >> static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
> >> diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
> >> index 6b17f6a382..62a4c7b559 100644
> >> --- a/include/hw/arm/bcm2835_peripherals.h
> >> +++ b/include/hw/arm/bcm2835_peripherals.h
> >> @@ -23,6 +23,7 @@
> >> #include "hw/sd/sdhci.h"
> >> #include "hw/sd/bcm2835_sdhost.h"
> >> #include "hw/gpio/bcm2835_gpio.h"
> >> +#include "hw/misc/unimp.h"
> >>
> >> #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
> >> #define BCM2835_PERIPHERALS(obj) \
> >> @@ -37,6 +38,10 @@ typedef struct BCM2835PeripheralState {
> >> MemoryRegion ram_alias[4];
> >> qemu_irq irq, fiq;
> >>
> >> + UnimplementedDeviceState systmr;
> >> + UnimplementedDeviceState armtmr;
> >> + UnimplementedDeviceState cprman;
> >> + UnimplementedDeviceState a2w;
> >> PL011State uart0;
> >> BCM2835AuxState aux;
> >> BCM2835FBState fb;
> >> @@ -48,6 +53,16 @@ typedef struct BCM2835PeripheralState {
> >> SDHCIState sdhci;
> >> BCM2835SDHostState sdhost;
> >> BCM2835GpioState gpio;
> >> + UnimplementedDeviceState i2s;
> >> + UnimplementedDeviceState spi[1];
> >> + UnimplementedDeviceState i2c[3];
> >> + UnimplementedDeviceState otp;
> >> + UnimplementedDeviceState dbus;
> >> + UnimplementedDeviceState ave0;
> >> + UnimplementedDeviceState bscsl;
> >> + UnimplementedDeviceState smi;
> >> + UnimplementedDeviceState dwc2;
> >> + UnimplementedDeviceState sdramc;
> >> } BCM2835PeripheralState;
> >>
> >> #endif /* BCM2835_PERIPHERALS_H */
> >> diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
> >> index 66969fac5d..cdcbca943f 100644
> >> --- a/include/hw/arm/raspi_platform.h
> >> +++ b/include/hw/arm/raspi_platform.h
> >> @@ -38,6 +38,8 @@
> >> * Doorbells & Mailboxes */
> >> #define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
> >> #define CM_OFFSET 0x101000 /* Clock Management */
> >> +#define A2W_OFFSET 0x102000 /* Reset controller */
> >> +#define AVS_OFFSET 0x103000 /* Audio Video Standard */
> >> #define RNG_OFFSET 0x104000
> >> #define GPIO_OFFSET 0x200000
> >> #define UART0_OFFSET 0x201000
> >> @@ -45,11 +47,17 @@
> >> #define I2S_OFFSET 0x203000
> >> #define SPI0_OFFSET 0x204000
> >> #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
> >> +#define OTP_OFFSET 0x20f000
> >> +#define BSC_SL_OFFSET 0x214000 /* SPI slave */
> >> #define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
> >> #define EMMC1_OFFSET 0x300000
> >> #define SMI_OFFSET 0x600000
> >> #define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */
> >> +#define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */
> >> +#define DBUS_OFFSET 0x900000
> >> +#define AVE0_OFFSET 0x910000
> >> #define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */
> >> +#define SDRAMC_OFFSET 0xe00000
> >> #define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */
> >>
> >> /* GPU interrupts */
> >> --
> >> 2.20.1
> >>
> >>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 06/19] hw/char/bcm2835_aux: Add trace events
2019-09-26 17:34 ` [PATCH 06/19] hw/char/bcm2835_aux: Add trace events Philippe Mathieu-Daudé
2019-10-08 11:22 ` Alex Bennée
@ 2019-10-14 15:36 ` Peter Maydell
2019-10-14 16:03 ` Philippe Mathieu-Daudé
1 sibling, 1 reply; 74+ messages in thread
From: Peter Maydell @ 2019-10-14 15:36 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Zoltán Baldaszti, Laurent Bonnans, Esteban Bosse,
Alistair Francis, QEMU Developers, Andrew Baumann,
Marc-André Lureau, qemu-arm, Clement Deschamps, Cleber Rosa,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, 26 Sep 2019 at 18:34, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> The BCM2835 AUX UART is compatible with the 16650 model, when
> the registers belong the the 16650 block, use its trace events,
> else use bcm2835_aux_read/write.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> + if (is_16650(offset)) {
> + trace_serial_ioport_read((offset & 0x1f) >> 2, res);
> + } else {
> + trace_bcm2835_aux_read(offset, res);
> + }
I'm not really a fan of this. I would expect that if I turn
on the trace point for reads from the device that I see all
the reads, not just a subset of them. The device may be
minimally software-compatible with a 16650, but it isn't actually
a 16650, and there doesn't seem to be much point in sharing
the serial_ioport_read() tracepoint.
thanks
-- PMM
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 08/19] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
2019-09-26 17:34 ` [PATCH 08/19] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor Philippe Mathieu-Daudé
2019-10-08 11:36 ` Alex Bennée
@ 2019-10-14 15:37 ` Peter Maydell
2019-10-14 16:05 ` Philippe Mathieu-Daudé
1 sibling, 1 reply; 74+ messages in thread
From: Peter Maydell @ 2019-10-14 15:37 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Zoltán Baldaszti, Laurent Bonnans, Esteban Bosse,
Alistair Francis, QEMU Developers, Andrew Baumann,
Marc-André Lureau, qemu-arm, Clement Deschamps, Cleber Rosa,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, 26 Sep 2019 at 18:34, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> We will soon implement the SYS_timer. This timer is used by Linux
> in the thermal subsystem, so once available, the subsystem will be
> enabled and poll the temperature sensors. We need to provide the
> minimum required to keep Linux booting.
>
> Add a dummy thermal sensor returning ~25°C based on:
> https://github.com/raspberrypi/linux/blob/rpi-5.3.y/drivers/thermal/broadcom/bcm2835_thermal.c
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> checkpatch warning:
> WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
> This is OK because the regex are:
>
> F: hw/*/bcm283*
> F: include/hw/*/bcm283*
> +static void bcm2835_thermal_class_init(ObjectClass *klass, void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(klass);
> +
> + dc->realize = bcm2835_thermal_realize;
> +}
This is missing the vmsd and reset function.
thanks
-- PMM
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (19 preceding siblings ...)
2019-09-26 20:32 ` [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability BALATON Zoltan
@ 2019-10-14 15:45 ` Peter Maydell
2019-10-14 16:07 ` Philippe Mathieu-Daudé
2019-10-16 9:57 ` Bonnans, Laurent
21 siblings, 1 reply; 74+ messages in thread
From: Peter Maydell @ 2019-10-14 15:45 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Zoltán Baldaszti, Laurent Bonnans, Esteban Bosse,
Alistair Francis, QEMU Developers, Andrew Baumann,
Marc-André Lureau, qemu-arm, Clement Deschamps, Cleber Rosa,
Paolo Bonzini, Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On Thu, 26 Sep 2019 at 18:34, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Hi,
>
> I previously posted a RFC for the Raspberry Pi 4:
> https://www.mail-archive.com/qemu-devel@nongnu.org/msg642241.html
> and got it almost working (boots Linux kernel to userland, sadly
> I'm still having timeout issues with the eMMC block).
> However since it is quite usable, I started to clean up to post
> the series and realized it is way too big for Peter Maydell, so
> I'm following his rule of thumb by splitting in 3 sets of ~20
> functional patches.
> Philippe Mathieu-Daudé (19):
> hw/arm/raspi: Use the IEC binary prefix definitions
> hw/arm/bcm2835_peripherals: Improve logging
> hw/arm/bcm2835_peripherals: Name various address spaces
> hw/arm/bcm2835: Rename some definitions
> hw/arm/bcm2835: Add various unimplemented peripherals
> hw/char/bcm2835_aux: Add trace events
> hw/misc/bcm2835_mbox: Add trace events
> hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
> hw/arm/bcm2835_peripherals: Use the thermal sensor block
> hw/timer/bcm2835: Add the BCM2835 SYS_timer
> hw/arm/bcm2835_peripherals: Use the SYS_timer
> hw/arm/bcm2835_peripherals: Add Clock/Power/Reset Manager blocks
> hw/arm/raspi: Define various blocks base addresses
> python/qemu/machine: Allow to use other serial consoles than default
> tests/boot_linux_console: Extract the gunzip() helper
> tests/boot_linux_console: Add a test for the Raspberry Pi 2
> tests/boot_linux_console: Test the raspi2 UART1 (16550 based)
> tests/boot_linux_console: Boot Linux and run few commands on raspi3
> tests/boot_linux_console: Test SDHCI and termal sensor on raspi3
From this patchset, I'm going to apply patches 1-5 and 7
to target-arm.next, since they're good cleanups that have
been reviewed. I've given a few review comments on
some of the others but mostly it seems to have been reviewed
by others already (so thanks to those reviewers).
-- PMM
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 06/19] hw/char/bcm2835_aux: Add trace events
2019-10-14 15:36 ` Peter Maydell
@ 2019-10-14 16:03 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-14 16:03 UTC (permalink / raw)
To: Peter Maydell, Philippe Mathieu-Daudé
Cc: Zoltán Baldaszti, Laurent Bonnans, Esteban Bosse,
Alistair Francis, QEMU Developers, Andrew Baumann,
Marc-André Lureau, qemu-arm, Clement Deschamps, Cleber Rosa,
Paolo Bonzini, Cheng Xiang, Pekka Enberg, Guenter Roeck,
Eduardo Habkost
On 10/14/19 5:36 PM, Peter Maydell wrote:
> On Thu, 26 Sep 2019 at 18:34, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>
>> The BCM2835 AUX UART is compatible with the 16650 model, when
>> the registers belong the the 16650 block, use its trace events,
>> else use bcm2835_aux_read/write.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>
>> + if (is_16650(offset)) {
>> + trace_serial_ioport_read((offset & 0x1f) >> 2, res);
>> + } else {
>> + trace_bcm2835_aux_read(offset, res);
>> + }
>
> I'm not really a fan of this. I would expect that if I turn
> on the trace point for reads from the device that I see all
> the reads, not just a subset of them. The device may be
> minimally software-compatible with a 16650, but it isn't actually
> a 16650, and there doesn't seem to be much point in sharing
> the serial_ioport_read() tracepoint.
Yes, I posted a newer series for this device after review comments:
hw/arm/raspi: Split the UART block from the AUX block
https://lists.gnu.org/archive/html/qemu-devel/2019-10/msg01498.html
I forgot to mention here this patch was obsolete, sorry :/
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 08/19] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
2019-10-14 15:37 ` Peter Maydell
@ 2019-10-14 16:05 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-14 16:05 UTC (permalink / raw)
To: Peter Maydell, Philippe Mathieu-Daudé
Cc: Zoltán Baldaszti, Laurent Bonnans, Esteban Bosse,
Alistair Francis, QEMU Developers, Andrew Baumann,
Marc-André Lureau, qemu-arm, Clement Deschamps, Cleber Rosa,
Paolo Bonzini, Cheng Xiang, Pekka Enberg, Guenter Roeck,
Eduardo Habkost
On 10/14/19 5:37 PM, Peter Maydell wrote:
> On Thu, 26 Sep 2019 at 18:34, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>
>> We will soon implement the SYS_timer. This timer is used by Linux
>> in the thermal subsystem, so once available, the subsystem will be
>> enabled and poll the temperature sensors. We need to provide the
>> minimum required to keep Linux booting.
>>
>> Add a dummy thermal sensor returning ~25°C based on:
>> https://github.com/raspberrypi/linux/blob/rpi-5.3.y/drivers/thermal/broadcom/bcm2835_thermal.c
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> checkpatch warning:
>> WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
>> This is OK because the regex are:
>>
>> F: hw/*/bcm283*
>> F: include/hw/*/bcm283*
>
>> +static void bcm2835_thermal_class_init(ObjectClass *klass, void *data)
>> +{
>> + DeviceClass *dc = DEVICE_CLASS(klass);
>> +
>> + dc->realize = bcm2835_thermal_realize;
>> +}
>
> This is missing the vmsd and reset function.
Ah correct, I forgot about the Bcm2835ThermalState::ctl field.
Thanks!
Phil.
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability
2019-10-14 15:45 ` Peter Maydell
@ 2019-10-14 16:07 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 74+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-10-14 16:07 UTC (permalink / raw)
To: Peter Maydell, Philippe Mathieu-Daudé
Cc: Zoltán Baldaszti, Laurent Bonnans, Esteban Bosse,
Alistair Francis, QEMU Developers, Andrew Baumann,
Marc-André Lureau, qemu-arm, Clement Deschamps, Cleber Rosa,
Paolo Bonzini, Cheng Xiang, Pekka Enberg, Guenter Roeck,
Eduardo Habkost
On 10/14/19 5:45 PM, Peter Maydell wrote:
> On Thu, 26 Sep 2019 at 18:34, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>
>> Hi,
>>
>> I previously posted a RFC for the Raspberry Pi 4:
>> https://www.mail-archive.com/qemu-devel@nongnu.org/msg642241.html
>> and got it almost working (boots Linux kernel to userland, sadly
>> I'm still having timeout issues with the eMMC block).
>> However since it is quite usable, I started to clean up to post
>> the series and realized it is way too big for Peter Maydell, so
>> I'm following his rule of thumb by splitting in 3 sets of ~20
>> functional patches.
>
>> Philippe Mathieu-Daudé (19):
>> hw/arm/raspi: Use the IEC binary prefix definitions
>> hw/arm/bcm2835_peripherals: Improve logging
>> hw/arm/bcm2835_peripherals: Name various address spaces
>> hw/arm/bcm2835: Rename some definitions
>> hw/arm/bcm2835: Add various unimplemented peripherals
>> hw/char/bcm2835_aux: Add trace events
>> hw/misc/bcm2835_mbox: Add trace events
>> hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
>> hw/arm/bcm2835_peripherals: Use the thermal sensor block
>> hw/timer/bcm2835: Add the BCM2835 SYS_timer
>> hw/arm/bcm2835_peripherals: Use the SYS_timer
>> hw/arm/bcm2835_peripherals: Add Clock/Power/Reset Manager blocks
>> hw/arm/raspi: Define various blocks base addresses
>> python/qemu/machine: Allow to use other serial consoles than default
>> tests/boot_linux_console: Extract the gunzip() helper
>> tests/boot_linux_console: Add a test for the Raspberry Pi 2
>> tests/boot_linux_console: Test the raspi2 UART1 (16550 based)
>> tests/boot_linux_console: Boot Linux and run few commands on raspi3
>> tests/boot_linux_console: Test SDHCI and termal sensor on raspi3
>
> From this patchset, I'm going to apply patches 1-5 and 7
> to target-arm.next, since they're good cleanups that have
> been reviewed. I've given a few review comments on
> some of the others but mostly it seems to have been reviewed
> by others already (so thanks to those reviewers).
OK, thanks!
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
` (20 preceding siblings ...)
2019-10-14 15:45 ` Peter Maydell
@ 2019-10-16 9:57 ` Bonnans, Laurent
21 siblings, 0 replies; 74+ messages in thread
From: Bonnans, Laurent @ 2019-10-16 9:57 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Esteban Bosse,
Alistair Francis, Andrew Baumann, Marc-André Lureau,
qemu-arm, Clement Deschamps, Cleber Rosa, Paolo Bonzini, Xiang,
Cheng, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
On 9/26/19 7:34 PM, Philippe Mathieu-Daudé wrote:
> Hi,
>
> I previously posted a RFC for the Raspberry Pi 4:
> https://www.mail-archive.com/qemu-devel@nongnu.org/msg642241.html
> and got it almost working (boots Linux kernel to userland, sadly
> I'm still having timeout issues with the eMMC block).
> However since it is quite usable, I started to clean up to post
> the series and realized it is way too big for Peter Maydell, so
> I'm following his rule of thumb by splitting in 3 sets of ~20
> functional patches.
>
> In this first series, we pay old debts with these models. Linux
> evolved and recent kernels were barely usable. U-boot now ticks,
> Linux stops to Oops every so and then. We can use more than one
> console at a time (think pppd?).
>
> Then we add various tests to confirm our effort made sense, and
> to avoid regressions.
>
> Laurent, Cheng, do you mind testing on U-Boot?
Great, thanks a lot Phil!
We've managed to run u-boot with serial output and switch to the kernel
read from the same sd card image we use on real hardware.
It also requires the small hack to make qemu simulate the early boot
sequence from the rpi firmware, following the explanations of Peter:
mkimage -A arm -T kernel -C none -O linux -a 0x800 -e 0x800 -d
u-boot.bin u-boot.img
qemu ... -kernel u-boot.img ...
After that, we are getting kernel panics at the point where our
initramfs' init get executed. We are not yet sure about the exact
reason, but that's still a great improvement.
Laurent
> In the next part we'll improve/update the MBox/Properties and the
> interrupt controller blocks.
>
> Finally the last part adds the raspi4.
>
> Please review.
>
> Regards,
>
> Phil.
>
^ permalink raw reply [flat|nested] 74+ messages in thread
* Re: [PATCH 15/19] tests/boot_linux_console: Extract the gunzip() helper
2019-09-26 17:34 ` [PATCH 15/19] tests/boot_linux_console: Extract the gunzip() helper Philippe Mathieu-Daudé
2019-10-08 15:33 ` Alex Bennée
2019-10-09 15:31 ` Cleber Rosa
@ 2019-10-24 9:23 ` Esteban Bosse
2 siblings, 0 replies; 74+ messages in thread
From: Esteban Bosse @ 2019-10-24 9:23 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Peter Maydell, Zoltán Baldaszti, Laurent Bonnans,
Alistair Francis, Andrew Baumann, Marc-André Lureau,
qemu-arm, Clement Deschamps, Cleber Rosa, Paolo Bonzini,
Cheng Xiang, Philippe Mathieu-Daudé,
Pekka Enberg, Guenter Roeck, Eduardo Habkost
El jue, 26-09-2019 a las 19:34 +0200, Philippe Mathieu-Daudé escribió:
> We are going to use the same pattern. Instead of keeping
> copy/pasting this code, extract as a local function.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> tests/acceptance/boot_linux_console.py | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/tests/acceptance/boot_linux_console.py
> b/tests/acceptance/boot_linux_console.py
> index 8a9a314ab4..079590f0c8 100644
> --- a/tests/acceptance/boot_linux_console.py
> +++ b/tests/acceptance/boot_linux_console.py
> @@ -19,6 +19,11 @@ from avocado.utils import process
> from avocado.utils import archive
>
>
> +def gunzip(in_pathname_gz, out_pathname):
> + with gzip.open(in_pathname_gz, 'rb') as f_in:
> + with open(out_pathname, 'wb') as f_out:
> + shutil.copyfileobj(f_in, f_out)
> +
> class BootLinuxConsole(Test):
> """
> Boots a Linux kernel and checks that the console is operational
> and the
> @@ -166,10 +171,7 @@ class BootLinuxConsole(Test):
> initrd_hash = 'bf806e17009360a866bf537f6de66590de349a99'
> initrd_path_gz = self.fetch_asset(initrd_url,
> asset_hash=initrd_hash)
> initrd_path = self.workdir + "rootfs.cpio"
> -
> - with gzip.open(initrd_path_gz, 'rb') as f_in:
> - with open(initrd_path, 'wb') as f_out:
> - shutil.copyfileobj(f_in, f_out)
> + gunzip(initrd_path_gz, initrd_path)
>
> self.vm.set_machine('malta')
> self.vm.set_console()
Reviewed-by: Esteban Bosse <estebanbosse@gmail.com>
^ permalink raw reply [flat|nested] 74+ messages in thread
end of thread, other threads:[~2019-10-24 10:00 UTC | newest]
Thread overview: 74+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-09-26 17:34 [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability Philippe Mathieu-Daudé
2019-09-26 17:34 ` [PATCH 01/19] hw/arm/raspi: Use the IEC binary prefix definitions Philippe Mathieu-Daudé
2019-09-27 21:36 ` Alistair Francis
2019-10-08 8:57 ` Alex Bennée
2019-10-09 0:26 ` Cleber Rosa
2019-09-26 17:34 ` [PATCH 02/19] hw/arm/bcm2835_peripherals: Improve logging Philippe Mathieu-Daudé
2019-09-27 21:37 ` Alistair Francis
2019-10-08 9:00 ` Alex Bennée
2019-10-09 1:28 ` Cleber Rosa
2019-09-26 17:34 ` [PATCH 03/19] hw/arm/bcm2835_peripherals: Name various address spaces Philippe Mathieu-Daudé
2019-09-27 21:38 ` Alistair Francis
2019-10-08 9:04 ` Alex Bennée
2019-10-09 1:48 ` Cleber Rosa
2019-09-26 17:34 ` [PATCH 04/19] hw/arm/bcm2835: Rename some definitions Philippe Mathieu-Daudé
2019-09-27 21:40 ` Alistair Francis
2019-10-08 10:40 ` Alex Bennée
2019-09-26 17:34 ` [PATCH 05/19] hw/arm/bcm2835: Add various unimplemented peripherals Philippe Mathieu-Daudé
2019-09-27 21:42 ` Alistair Francis
2019-10-08 9:43 ` Philippe Mathieu-Daudé
2019-10-11 21:55 ` Alistair Francis
2019-10-08 11:09 ` Alex Bennée
2019-09-26 17:34 ` [PATCH 06/19] hw/char/bcm2835_aux: Add trace events Philippe Mathieu-Daudé
2019-10-08 11:22 ` Alex Bennée
2019-10-14 15:36 ` Peter Maydell
2019-10-14 16:03 ` Philippe Mathieu-Daudé
2019-09-26 17:34 ` [PATCH 07/19] hw/misc/bcm2835_mbox: " Philippe Mathieu-Daudé
2019-10-08 11:32 ` Alex Bennée
2019-10-08 11:38 ` Philippe Mathieu-Daudé
2019-09-26 17:34 ` [PATCH 08/19] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor Philippe Mathieu-Daudé
2019-10-08 11:36 ` Alex Bennée
2019-10-08 11:42 ` Philippe Mathieu-Daudé
2019-10-14 15:37 ` Peter Maydell
2019-10-14 16:05 ` Philippe Mathieu-Daudé
2019-09-26 17:34 ` [PATCH 09/19] hw/arm/bcm2835_peripherals: Use the thermal sensor block Philippe Mathieu-Daudé
2019-09-27 21:51 ` Alistair Francis
2019-09-26 17:34 ` [PATCH 10/19] hw/timer/bcm2835: Add the BCM2835 SYS_timer Philippe Mathieu-Daudé
2019-10-08 14:52 ` Alex Bennée
2019-10-08 14:53 ` Philippe Mathieu-Daudé
2019-10-09 11:06 ` Philippe Mathieu-Daudé
2019-09-26 17:34 ` [PATCH 11/19] hw/arm/bcm2835_peripherals: Use the SYS_timer Philippe Mathieu-Daudé
2019-10-08 15:22 ` Alex Bennée
2019-10-09 7:39 ` Philippe Mathieu-Daudé
2019-09-26 17:34 ` [PATCH 12/19] hw/arm/bcm2835_peripherals: Add Clock/Power/Reset Manager blocks Philippe Mathieu-Daudé
2019-10-01 9:51 ` Philippe Mathieu-Daudé
2019-10-07 17:23 ` Philippe Mathieu-Daudé
2019-09-26 17:34 ` [PATCH 13/19] hw/arm/raspi: Define various blocks base addresses Philippe Mathieu-Daudé
2019-10-08 15:32 ` Alex Bennée
2019-09-26 17:34 ` [PATCH 14/19] python/qemu/machine: Allow to use other serial consoles than default Philippe Mathieu-Daudé
2019-09-27 12:54 ` bzt
2019-09-27 13:26 ` Guenter Roeck
2019-09-27 13:36 ` Peter Maydell
2019-09-27 14:44 ` Philippe Mathieu-Daudé
2019-10-09 15:28 ` Cleber Rosa
2019-09-26 17:34 ` [PATCH 15/19] tests/boot_linux_console: Extract the gunzip() helper Philippe Mathieu-Daudé
2019-10-08 15:33 ` Alex Bennée
2019-10-09 15:31 ` Cleber Rosa
2019-10-24 9:23 ` Esteban Bosse
2019-09-26 17:34 ` [PATCH 16/19] tests/boot_linux_console: Add a test for the Raspberry Pi 2 Philippe Mathieu-Daudé
2019-10-08 15:34 ` Alex Bennée
2019-10-09 15:43 ` Cleber Rosa
2019-10-09 15:43 ` Cleber Rosa
2019-09-26 17:34 ` [PATCH 17/19] tests/boot_linux_console: Test the raspi2 UART1 (16550 based) Philippe Mathieu-Daudé
2019-10-08 15:35 ` Alex Bennée
2019-10-09 15:54 ` Cleber Rosa
2019-09-26 17:34 ` [PATCH 18/19] tests/boot_linux_console: Boot Linux and run few commands on raspi3 Philippe Mathieu-Daudé
2019-10-09 16:12 ` Cleber Rosa
2019-10-09 16:21 ` Philippe Mathieu-Daudé
2019-09-26 17:34 ` [PATCH 19/19] tests/boot_linux_console: Test SDHCI and termal sensor " Philippe Mathieu-Daudé
2019-10-09 16:23 ` Cleber Rosa
2019-09-26 20:32 ` [PATCH 00/19] hw/arm/raspi: Improve Raspberry Pi 2/3 reliability BALATON Zoltan
2019-09-27 8:50 ` Philippe Mathieu-Daudé
2019-10-14 15:45 ` Peter Maydell
2019-10-14 16:07 ` Philippe Mathieu-Daudé
2019-10-16 9:57 ` Bonnans, Laurent
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