From: Richard Henderson <richard.henderson@linaro.org>
To: "Alex Bennée" <alex.bennee@linaro.org>,
"Benjamin Herrenschmidt" <benh@kernel.crashing.org>
Cc: Liviu Ionescu <ilg@livius.net>,
keithp@keithp.com, qemu-arm@nongnu.org, qemu-devel@nongnu.org,
Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: Semihosting, arm, riscv, ppc and common code
Date: Wed, 15 Jan 2020 11:28:14 -1000 [thread overview]
Message-ID: <81f25a9e-a52c-ca8d-4d4b-ca36fcee73ed@linaro.org> (raw)
In-Reply-To: <87wo9tkjxz.fsf@linaro.org>
On 1/15/20 2:01 AM, Alex Bennée wrote:
> Hmm, I'm not so sure. QEMU tries to emulate real HW although I
> appreciate that is a somewhat loose definition once you get to things
> like -M virt and other such SW like abstractions. Is semihosting even
> going to be a thing on real RiscV/Power silicon?
For risc-v, the odd nop-full semi-hosting call sequence was chosen to work with
jtag debuggers on real silicon.
As for the rest of the abi, the stuff after the debugger/emulator has gotten
control, they did have the opportunity to do better, and did not.
r~
next prev parent reply other threads:[~2020-01-15 21:29 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-14 6:25 Semihosting, arm, riscv, ppc and common code Benjamin Herrenschmidt
2020-01-14 7:32 ` Liviu Ionescu
2020-01-14 7:53 ` Benjamin Herrenschmidt
2020-01-14 9:51 ` Alex Bennée
2020-01-15 1:14 ` Benjamin Herrenschmidt
2020-01-15 12:01 ` Alex Bennée
2020-01-15 12:30 ` Liviu Ionescu
2020-01-15 21:28 ` Richard Henderson [this message]
2020-01-15 22:02 ` Liviu Ionescu
2020-01-16 2:04 ` Benjamin Herrenschmidt
2020-01-16 7:57 ` Liviu Ionescu
2020-01-16 6:33 ` Benjamin Herrenschmidt
2020-01-14 9:59 ` Peter Maydell
2020-01-15 1:17 ` Benjamin Herrenschmidt
2020-01-15 13:32 ` Peter Maydell
2020-01-16 2:01 ` Benjamin Herrenschmidt
2020-01-16 11:05 ` Peter Maydell
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