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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Aurelien Jarno <aurelien@aurel32.net>,
	Yunqiang Su <ysu@wavecomp.com>,
	qemu-devel@nongnu.org
Cc: "Igor Mammedov" <imammedo@redhat.com>,
	"Aleksandar Markovic" <aleksandar.qemu.devel@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>
Subject: Re: [PATCH v2 3/6] hw/mips/malta: Introduce MaltaMachineClass::max_ramsize
Date: Tue, 30 Jun 2020 19:17:57 +0200	[thread overview]
Message-ID: <8720fc1e-c4ab-9841-3422-d7419ddb6a17@amsat.org> (raw)
In-Reply-To: <20200630145236.27529-4-f4bug@amsat.org>

On 6/30/20 4:52 PM, Philippe Mathieu-Daudé wrote:
> The maximum RAM size is tied to the machine. First add the
> MaltaMachineClass, and add 'max_ramsize' to it. Set it to
> the current value of 2 GB, and adapt the code checking for
> the requested RAM is usable by the machine.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/mips/malta.c | 30 +++++++++++++++++++++++++-----
>  1 file changed, 25 insertions(+), 5 deletions(-)
> 
> diff --git a/hw/mips/malta.c b/hw/mips/malta.c
> index 2c363fe099..17a1c0d1c4 100644
> --- a/hw/mips/malta.c
> +++ b/hw/mips/malta.c
> @@ -56,6 +56,7 @@
>  #include "sysemu/kvm.h"
>  #include "hw/semihosting/semihost.h"
>  #include "hw/mips/cps.h"
> +#include "qemu/cutils.h"
>  
>  #define ENVP_ADDR           0x80002000l
>  #define ENVP_NB_ENTRIES     16
> @@ -71,6 +72,17 @@
>  #define MAX_IDE_BUS         2
>  
>  #define TYPE_MALTA_MACHINE       MACHINE_TYPE_NAME("malta-base")
> +#define MALTA_MACHINE_CLASS(klass) \
> +     OBJECT_CLASS_CHECK(MaltaMachineClass, (klass), TYPE_MALTA_MACHINE)
> +#define MALTA_MACHINE_GET_CLASS(obj) \
> +     OBJECT_GET_CLASS(MaltaMachineClass, (obj), TYPE_MALTA_MACHINE)
> +
> +typedef struct MaltaMachineClass {
> +    /* Private */
> +    MachineClass parent_obj;
> +    /* Public */
> +    ram_addr_t max_ramsize;
> +} MaltaMachineClass;
>  
>  typedef struct {
>      MemoryRegion iomem;
> @@ -1232,7 +1244,7 @@ void mips_malta_init(MachineState *machine)
>      DriveInfo *dinfo;
>      int fl_idx = 0;
>      int be;
> -
> +    MaltaMachineClass *mmc = MALTA_MACHINE_GET_CLASS(machine);
>      DeviceState *dev = qdev_new(TYPE_MIPS_MALTA);
>      MaltaState *s = MIPS_MALTA(dev);
>  
> @@ -1248,10 +1260,16 @@ void mips_malta_init(MachineState *machine)
>      /* create CPU */
>      mips_create_cpu(machine, s, &cbus_irq, &i8259_irq);
>  
> -    /* allocate RAM */
> -    if (ram_size > 2 * GiB) {
> -        error_report("Too much memory for this machine: %" PRId64 "MB,"
> -                     " maximum 2048MB", ram_size / MiB);
> +    /*
> +     * The GT-64120A north bridge accepts at most 256 MiB per SCS for
> +     * address decoding, so we have a maximum of 1 GiB. We deliberately
> +     * ignore this physical limitation.
> +     */
> +    if (ram_size > mmc->max_ramsize) {
> +        char *maxsize_str = size_to_str(mmc->max_ramsize);
> +        error_report("Too much memory for this machine: %" PRId64 " MiB,"
> +                     " maximum %s", ram_size / MiB, maxsize_str);
> +        g_free(maxsize_str);
>          exit(1);
>      }
>  
> @@ -1446,6 +1464,7 @@ static void malta_machine_common_class_init(ObjectClass *oc, void *data)
>  static void malta_machine_default_class_init(ObjectClass *oc, void *data)
>  {
>      MachineClass *mc = MACHINE_CLASS(oc);
> +    MaltaMachineClass *mmc = MALTA_MACHINE_CLASS(oc);
>  
>      mc->desc = "MIPS Malta Core LV";
>      mc->block_default_type = IF_IDE;
> @@ -1456,6 +1475,7 @@ static void malta_machine_default_class_init(ObjectClass *oc, void *data)
>  #else
>      mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
>  #endif
> +    mmc->max_ramsize = 2 * GiB;
>  }
>  
>  static const TypeInfo malta_machine_types[] = {
> 

Missing:

-- >8 --
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -1541,6 +1541,7 @@ static const TypeInfo malta_machine_types[] = {
         .name          = TYPE_MALTA_MACHINE,
         .parent        = TYPE_MACHINE,
         .class_init    = malta_machine_common_class_init,
+        .class_size    = sizeof(MaltaMachineClass),
         .abstract      = true,
     }
 };
---


  reply	other threads:[~2020-06-30 17:20 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-30 14:52 [PATCH v2 0/6] hw/mips/malta: Add the 'malta-strict' machine, matching Malta hardware Philippe Mathieu-Daudé
2020-06-30 14:52 ` [PATCH v2 1/6] hw/mips/malta: Trivial code movement Philippe Mathieu-Daudé
2020-06-30 14:52 ` [PATCH v2 2/6] hw/mips/malta: Register the machine as a TypeInfo Philippe Mathieu-Daudé
2020-06-30 14:52 ` [PATCH v2 3/6] hw/mips/malta: Introduce MaltaMachineClass::max_ramsize Philippe Mathieu-Daudé
2020-06-30 17:17   ` Philippe Mathieu-Daudé [this message]
2020-06-30 14:52 ` [PATCH v2 4/6] hw/mips/malta: Introduce the 'malta-strict' machine Philippe Mathieu-Daudé
2020-06-30 14:52 ` [PATCH v2 5/6] hw/mips/malta: Verify malta-strict machine uses correct DIMM sizes Philippe Mathieu-Daudé
2020-06-30 14:52 ` [PATCH v2 6/6] hw/mips/malta: Introduce the 'malta-unleashed' 64-bit machine Philippe Mathieu-Daudé
2020-07-01 10:59   ` Daniel P. Berrangé
2020-06-30 15:38 ` [PATCH v2 0/6] hw/mips/malta: Add the 'malta-strict' machine, matching Malta hardware Aleksandar Markovic
2020-06-30 16:46   ` Philippe Mathieu-Daudé
2020-06-30 16:55     ` Aleksandar Markovic
2020-06-30 17:16       ` Philippe Mathieu-Daudé
2020-06-30 17:28         ` Aleksandar Markovic
2020-06-30 19:51           ` Philippe Mathieu-Daudé
2020-06-30 20:36           ` Richard Henderson
2020-06-30 20:19   ` Thomas Huth
2020-07-01 10:49   ` Daniel P. Berrangé

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