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Thu, 13 May 2021 04:00:30 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id m9sm2503838wrq.78.2021.05.13.04.00.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 May 2021 04:00:29 -0700 (PDT) Received: from zen (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 39BE61FF7E; Thu, 13 May 2021 12:00:29 +0100 (BST) References: <20210508014802.892561-1-richard.henderson@linaro.org> <20210508014802.892561-42-richard.henderson@linaro.org> User-agent: mu4e 1.5.13; emacs 28.0.50 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Richard Henderson Subject: Re: [PATCH 41/72] softfloat: Introduce sh[lr]_double primitives Date: Thu, 13 May 2021 11:59:42 +0100 In-reply-to: <20210508014802.892561-42-richard.henderson@linaro.org> Message-ID: <874kf6ew4y.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Richard Henderson writes: > Have x86_64 assembly for them, with a fallback. > This avoids shuffling values through %cl in the x86 case. > > Signed-off-by: Richard Henderson > --- > include/fpu/softfloat-macros.h | 36 ++++++++++++ > fpu/softfloat.c | 102 +++++++++++++++++++++++++-------- > 2 files changed, 115 insertions(+), 23 deletions(-) > > diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macro= s.h > index 672c1db555..ec4e27a595 100644 > --- a/include/fpu/softfloat-macros.h > +++ b/include/fpu/softfloat-macros.h > @@ -85,6 +85,42 @@ this code that are retained. > #include "fpu/softfloat-types.h" > #include "qemu/host-utils.h" >=20=20 > +/** > + * shl_double: double-word merging left shift > + * @l: left or most-significant word > + * @r: right or least-significant word > + * @c: shift count > + * > + * Shift @l left by @c bits, shifting in bits from @r. > + */ > +static inline uint64_t shl_double(uint64_t l, uint64_t r, int c) > +{ > +#if defined(__x86_64__) > + asm("shld %b2, %1, %0" : "+r"(l) : "r"(r), "ci"(c)); > + return l; > +#else > + return c ? (l << c) | (r >> (64 - c)) : l; > +#endif > +} > + > +/** > + * shr_double: double-word merging right shift > + * @l: left or most-significant word > + * @r: right or least-significant word > + * @c: shift count > + * > + * Shift @r right by @c bits, shifting in bits from @l. > + */ > +static inline uint64_t shr_double(uint64_t l, uint64_t r, int c) > +{ > +#if defined(__x86_64__) > + asm("shrd %b2, %1, %0" : "+r"(r) : "r"(l), "ci"(c)); > + return r; > +#else > + return c ? (r >> c) | (l << (64 - c)) : r; > +#endif > +} > + I was pondering if these deserve to live in bitops but given they are softfloat only for the time being and we don't do arch specific hacks in there: Reviewed-by: Alex Benn=C3=A9e --=20 Alex Benn=C3=A9e