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Wed, 20 Oct 2021 10:55:54 -0700 (PDT) Received: from zen (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 480451FF96; Wed, 20 Oct 2021 18:55:53 +0100 (BST) References: <87fsu3tppe.fsf@linaro.org> User-agent: mu4e 1.7.0; emacs 28.0.60 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Aaron Lindsay Subject: Re: plugins: Missing Store Exclusive Memory Accesses Date: Wed, 20 Oct 2021 18:54:20 +0100 In-reply-to: Message-ID: <87cznzvavq.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cota@braap.org, richard.henderson@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Aaron Lindsay writes: > On Sep 22 16:22, Aaron Lindsay wrote: >> On Sep 21 16:28, Aaron Lindsay wrote: >> > On Sep 17 12:05, Alex Benn=C3=A9e wrote: >> > > Aaron Lindsay writes: >> > > > I recently noticed that the plugin interface does not appear to be >> > > > emitting callbacks to functions registered via >> > > > `qemu_plugin_register_vcpu_mem_cb` for AArch64 store exclusives. T= his >> > > > would include instructions like `stxp w16, x2, x3, [x4]` (encodin= g: >> > > > 0xc8300c82). Seeing as how I'm only running with a single CPU, I d= on't >> > > > see how this could be due to losing exclusivity after the preceding >> > > > `ldxp`. >> > >=20 >> > > The exclusive handling is a bit special due to the need to emulate i= t's >> > > behaviour using cmpxchg primitives. >> > >=20 >> > > > >> > > > In looking at QEMU's source, I *think* this is because the >> > > > `gen_store_exclusive` function in translate-a64.c is not making th= e same >> > > > calls to `plugin_gen_mem_callbacks` & company that are being made = by >> > > > "normal" stores handled by functions like `tcg_gen_qemu_st_i64` (at >> > > > least in my case; I do see some code paths under `gen_store_exclus= ive` >> > > > call down into `tcg_gen_qemu_st_i64` eventually, but it appears no= t all >> > > > of them do?). >> > >=20 >> > > The key TCG operation is the cmpxchg which does the effective store.= For >> > > -smp 1 we should use normal ld and st tcg ops. For > 1 it eventually >> > > falls to tcg_gen_atomic_cmpxchg_XX which is a helper. That eventually >> > > ends up at: >> > >=20 >> > > atomic_trace_rmw_post >> > >=20 >> > > which should be where things are hooked. >> >=20 >> > When I open this up in gdb, I see that I'm getting the following call >> > graph for the `stxp` instruction in question (for -smp 1): >> >=20 >> > gen_store_exclusive -> gen_helper_paired_cmpxchg64_le >> >=20 >> > In other words, I'm taking the `s->be_data =3D=3D MO_LE` else/if claus= e. >> >=20 >> > I do not see where the helper behind that (defined in helper-a64.c as >> > `uint64_t HELPER(paired_cmpxchg64_le)...`) is calling in to generate >> > plugin callbacks in this case. Am I missing something? >>=20 >> Richard, Alex, >>=20 >> The more I look at this, the more it feels like the following >> AArch64-specific helpers may have been overlooked when adding >> tracing/plugin hooks: >> gen_helper_paired_cmpxchg64_le >> gen_helper_paired_cmpxchg64_be >>=20 >> But... I'm still not sure I fully understand how everything I'm digging >> into interacts; I am happy to keep investigating and work towards a fix, >> but think I need a nudge in the right direction. > > Ping? > > I'm happy to spend some more time digging into this issue, and would > love to be pointed in the right direction if someone is able! These all end up in: ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr, ABI_TYPE cmpv, ABI_TYPE newv, MemOpIdx oi, uintptr_t retaddr) Have you got a test case you are using so I can try and replicate the failure you are seeing? So far by inspection everything looks OK to me. > > Thanks! > > -Aaron --=20 Alex Benn=C3=A9e