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Thu, 28 Jan 2021 07:40:29 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id b18sm7311847wrm.57.2021.01.28.07.40.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 07:40:28 -0800 (PST) Received: from zen (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 6CC9A1FF7E; Thu, 28 Jan 2021 15:40:27 +0000 (GMT) References: <20210128082331.196801-1-richard.henderson@linaro.org> User-agent: mu4e 1.5.7; emacs 28.0.50 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Richard Henderson Subject: Re: [PATCH 00/23] TCI fixes and cleanups Date: Thu, 28 Jan 2021 15:38:50 +0000 In-reply-to: <20210128082331.196801-1-richard.henderson@linaro.org> Message-ID: <87eei5ul1w.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Richard Henderson writes: > The first patch I believe is queued by Paolo, but is not yet > upstream; copied here for convenience. Then, fill in all of > the TODO blanks in TCI. > > The tci_write_reg* functions are redundant with tcg_write_reg. > Just pass in the properly truncated result to begin. In the > cases of the loads, we've automatically done that with the > type of the indirection. For all of the other arithmetic, > we don't actually have to do anything -- the value is either > right, or the high bits are undefined. And in fact will > currently be ignored by the extension on read. FWIW aside from the regression with 2/23 I've been testing this in TCI mode all day on hackbox. So far ffmpeg has encoded a whole 153 frames of video which is the furthest it has ever got in one of my tests ;-) So for the TCI part itself: Tested-by: Alex Benn=C3=A9e > > > r~ > > > Richard Henderson (21): > configure: Fix --enable-tcg-interpreter > tcg: Manage splitwx in tc_ptr_to_region_tree by hand > exec: Make tci_tb_ptr thread-local > tcg/tci: Inline tci_write_reg32s into the only caller > tcg/tci: Inline tci_write_reg8 into its callers > tcg/tci: Inline tci_write_reg16 into the only caller > tcg/tci: Inline tci_write_reg32 into all callers > tcg/tci: Inline tci_write_reg64 into 64-bit callers > tcg/tci: Merge INDEX_op_ld8u_{i32,i64} > tcg/tci: Merge INDEX_op_ld8s_{i32,i64} > tcg/tci: Merge INDEX_op_ld16u_{i32,i64} > tcg/tci: Merge INDEX_op_ld16s_{i32,i64} > tcg/tci: Merge INDEX_op_{ld_i32,ld32u_i64} > tcg/tci: Merge INDEX_op_st8_{i32,i64} > tcg/tci: Merge INDEX_op_st16_{i32,i64} > tcg/tci: Move stack bounds check to compile-time > tcg/tci: Merge INDEX_op_{st_i32,st32_i64} > tcg/tci: Use g_assert_not_reached > tcg/tci: Remove dead code for TCG_TARGET_HAS_div2_* > tcg/tci: Implement 64-bit division > tcg/tci: Remove TODO as unused > > Stefan Weil (2): > tcg/tci: Implement INDEX_op_ld16s_i32 > tcg/tci: Implement INDEX_op_ld8s_i64 > > configure | 5 +- > include/exec/exec-all.h | 2 +- > tcg/tci/tcg-target.h | 4 +- > tcg/tcg-common.c | 2 +- > tcg/tcg.c | 23 +++- > tcg/tci.c | 283 +++++++++++++++------------------------ > tcg/tci/tcg-target.c.inc | 41 +++--- > 7 files changed, 154 insertions(+), 206 deletions(-) --=20 Alex Benn=C3=A9e