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Tsirkin" , qemu-devel@nongnu.org Subject: Re: [PATCH v3 2/9] virtio-gpu: hostmem Date: Mon, 30 Jan 2023 16:22:18 +0000 In-reply-to: <20220926142422.22325-3-antonio.caggiano@collabora.com> Message-ID: <87ilgo6l9v.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Antonio Caggiano writes: > From: Gerd Hoffmann > > Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu. > > Signed-off-by: Antonio Caggiano > Acked-by: Michael S. Tsirkin > --- > v3: Formatting fixes > > hw/display/virtio-gpu-pci.c | 15 +++++++++++++++ > hw/display/virtio-gpu.c | 1 + > hw/display/virtio-vga.c | 33 ++++++++++++++++++++++++--------- > include/hw/virtio/virtio-gpu.h | 5 +++++ > 4 files changed, 45 insertions(+), 9 deletions(-) > > diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c > index 93f214ff58..2cbbacd7fe 100644 > --- a/hw/display/virtio-gpu-pci.c > +++ b/hw/display/virtio-gpu-pci.c > @@ -33,6 +33,21 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy= *vpci_dev, Error **errp) > DeviceState *vdev =3D DEVICE(g); > int i; >=20=20 > + if (virtio_gpu_hostmem_enabled(g->conf)) { > + vpci_dev->msix_bar_idx =3D 1; > + vpci_dev->modern_mem_bar_idx =3D 2; > + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", > + g->conf.hostmem); > + pci_register_bar(&vpci_dev->pci_dev, 4, > + PCI_BASE_ADDRESS_SPACE_MEMORY | > + PCI_BASE_ADDRESS_MEM_PREFETCH | > + PCI_BASE_ADDRESS_MEM_TYPE_64, > + &g->hostmem); > + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, > + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); > + } > + > + qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus), errp); > virtio_pci_force_virtio_1(vpci_dev); > if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) { > return; > diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c > index 20cc703dcc..506b3b8eef 100644 > --- a/hw/display/virtio-gpu.c > +++ b/hw/display/virtio-gpu.c > @@ -1424,6 +1424,7 @@ static Property virtio_gpu_properties[] =3D { > 256 * MiB), > DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags, > VIRTIO_GPU_FLAG_BLOB_ENABLED, false), > + DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, > 0), I note we don't have a definition for -device virtio-gpu or virtio-gpu-pci in the invocation section of the manual (missing from qemu-options.hx). Given the growing complexity of the device perhaps we need those options and perhaps a new section under: https://qemu.readthedocs.io/en/latest/system/device-emulation.html#emulat= ed-devices to outline how virtio-gpu works and what these control knobs are for and why they would be used. > DEFINE_PROP_END_OF_LIST(), > }; >=20=20 > diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c > index 4dcb34c4a7..aa8d1ab993 100644 > --- a/hw/display/virtio-vga.c > +++ b/hw/display/virtio-vga.c > @@ -115,17 +115,32 @@ static void virtio_vga_base_realize(VirtIOPCIProxy = *vpci_dev, Error **errp) > pci_register_bar(&vpci_dev->pci_dev, 0, > PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); >=20=20 > - /* > - * Configure virtio bar and regions > - * > - * We use bar #2 for the mmio regions, to be compatible with stdvga. > - * virtio regions are moved to the end of bar #2, to make room for > - * the stdvga mmio registers at the start of bar #2. > - */ > - vpci_dev->modern_mem_bar_idx =3D 2; > - vpci_dev->msix_bar_idx =3D 4; > vpci_dev->modern_io_bar_idx =3D 5; >=20=20 > + if (!virtio_gpu_hostmem_enabled(g->conf)) { > + /* > + * Configure virtio bar and regions > + * > + * We use bar #2 for the mmio regions, to be compatible with std= vga. > + * virtio regions are moved to the end of bar #2, to make room f= or > + * the stdvga mmio registers at the start of bar #2. > + */ > + vpci_dev->modern_mem_bar_idx =3D 2; > + vpci_dev->msix_bar_idx =3D 4; > + } else { > + vpci_dev->msix_bar_idx =3D 1; > + vpci_dev->modern_mem_bar_idx =3D 2; modern_mem_bar_idx is the same for both legs so why move its setting and comment out of the common path? There is no comment for why msix_bar_idx moves between the two legs. > + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", > + g->conf.hostmem); > + pci_register_bar(&vpci_dev->pci_dev, 4, > + PCI_BASE_ADDRESS_SPACE_MEMORY | > + PCI_BASE_ADDRESS_MEM_PREFETCH | > + PCI_BASE_ADDRESS_MEM_TYPE_64, > + &g->hostmem); > + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, > + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); > + } > + > if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) { > /* > * with page-per-vq=3Doff there is no padding space we can use > diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gp= u.h > index 2e28507efe..eafce75b04 100644 > --- a/include/hw/virtio/virtio-gpu.h > +++ b/include/hw/virtio/virtio-gpu.h > @@ -102,12 +102,15 @@ enum virtio_gpu_base_conf_flags { > (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED)) > #define virtio_gpu_blob_enabled(_cfg) \ > (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) > +#define virtio_gpu_hostmem_enabled(_cfg) \ > + (_cfg.hostmem > 0) >=20=20 > struct virtio_gpu_base_conf { > uint32_t max_outputs; > uint32_t flags; > uint32_t xres; > uint32_t yres; > + uint64_t hostmem; > }; >=20=20 > struct virtio_gpu_ctrl_command { > @@ -131,6 +134,8 @@ struct VirtIOGPUBase { > int renderer_blocked; > int enable; >=20=20 > + MemoryRegion hostmem; > + > struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; >=20=20 > int enabled_output_bitmask; --=20 Alex Benn=C3=A9e Virtualisation Tech Lead @ Linaro