* [1/1] tcg/mips: Fix SoftTLB comparison on mips backend
@ 2021-04-01 10:04 Kele Huang
2021-04-01 11:40 ` Alex Bennée
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Kele Huang @ 2021-04-01 10:04 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, richard.henderson, Kele Huang, f4bug, alistair.francis, j
The addrl used to compare with SoftTLB entry should be sign-extended
in common case, and it will cause constant failing in SoftTLB
comparisons for the addrl whose address is over 0x80000000 on the
emulation of 32-bit guest on 64-bit host.
This is an important performance bug fix. Spec2000 gzip rate increase
from ~45 to ~140 on Loongson 3A4000 (MIPS compatible platform).
Signed-off-by: Kele Huang <kele.hwang@gmail.com>
---
tcg/mips/tcg-target.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
index 8738a3a581..8b16726242 100644
--- a/tcg/mips/tcg-target.c.inc
+++ b/tcg/mips/tcg-target.c.inc
@@ -1201,13 +1201,13 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg base, TCGReg addrl,
load the tlb addend for the fast path. */
tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP2, TCG_TMP3, add_off);
}
- tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrl);
/* Zero extend a 32-bit guest address for a 64-bit host. */
if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
tcg_out_ext32u(s, base, addrl);
addrl = base;
}
+ tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrl);
label_ptr[0] = s->code_ptr;
tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0);
--
2.30.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [1/1] tcg/mips: Fix SoftTLB comparison on mips backend
2021-04-01 10:04 [1/1] tcg/mips: Fix SoftTLB comparison on mips backend Kele Huang
@ 2021-04-01 11:40 ` Alex Bennée
2021-04-01 19:05 ` Philippe Mathieu-Daudé
2021-04-02 5:31 ` Richard Henderson
2 siblings, 0 replies; 5+ messages in thread
From: Alex Bennée @ 2021-04-01 11:40 UTC (permalink / raw)
To: Kele Huang
Cc: peter.maydell, richard.henderson, qemu-devel, f4bug, alistair.francis, j
Kele Huang <kele.hwang@gmail.com> writes:
> The addrl used to compare with SoftTLB entry should be sign-extended
> in common case, and it will cause constant failing in SoftTLB
> comparisons for the addrl whose address is over 0x80000000 on the
> emulation of 32-bit guest on 64-bit host.
>
> This is an important performance bug fix. Spec2000 gzip rate increase
> from ~45 to ~140 on Loongson 3A4000 (MIPS compatible platform).
>
> Signed-off-by: Kele Huang <kele.hwang@gmail.com>
> ---
> tcg/mips/tcg-target.c.inc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
> index 8738a3a581..8b16726242 100644
> --- a/tcg/mips/tcg-target.c.inc
> +++ b/tcg/mips/tcg-target.c.inc
> @@ -1201,13 +1201,13 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg base, TCGReg addrl,
> load the tlb addend for the fast path. */
> tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP2, TCG_TMP3, add_off);
> }
> - tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrl);
>
> /* Zero extend a 32-bit guest address for a 64-bit host. */
> if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
> tcg_out_ext32u(s, base, addrl);
> addrl = base;
> }
> + tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrl);
>
> label_ptr[0] = s->code_ptr;
> tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0);
Looks reasonable to me:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [1/1] tcg/mips: Fix SoftTLB comparison on mips backend
2021-04-01 10:04 [1/1] tcg/mips: Fix SoftTLB comparison on mips backend Kele Huang
2021-04-01 11:40 ` Alex Bennée
@ 2021-04-01 19:05 ` Philippe Mathieu-Daudé
2021-04-02 5:31 ` Richard Henderson
2 siblings, 0 replies; 5+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-04-01 19:05 UTC (permalink / raw)
To: Kele Huang, qemu-devel, Jin Guojie, Yunqiang Su
Cc: peter.maydell, alistair.francis, richard.henderson, j
On 4/1/21 12:04 PM, Kele Huang wrote:
> The addrl used to compare with SoftTLB entry should be sign-extended
> in common case, and it will cause constant failing in SoftTLB
> comparisons for the addrl whose address is over 0x80000000 on the
> emulation of 32-bit guest on 64-bit host.
Apparently missed in commit f0d703314ec
("tcg-mips: Adjust qemu_ld/st for mips64").
>
> This is an important performance bug fix. Spec2000 gzip rate increase
> from ~45 to ~140 on Loongson 3A4000 (MIPS compatible platform).
>
> Signed-off-by: Kele Huang <kele.hwang@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> tcg/mips/tcg-target.c.inc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
> index 8738a3a581..8b16726242 100644
> --- a/tcg/mips/tcg-target.c.inc
> +++ b/tcg/mips/tcg-target.c.inc
> @@ -1201,13 +1201,13 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg base, TCGReg addrl,
> load the tlb addend for the fast path. */
> tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP2, TCG_TMP3, add_off);
> }
> - tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrl);
>
> /* Zero extend a 32-bit guest address for a 64-bit host. */
> if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
> tcg_out_ext32u(s, base, addrl);
> addrl = base;
> }
> + tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrl);
>
> label_ptr[0] = s->code_ptr;
> tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0);
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [1/1] tcg/mips: Fix SoftTLB comparison on mips backend
2021-04-01 10:04 [1/1] tcg/mips: Fix SoftTLB comparison on mips backend Kele Huang
2021-04-01 11:40 ` Alex Bennée
2021-04-01 19:05 ` Philippe Mathieu-Daudé
@ 2021-04-02 5:31 ` Richard Henderson
2 siblings, 0 replies; 5+ messages in thread
From: Richard Henderson @ 2021-04-02 5:31 UTC (permalink / raw)
To: Kele Huang, qemu-devel; +Cc: peter.maydell, alistair.francis, j, f4bug
On 4/1/21 3:04 AM, Kele Huang wrote:
> The addrl used to compare with SoftTLB entry should be sign-extended
> in common case, and it will cause constant failing in SoftTLB
> comparisons for the addrl whose address is over 0x80000000 on the
> emulation of 32-bit guest on 64-bit host.
>
> This is an important performance bug fix. Spec2000 gzip rate increase
> from ~45 to ~140 on Loongson 3A4000 (MIPS compatible platform).
>
> Signed-off-by: Kele Huang<kele.hwang@gmail.com>
> ---
> tcg/mips/tcg-target.c.inc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Queued, thanks.
r~
^ permalink raw reply [flat|nested] 5+ messages in thread
* [1/1] tcg/mips: Fix SoftTLB comparison on mips backend
@ 2021-04-02 2:21 Kele Huang
0 siblings, 0 replies; 5+ messages in thread
From: Kele Huang @ 2021-04-02 2:21 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, richard.henderson, f4bug, Fuxin Zhang, Kele Huang,
alistair.francis, j, alex.bennee
The addrl used to compare with SoftTLB entry should be sign-extended
in common case, and it will cause constant failing in SoftTLB
comparisons for the addrl whose address is over 0x80000000 on the
emulation of 32-bit guest on 64-bit host.
This is an important performance bug fix. Spec2000 gzip rate increase
from ~45 to ~140 on Loongson 3A4000 (MIPS compatible platform).
Signed-off-by: Kele Huang <kele.hwang@gmail.com>
Signed-off-by: Fuxin Zhang <fxzhang@ict.ac.cn>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
tcg/mips/tcg-target.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
index 8738a3a581..8b16726242 100644
--- a/tcg/mips/tcg-target.c.inc
+++ b/tcg/mips/tcg-target.c.inc
@@ -1201,13 +1201,13 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg base, TCGReg addrl,
load the tlb addend for the fast path. */
tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP2, TCG_TMP3, add_off);
}
- tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrl);
/* Zero extend a 32-bit guest address for a 64-bit host. */
if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
tcg_out_ext32u(s, base, addrl);
addrl = base;
}
+ tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrl);
label_ptr[0] = s->code_ptr;
tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0);
--
2.30.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
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2021-04-01 11:40 ` Alex Bennée
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2021-04-02 5:31 ` Richard Henderson
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