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X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Richard Henderson writes: > On 12/4/19 10:58 AM, Alex Benn=C3=A9e wrote: >>> @@ -7437,13 +7437,10 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *= cpu, >>> mask =3D PL0_RW; >>> break; >>> case 4: >>> + case 5: >>> /* min_EL EL2 */ >>> mask =3D PL2_RW; >>> break; >>> - case 5: >>> - /* unallocated encoding, so not possible */ >>> - assert(false); >>> - break; >>=20 >> This change is fine - I don't think we should have asserted here anyway. >> But don't we generate an unallocated exception if the CPU is v8.0? > > This change is only for validation of the system registers themselves. I= t has > nothing to do with the usage of system registers from the actual guest. So what is the mechanism that feeds back to the translator? access_check_cp_reg only seems to care about XSCALE. I guess cp_access_ok would trip if you weren't at EL2 but what if you are a v8.0 at EL2? --=20 Alex Benn=C3=A9e