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[83.57.168.62]) by smtp.gmail.com with ESMTPSA id g13sm3690594wmk.37.2021.11.23.23.33.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 23 Nov 2021 23:33:41 -0800 (PST) Message-ID: <88c5fc89-49a3-0dd3-87bb-287ba590f915@amsat.org> Date: Wed, 24 Nov 2021 08:33:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.0 Subject: Re: [PATCH v5 07/18] target/riscv: setup everything so that riscv128-softmmu compiles Content-Language: en-US To: =?UTF-8?B?RnLDqWTDqXJpYyBQw6l0cm90?= , Alistair Francis , Richard Henderson References: <20211112145902.205131-1-frederic.petrot@univ-grenoble-alpes.fr> <20211112145902.205131-8-frederic.petrot@univ-grenoble-alpes.fr> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::331 (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x331.google.com X-Spam_score_int: -47 X-Spam_score: -4.8 X-Spam_bar: ---- X-Spam_report: (-4.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, NICE_REPLY_A=-4.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V" , Bin Meng , "qemu-devel@nongnu.org Developers" , Alistair Francis , Fabien Portas , Palmer Dabbelt Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi Frédéric, On 11/24/21 07:55, Frédéric Pétrot wrote: > On 24/11/2021 07:12, Alistair Francis wrote: >> On Sat, Nov 13, 2021 at 1:16 AM Frédéric Pétrot >> wrote: >>> >>> This patch is kind of a mess because several files have to be slightly >>> modified to allow for a new target. In the current status, we have done >>> our best to have RV64 and RV128 under the same RV64 umbrella, but there >>> is still work to do to have a single executable for both. >>> In particular, we have no atomic accesses for aligned 128-bit addresses. >>> >>> Once this patch applied, adding risc128-sofmmu to --target-list produces >>> a (no so useful yet) executable. >> >> I can't remember if we discussed this before, but do we need the >> riscv128-sofmmu executable? Can we instead just use a riscv64-sofmmu >> executable? > >   Hello Alistair, >   Richard was also advocating for a single executable, but pointed out that >   we need to disable mttcg because there is a need for specific tcg > support for >   128-bit aligned atomics. >   Given my understanding of that part of QEMU, I choose the easy way to > disable >   it once and for all at compile time until we have that. In rv128_base_cpu_init(): if (qemu_tcg_mttcg_enabled) { /* Missing 128-bit aligned atomics */ error_report("128-bit RISC-V currently does not work" " with Multi Threaded TCG. Please use:" " -accel tcg,thread=single"); exit(EXIT_FAILURE); } Regards, Phil.