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[66.91.136.155]) by smtp.gmail.com with ESMTPSA id p5sm21570504pgs.28.2020.01.15.13.46.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 15 Jan 2020 13:46:51 -0800 (PST) Subject: Re: [PATCH v3 1/3] target/riscv: Fix tb->flags FS status To: Alistair Francis , shihpo.hung@sifive.com References: <1579069053-22190-1-git-send-email-shihpo.hung@sifive.com> From: Richard Henderson Message-ID: <8d63e90b-0779-6432-3a35-1b759f5ae279@linaro.org> Date: Wed, 15 Jan 2020 11:46:47 -1000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.2 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1044 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V" , Sagar Karandikar , Bastian Koppelmann , "qemu-devel@nongnu.org Developers" , Alistair Francis , Palmer Dabbelt Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 1/14/20 8:28 PM, Alistair Francis wrote: > On Wed, Jan 15, 2020 at 4:18 PM wrote: >> >> It was found that running libquantum on riscv-linux qemu produced an >> incorrect result. After investigation, FP registers are not saved >> during context switch due to incorrect mstatus.FS. >> >> In current implementation tb->flags merges all non-disabled state to >> dirty. This means the code in mark_fs_dirty in translate.c that >> handles initial and clean states is unreachable. >> >> This patch fixes it and is successfully tested with: >> libquantum >> >> Thanks to Richard for pointing out the actual bug. >> >> v3: remove the redundant condition >> v2: root cause FS problem >> >> Suggested-by: Richard Henderson >> Signed-off-by: ShihPo Hung >> Reviewed-by: Richard Henderson >> --- >> target/riscv/cpu.h | 5 +---- >> 1 file changed, 1 insertion(+), 4 deletions(-) >> >> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h >> index e59343e..de0a8d8 100644 >> --- a/target/riscv/cpu.h >> +++ b/target/riscv/cpu.h >> @@ -293,10 +293,7 @@ static inline void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, >> #ifdef CONFIG_USER_ONLY >> *flags = TB_FLAGS_MSTATUS_FS; >> #else >> - *flags = cpu_mmu_index(env, 0); >> - if (riscv_cpu_fp_enabled(env)) { >> - *flags |= TB_FLAGS_MSTATUS_FS; >> - } >> + *flags = cpu_mmu_index(env, 0) | (env->mstatus & MSTATUS_FS); > > I don't think this is right, you should use the riscv_cpu_fp_enabled() function. > > Right now it's the same as env->mstatus & MSTATUS_FS but when the > Hypervisor extension goes in riscv_cpu_fp_enabled() will be more > complex. Hmm. Are you sure something like flags |= riscv_cpu_effective_mstatus(env) & MSTATUS_FS; wouldn't be more appropriate for the hypervisor extension? I guess I should have another browse through your hv patchset, but I worry now about bare uses of env->mstatus, if they no longer mean what they appear to mean. r~