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[172.254.253.57]) by smtp.gmail.com with ESMTPSA id bs34sm12031156qkb.97.2021.11.02.03.20.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 02 Nov 2021 03:20:16 -0700 (PDT) Subject: Re: [PATCH 03/13] target/riscv: Ignore the pc bits above XLEN To: LIU Zhiwei , qemu-devel@nongnu.org, qemu-riscv@nongnu.org References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> <20211101100143.44356-4-zhiwei_liu@c-sky.com> From: Richard Henderson Message-ID: <8ff63ab8-0576-c1e3-aa33-de52b48cac3f@linaro.org> Date: Tue, 2 Nov 2021 06:20:14 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20211101100143.44356-4-zhiwei_liu@c-sky.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::f32; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf32.google.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.14, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, bin.meng@windriver.com, Alistair.Francis@wdc.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 11/1/21 6:01 AM, LIU Zhiwei wrote: > The read from PC for translation is in cpu_get_tb_cpu_state, before translation. > > Signed-off-by: LIU Zhiwei > --- > target/riscv/cpu_helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c > index 7d0aee6769..eb425d74d2 100644 > --- a/target/riscv/cpu_helper.c > +++ b/target/riscv/cpu_helper.c > @@ -71,7 +71,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, > { > uint32_t flags = 0; > > - *pc = env->pc; > + *pc = cpu_get_xl(env) == MXL_RV32 ? env->pc & UINT32_MAX : env->pc; > *cs_base = 0; Oh, let's not compute cpu_get_xl twice -- currently we do it at the end of the function when we store into flags. Move that as necessary. r~