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[174.21.138.234]) by smtp.gmail.com with ESMTPSA id 8sm4945875pfv.65.2020.03.27.15.27.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Mar 2020 15:27:47 -0700 (PDT) Subject: Re: [PATCH v1 5/7] fpu/softfloat: avoid undefined behaviour when normalising empty sigs To: Peter Maydell , =?UTF-8?Q?Alex_Benn=c3=a9e?= References: <20200327094945.23768-1-alex.bennee@linaro.org> <20200327094945.23768-6-alex.bennee@linaro.org> From: Richard Henderson Message-ID: <91caa195-fe72-d533-1da2-4bbdeccb4e38@linaro.org> Date: Fri, 27 Mar 2020 15:27:45 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: QEMU Developers , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 3/27/20 3:09 AM, Peter Maydell wrote: > On Fri, 27 Mar 2020 at 09:49, Alex Bennée wrote: >> >> The undefined behaviour checker pointed out that a shift of 64 would >> lead to undefined behaviour. >> >> Signed-off-by: Alex Bennée >> --- >> fpu/softfloat.c | 11 ++++++++--- >> 1 file changed, 8 insertions(+), 3 deletions(-) >> >> diff --git a/fpu/softfloat.c b/fpu/softfloat.c >> index 301ce3b537b..444d35920dd 100644 >> --- a/fpu/softfloat.c >> +++ b/fpu/softfloat.c >> @@ -3834,9 +3834,14 @@ void normalizeFloatx80Subnormal(uint64_t aSig, int32_t *zExpPtr, >> { >> int8_t shiftCount; >> >> - shiftCount = clz64(aSig); >> - *zSigPtr = aSig<> - *zExpPtr = 1 - shiftCount; >> + if (aSig) { >> + shiftCount = clz64(aSig); >> + *zSigPtr = aSig << shiftCount; >> + *zExpPtr = 1 - shiftCount; >> + } else { >> + *zSigPtr = 0; >> + *zExpPtr = 1 - 64; >> + } >> } > > Ah yes, I saw this one in Coverity: CID 1421991. > > RTH marked the Coverity issue as a false positive with the rationale > "We assume an out-of-range shift count is merely IMPLEMENTATION DEFINED > and not UNDEFINED (in the Arm ARM sense), and so cannot turn a 0 value > into a non-zero value." > but I think I disagree with that. We can assume that for the TCG IR > where we get to define shift semantics because we're doing the codegen, > but we can't assume it in C code, because it's not included in the set > of extended guarantees provided by -fwrapv as far as I know. Perhaps. Of course we also know from our broad knowledge of architectures, that a compiler would really have to go out of its way for this to happen. I really hate C in this way, sometimes. I wonder if I have the energy to petition the committee to drop, for C202? all of the "undefined" nonsense that only applies to sign-magnitute and ones-compliment computers, which haven't been seen since the 70's... > That said, is it valid for this function to be called with a zero > aSig value ? I think all these normalizeFloat*Subnormal() functions > assume non-zero sig input, and the only callsite where it's not clearly > obvious that this is obvious that the sig input is non-zero is the call to > normalizeFloatx80Subnormal() from addFloatx80Sigs(). So perhaps we > just need to check and fix that callsite ?? You're right -- addFloatx80Sigs is the only use out of 26 that doesn't have a preceding check for 0. r~