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From: Richard Henderson <richard.henderson@linaro.org>
To: Alistair Francis <alistair.francis@wdc.com>,
	qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: alistair23@gmail.com, bmeng.cn@gmail.com, palmer@dabbelt.com
Subject: Re: [PATCH v2 1/5] target/riscv: Convert the RISC-V exceptions to an enum
Date: Fri, 2 Apr 2021 10:11:37 -0700	[thread overview]
Message-ID: <94b40cdc-4869-730e-50c2-0d33f93be077@linaro.org> (raw)
In-Reply-To: <f191dcf08bf413a822e743a7c7f824d68879a527.1617290165.git.alistair.francis@wdc.com>

On 4/1/21 8:17 AM, Alistair Francis wrote:
> Signed-off-by: Alistair Francis<alistair.francis@wdc.com>
> Reviewed-by: Bin Meng<bmeng.cn@gmail.com>
> ---
>   target/riscv/cpu_bits.h   | 44 ++++++++++++++++++++-------------------
>   target/riscv/cpu.c        |  2 +-
>   target/riscv/cpu_helper.c |  4 ++--
>   3 files changed, 26 insertions(+), 24 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


  reply	other threads:[~2021-04-02 17:13 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-01 15:17 [PATCH v2 0/5] RISC-V: Convert the CSR access functions to use Alistair Francis
2021-04-01 15:17 ` [PATCH v2 1/5] target/riscv: Convert the RISC-V exceptions to an enum Alistair Francis
2021-04-02 17:11   ` Richard Henderson [this message]
2021-04-01 15:17 ` [PATCH v2 2/5] target/riscv: Use the RISCVException enum for CSR predicates Alistair Francis
2021-04-02 17:14   ` Richard Henderson
2021-04-06  8:34   ` Bin Meng
2021-04-01 15:17 ` [PATCH v2 3/5] target/riscv: Fix 32-bit HS mode access permissions Alistair Francis
2021-04-02 17:14   ` Richard Henderson
2021-04-06  8:34   ` Bin Meng
2021-04-01 15:17 ` [PATCH v2 4/5] target/riscv: Use the RISCVException enum for CSR operations Alistair Francis
2021-04-02 17:17   ` Richard Henderson
2021-04-06  8:34   ` Bin Meng
2021-04-01 15:18 ` [PATCH v2 5/5] target/riscv: Use RISCVException enum for CSR access Alistair Francis
2021-04-02 17:18   ` Richard Henderson
2021-04-06  8:34   ` Bin Meng
2021-04-07 13:55 ` [PATCH v2 0/5] RISC-V: Convert the CSR access functions to use Alistair Francis

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