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Sun, 01 Dec 2019 12:05:23 -0800 (PST) Subject: Re: [PATCH v2 06/14] target/arm: use gdb_get_reg helpers To: =?UTF-8?Q?Alex_Benn=c3=a9e?= , qemu-devel@nongnu.org References: <20191130084602.10818-1-alex.bennee@linaro.org> <20191130084602.10818-7-alex.bennee@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <987465d3-3b13-e675-9622-c13e2d5205c2@redhat.com> Date: Sun, 1 Dec 2019 21:05:22 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.1.1 MIME-Version: 1.0 In-Reply-To: <20191130084602.10818-7-alex.bennee@linaro.org> Content-Language: en-US X-MC-Unique: Mtoz-tc4MTKxnZCdnZVDCg-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 205.139.110.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: damien.hedde@greensocs.com, Peter Maydell , luis.machado@linaro.org, richard.henderson@linaro.org, "open list:ARM TCG CPUs" , alan.hayward@arm.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 11/30/19 9:45 AM, Alex Benn=C3=A9e wrote: > This is cleaner than poking memory directly and will make later > clean-ups easier. >=20 > Signed-off-by: Alex Benn=C3=A9e >=20 > --- > v2 > - make sure we pass hi/lo correctly as quads are stored in LE order > --- > target/arm/helper.c | 18 +++++++----------- > 1 file changed, 7 insertions(+), 11 deletions(-) >=20 > diff --git a/target/arm/helper.c b/target/arm/helper.c > index 0bf8f53d4b8..0ac950d6c71 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -105,21 +105,17 @@ static int aarch64_fpu_gdb_get_reg(CPUARMState *env= , uint8_t *buf, int reg) > { > switch (reg) { > case 0 ... 31: > - /* 128 bit FP register */ > - { > - uint64_t *q =3D aa64_vfp_qreg(env, reg); > - stq_le_p(buf, q[0]); > - stq_le_p(buf + 8, q[1]); > - return 16; > - } > + { > + /* 128 bit FP register - quads are in LE order */ Oh, this was always wrong on BE :( Reviewed-by: Philippe Mathieu-Daud=C3=A9 > + uint64_t *q =3D aa64_vfp_qreg(env, reg); > + return gdb_get_reg128(buf, q[1], q[0]); > + } > case 32: > /* FPSR */ > - stl_p(buf, vfp_get_fpsr(env)); > - return 4; > + return gdb_get_reg32(buf, vfp_get_fpsr(env)); > case 33: > /* FPCR */ > - stl_p(buf, vfp_get_fpcr(env)); > - return 4; > + return gdb_get_reg32(buf,vfp_get_fpcr(env)); > default: > return 0; > } >=20