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[79.242.59.82]) by smtp.gmail.com with ESMTPSA id m34sm676411wms.25.2021.10.28.00.09.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 28 Oct 2021 00:09:58 -0700 (PDT) Message-ID: <9deb084d-c98c-3d04-277c-397c5727234b@redhat.com> Date: Thu, 28 Oct 2021 09:09:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.1.0 Subject: Re: [PATCH v2 4/5] pci: Add pci_for_each_root_bus() To: Peter Xu , qemu-devel@nongnu.org References: <20211028043129.38871-1-peterx@redhat.com> <20211028043129.38871-5-peterx@redhat.com> From: David Hildenbrand Organization: Red Hat In-Reply-To: <20211028043129.38871-5-peterx@redhat.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=david@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=216.205.24.124; envelope-from=david@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -55 X-Spam_score: -5.6 X-Spam_bar: ----- X-Spam_report: (-5.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-2.847, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "Daniel P . Berrange" , Eduardo Habkost , "Michael S . Tsirkin" , Jason Wang , Markus Armbruster , Eric Auger , Alex Williamson , Igor Mammedov , Paolo Bonzini , =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , David Gibson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 28.10.21 06:31, Peter Xu wrote: > Add a helper to loop over each root bus of the system, either the default root > bus or extended buses like pxb-pcie. > > There're three places that can be rewritten with the pci_for_each_root_bus() > helper that we just introduced. De-dup the code. > > Signed-off-by: Peter Xu > --- > hw/arm/virt-acpi-build.c | 31 +++++++++++-------------------- > hw/i386/acpi-build.c | 38 ++++++++++---------------------------- > hw/pci/pci.c | 26 ++++++++++++++++++++++++++ > include/hw/pci/pci.h | 2 ++ > 4 files changed, 49 insertions(+), 48 deletions(-) > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c > index 674f902652..adba51f35a 100644 > --- a/hw/arm/virt-acpi-build.c > +++ b/hw/arm/virt-acpi-build.c > @@ -264,28 +264,20 @@ struct AcpiIortIdMapping { > typedef struct AcpiIortIdMapping AcpiIortIdMapping; > > /* Build the iort ID mapping to SMMUv3 for a given PCI host bridge */ > -static int > -iort_host_bridges(Object *obj, void *opaque) > +static void > +iort_host_bridges(PCIBus *bus, void *opaque) > { > - GArray *idmap_blob = opaque; > - > - if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) { > - PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus; > - > - if (bus && !pci_bus_bypass_iommu(bus)) { > - int min_bus, max_bus; > + if (!pci_bus_bypass_iommu(bus)) { > + int min_bus, max_bus; > > - pci_bus_range(bus, &min_bus, &max_bus); > + pci_bus_range(bus, &min_bus, &max_bus); > > - AcpiIortIdMapping idmap = { > - .input_base = min_bus << 8, > - .id_count = (max_bus - min_bus + 1) << 8, > - }; > - g_array_append_val(idmap_blob, idmap); > - } > + AcpiIortIdMapping idmap = { > + .input_base = min_bus << 8, > + .id_count = (max_bus - min_bus + 1) << 8, > + }; > + g_array_append_val((GArray *)opaque, idmap); > } > - > - return 0; > } > > static int iort_idmap_compare(gconstpointer a, gconstpointer b) > @@ -320,8 +312,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) > if (vms->iommu == VIRT_IOMMU_SMMUV3) { > AcpiIortIdMapping next_range = {0}; > > - object_child_foreach_recursive(object_get_root(), > - iort_host_bridges, smmu_idmaps); > + pci_for_each_root_bus(iort_host_bridges, smmu_idmaps); > > /* Sort the smmu idmap by input_base */ > g_array_sort(smmu_idmaps, iort_idmap_compare); > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c > index a76b17ed92..3e50acfe35 100644 > --- a/hw/i386/acpi-build.c > +++ b/hw/i386/acpi-build.c > @@ -2123,20 +2123,12 @@ insert_scope(PCIBus *bus, PCIDevice *dev, void *opaque) > } > > /* For a given PCI host bridge, walk and insert DMAR scope */ > -static int > -dmar_host_bridges(Object *obj, void *opaque) > +static void > +dmar_host_bridges(PCIBus *bus, void *opaque) > { > - GArray *scope_blob = opaque; > - > - if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) { > - PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus; > - > - if (bus && !pci_bus_bypass_iommu(bus)) { > - pci_for_each_device_under_bus(bus, insert_scope, scope_blob); > - } > + if (!pci_bus_bypass_iommu(bus)) { > + pci_for_each_device_under_bus(bus, insert_scope, opaque); > } > - > - return 0; > } > > /* > @@ -2165,8 +2157,7 @@ build_dmar_q35(GArray *table_data, BIOSLinker *linker, const char *oem_id, > * Insert scope for each PCI bridge and endpoint device which > * is attached to a bus with iommu enabled. > */ > - object_child_foreach_recursive(object_get_root(), > - dmar_host_bridges, scope_blob); > + pci_for_each_root_bus(dmar_host_bridges, scope_blob); > > assert(iommu); > if (x86_iommu_ir_supported(iommu)) { > @@ -2329,20 +2320,12 @@ insert_ivhd(PCIBus *bus, PCIDevice *dev, void *opaque) > } > > /* For all PCI host bridges, walk and insert IVHD entries */ > -static int > -ivrs_host_bridges(Object *obj, void *opaque) > +static void > +ivrs_host_bridges(PCIBus *bus, void *opaque) > { > - GArray *ivhd_blob = opaque; > - > - if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) { > - PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus; > - > - if (bus && !pci_bus_bypass_iommu(bus)) { > - pci_for_each_device_under_bus(bus, insert_ivhd, ivhd_blob); > - } > + if (!pci_bus_bypass_iommu(bus)) { > + pci_for_each_device_under_bus(bus, insert_ivhd, opaque); > } > - > - return 0; > } > > static void > @@ -2380,8 +2363,7 @@ build_amd_iommu(GArray *table_data, BIOSLinker *linker, const char *oem_id, > * blob further below. Fall back to an entry covering all devices, which > * is sufficient when no aliases are present. > */ > - object_child_foreach_recursive(object_get_root(), > - ivrs_host_bridges, ivhd_blob); > + pci_for_each_root_bus(ivrs_host_bridges, ivhd_blob); > > if (!ivhd_blob->len) { > /* > diff --git a/hw/pci/pci.c b/hw/pci/pci.c > index 4a84e478ce..258290f4eb 100644 > --- a/hw/pci/pci.c > +++ b/hw/pci/pci.c > @@ -2097,6 +2097,32 @@ void pci_for_each_bus_depth_first(PCIBus *bus, pci_bus_ret_fn begin, > } > } > > +typedef struct { > + pci_bus_fn fn; > + void *opaque; > +} PCIRootBusArgs; > + > +static int pci_find_root_bus(Object *obj, void *opaque) > +{ > + PCIRootBusArgs *args = opaque; > + PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus; > + > + if (bus) { > + args->fn(bus, args->opaque); > + } > + > + return 0; > +} > + > +void pci_for_each_root_bus(pci_bus_fn fn, void *opaque) > +{ > + PCIRootBusArgs args = { .fn = fn, .opaque = opaque }; > + > + object_child_foreach_recursive_type(object_get_root(), > + TYPE_PCI_HOST_BRIDGE, > + pci_find_root_bus, > + &args); > +} > > PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn) > { > diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h > index 5c4016b995..6813f128e0 100644 > --- a/include/hw/pci/pci.h > +++ b/include/hw/pci/pci.h > @@ -474,6 +474,8 @@ void pci_for_each_device_under_bus_reverse(PCIBus *bus, > void *opaque); > void pci_for_each_bus_depth_first(PCIBus *bus, pci_bus_ret_fn begin, > pci_bus_fn end, void *parent_state); > +/* Call `fn' for each pci root bus on the system */ > +void pci_for_each_root_bus(pci_bus_fn fn, void *opaque); > PCIDevice *pci_get_function_0(PCIDevice *pci_dev); > > /* Use this wrapper when specific scan order is not required. */ > LGTM Reviewed-by: David Hildenbrand -- Thanks, David / dhildenb