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[174.21.138.234]) by smtp.gmail.com with ESMTPSA id p22sm4766006pgn.73.2020.03.27.18.08.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Mar 2020 18:08:58 -0700 (PDT) Subject: Re: [PATCH v6 26/61] target/riscv: vector single-width fractional multiply with rounding and saturation To: LIU Zhiwei , alistair23@gmail.com, chihmin.chao@sifive.com, palmer@dabbelt.com References: <20200317150653.9008-1-zhiwei_liu@c-sky.com> <20200317150653.9008-27-zhiwei_liu@c-sky.com> From: Richard Henderson Message-ID: <9f5fd1a3-f32f-9779-6d5c-abdedc10fd2d@linaro.org> Date: Fri, 27 Mar 2020 18:08:56 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: <20200317150653.9008-27-zhiwei_liu@c-sky.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: guoren@linux.alibaba.com, wenmeng_zhang@c-sky.com, qemu-riscv@nongnu.org, qemu-devel@nongnu.org, wxy194768@alibaba-inc.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 3/17/20 8:06 AM, LIU Zhiwei wrote: > +static int64_t vsmul64(CPURISCVState *env, int vxrm, int64_t a, int64_t b) > +{ > + uint8_t round; > + uint64_t hi_64, lo_64, Hi62; > + uint8_t hi62, hi63, lo63; > + > + muls64(&lo_64, &hi_64, a, b); > + hi62 = extract64(hi_64, 62, 1); > + lo63 = extract64(lo_64, 63, 1); > + hi63 = extract64(hi_64, 63, 1); > + Hi62 = extract64(hi_64, 0, 62); This seems like way more work than necessary. > + if (hi62 != hi63) { > + env->vxsat = 0x1; > + return INT64_MAX; > + } This can only happen for a == b == INT64_MIN. Perhaps just test exactly that and move it above the multiply? > + round = get_round(vxrm, lo_64, 63); > + if (round && (Hi62 == 0x3fffffff) && lo63) { > + env->vxsat = 0x1; > + return hi62 ? INT64_MIN : INT64_MAX; > + } else { > + if (lo63 && round) { > + return (hi_64 + 1) << 1; > + } else { > + return (hi_64 << 1) | lo63 | round; > + } > + } /* Cannot overflow, as there are always 2 sign bits after multiply. */ ret = (hi_64 << 1) | (lo_64 >> 63); if (round) { if (ret == INT64_MAX) { env->vxsat = 1; } else { ret += 1; } } return ret; r~