qemu-devel.nongnu.org archive mirror

 messages from 2021-04-16 16:57:59 to 2021-04-16 21:55:58 UTC [more...]

[PATCH v5 for-6.1 00/81] target/arm: Implement SVE2
 2021-04-16 21:02 UTC  (63+ messages)
` [PATCH v5 01/81] target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2
` [PATCH v5 02/81] target/arm: Implement SVE2 Integer Multiply - Unpredicated
` [PATCH v5 03/81] target/arm: Implement SVE2 integer pairwise add and accumulate long
` [PATCH v5 04/81] target/arm: Implement SVE2 integer unary operations (predicated)
` [PATCH v5 05/81] target/arm: Split out saturating/rounding shifts from neon
` [PATCH v5 06/81] target/arm: Implement SVE2 saturating/rounding bitwise shift left (predicated)
` [PATCH v5 07/81] target/arm: Implement SVE2 integer halving add/subtract (predicated)
` [PATCH v5 08/81] target/arm: Implement SVE2 integer pairwise arithmetic
` [PATCH v5 09/81] target/arm: Implement SVE2 saturating add/subtract (predicated)
` [PATCH v5 10/81] target/arm: Implement SVE2 integer add/subtract long
` [PATCH v5 11/81] target/arm: Implement SVE2 integer add/subtract interleaved long
` [PATCH v5 12/81] target/arm: Implement SVE2 integer add/subtract wide
` [PATCH v5 13/81] target/arm: Implement SVE2 integer multiply long
` [PATCH v5 14/81] target/arm: Implement PMULLB and PMULLT
` [PATCH v5 15/81] target/arm: Implement SVE2 bitwise shift left long
` [PATCH v5 16/81] target/arm: Implement SVE2 bitwise exclusive-or interleaved
` [PATCH v5 17/81] target/arm: Implement SVE2 bitwise permute
` [PATCH v5 18/81] target/arm: Implement SVE2 complex integer add
` [PATCH v5 19/81] target/arm: Implement SVE2 integer absolute difference and accumulate long
` [PATCH v5 20/81] target/arm: Implement SVE2 integer add/subtract long with carry
` [PATCH v5 21/81] target/arm: Implement SVE2 bitwise shift right and accumulate
` [PATCH v5 22/81] target/arm: Implement SVE2 bitwise shift and insert
` [PATCH v5 23/81] target/arm: Implement SVE2 integer absolute difference and accumulate
` [PATCH v5 24/81] target/arm: Implement SVE2 saturating extract narrow
` [PATCH v5 25/81] target/arm: Implement SVE2 floating-point pairwise
` [PATCH v5 26/81] target/arm: Implement SVE2 SHRN, RSHRN
` [PATCH v5 27/81] target/arm: Implement SVE2 SQSHRUN, SQRSHRUN
` [PATCH v5 28/81] target/arm: Implement SVE2 UQSHRN, UQRSHRN
` [PATCH v5 29/81] target/arm: Implement SVE2 SQSHRN, SQRSHRN
` [PATCH v5 30/81] target/arm: Implement SVE2 WHILEGT, WHILEGE, WHILEHI, WHILEHS
` [PATCH v5 31/81] target/arm: Implement SVE2 WHILERW, WHILEWR
` [PATCH v5 32/81] target/arm: Implement SVE2 bitwise ternary operations
` [PATCH v5 33/81] target/arm: Implement SVE2 MATCH, NMATCH
` [PATCH v5 34/81] target/arm: Implement SVE2 saturating multiply-add long
` [PATCH v5 35/81] target/arm: Implement SVE2 saturating multiply-add high
` [PATCH v5 36/81] target/arm: Implement SVE2 integer multiply-add long
` [PATCH v5 37/81] target/arm: Implement SVE2 complex integer multiply-add
` [PATCH v5 38/81] target/arm: Implement SVE2 ADDHNB, ADDHNT
` [PATCH v5 39/81] target/arm: Implement SVE2 RADDHNB, RADDHNT
` [PATCH v5 40/81] target/arm: Implement SVE2 SUBHNB, SUBHNT
` [PATCH v5 41/81] target/arm: Implement SVE2 RSUBHNB, RSUBHNT
` [PATCH v5 42/81] target/arm: Implement SVE2 HISTCNT, HISTSEG
` [PATCH v5 43/81] target/arm: Implement SVE2 XAR
` [PATCH v5 44/81] target/arm: Implement SVE2 scatter store insns
` [PATCH v5 45/81] target/arm: Implement SVE2 gather load insns
` [PATCH v5 47/81] target/arm: Implement SVE2 SPLICE, EXT
` [PATCH v5 48/81] target/arm: Pass separate addend to {U, S}DOT helpers
` [PATCH v5 50/81] target/arm: Split out formats for 2 vectors + 1 index
` [PATCH v5 52/81] target/arm: Implement SVE2 integer multiply (indexed)
` [PATCH v5 53/81] target/arm: Implement SVE2 integer multiply-add (indexed)
` [PATCH v5 54/81] target/arm: Implement SVE2 saturating multiply-add high (indexed)
` [PATCH v5 56/81] target/arm: Implement SVE2 saturating multiply (indexed)
` [PATCH v5 57/81] target/arm: Implement SVE2 signed saturating doubling multiply high
` [PATCH v5 58/81] target/arm: Implement SVE2 saturating multiply high (indexed)
` [PATCH v5 60/81] target/arm: Implement SVE mixed sign dot product
` [PATCH v5 61/81] target/arm: Implement SVE2 crypto unary operations
` [PATCH v5 62/81] target/arm: Implement SVE2 crypto destructive binary operations
` [PATCH v5 64/81] target/arm: Implement SVE2 TBL, TBX
` [PATCH v5 65/81] target/arm: Implement SVE2 FCVTNT
` [PATCH v5 71/81] target/arm: Implement 128-bit ZIP, UZP, TRN
` [PATCH v5 74/81] target/arm: Implement aarch64 SUDOT, USDOT
` [PATCH v5 75/81] target/arm: Split out do_neon_ddda_fpst

[PATCH] block/file-posix: Fix problem with fallocate(PUNCH_HOLE) on GPFS
 2021-04-16 20:34 UTC  (2+ messages)

[PATCH v4 00/19] qapi: static typing conversion, pt3
 2021-04-16 20:25 UTC  (4+ messages)
` [PATCH v4 02/19] flake8: Enforce shorter line length for comments and docstrings

[PATCH v2 0/4] [DO-NOT-MERGE] qapi: static typing conversion, "pt0"
 2021-04-16 19:28 UTC  (5+ messages)
` [PATCH v2 1/4] [DO-NOT-MERGE] docs: replace single backtick (`) with double-backtick (``)
` [PATCH v2 2/4] [DO-NOT-MERGE] docs/sphinx: change default role to "any"
` [PATCH v2 3/4] [DO-NOT-MERGE] docs: enable sphinx-autodoc for scripts/qapi
` [PATCH v2 4/4] [DO-NOT-MERGE]: Add some ad-hoc linting helpers

[PATCH v4 for-6.1 00/39] target/arm: enforce alignment
 2021-04-16 19:23 UTC  (33+ messages)
` [PATCH v4 01/30] target/arm: Fix decode of align in VLDST_single
` [PATCH v4 02/30] target/arm: Rename TBFLAG_A32, SCTLR_B
` [PATCH v4 03/30] target/arm: Rename TBFLAG_ANY, PSTATE_SS
` [PATCH v4 04/30] target/arm: Add wrapper macros for accessing tbflags
` [PATCH v4 05/30] target/arm: Introduce CPUARMTBFlags
` [PATCH v4 06/30] target/arm: Move mode specific TB flags to tb->cs_base
` [PATCH v4 07/30] target/arm: Move TBFLAG_AM32 bits to the top
` [PATCH v4 08/30] target/arm: Move TBFLAG_ANY bits to the bottom
` [PATCH v4 09/30] target/arm: Add ALIGN_MEM to TBFLAG_ANY
` [PATCH v4 10/30] target/arm: Adjust gen_aa32_{ld, st}_i32 for align+endianness
` [PATCH v4 11/30] target/arm: Merge gen_aa32_frob64 into gen_aa32_ld_i64
` [PATCH v4 12/30] target/arm: Fix SCTLR_B test for TCGv_i64 load/store
` [PATCH v4 13/30] target/arm: Adjust gen_aa32_{ld, st}_i64 for align+endianness
` [PATCH v4 14/30] target/arm: Enforce word alignment for LDRD/STRD
` [PATCH v4 15/30] target/arm: Enforce alignment for LDA/LDAH/STL/STLH
` [PATCH v4 16/30] target/arm: Enforce alignment for LDM/STM
` [PATCH v4 17/30] target/arm: Enforce alignment for RFE
` [PATCH v4 18/30] target/arm: Enforce alignment for SRS
` [PATCH v4 19/30] target/arm: Enforce alignment for VLDM/VSTM
` [PATCH v4 20/30] target/arm: Enforce alignment for VLDR/VSTR
` [PATCH v4 21/30] target/arm: Enforce alignment for VLDn (all lanes)
` [PATCH v4 22/30] target/arm: Enforce alignment for VLDn/VSTn (multiple)
` [PATCH v4 23/30] target/arm: Enforce alignment for VLDn/VSTn (single)
` [PATCH v4 24/30] target/arm: Use finalize_memop for aa64 gpr load/store
` [PATCH v4 25/30] target/arm: Use finalize_memop for aa64 fpr load/store
` [PATCH v4 26/30] target/arm: Enforce alignment for aa64 load-acq/store-rel
` [PATCH v4 27/30] target/arm: Use MemOp for size + endian in aa64 vector ld/st
` [PATCH v4 28/30] target/arm: Enforce alignment for aa64 vector LDn/STn (multiple)
` [PATCH v4 29/30] target/arm: Enforce alignment for aa64 vector LDn/STn (single)
` [PATCH v4 30/30] target/arm: Enforce alignment for sve LD1R

[PATCH v2 0/8] GICv3 LPI and ITS feature implementation
 2021-04-16 18:54 UTC  (5+ messages)
` [PATCH v2 1/8] hw/intc: GICv3 ITS initial framework
` [PATCH v2 2/8] hw/intc: GICv3 ITS register definitions added

[PATCH v5 for-6.1 0/9] target/arm mte fixes
 2021-04-16 18:45 UTC  (11+ messages)
` [PATCH v5 1/9] target/arm: Fix mte_checkN
` [PATCH v5 2/9] target/arm: Split out mte_probe_int
` [PATCH v5 3/9] target/arm: Fix unaligned checks for mte_check1, mte_probe1
` [PATCH v5 4/9] test/tcg/aarch64: Add mte-5
` [PATCH v5 5/9] target/arm: Replace MTEDESC ESIZE+TSIZE with SIZEM1
` [PATCH v5 6/9] target/arm: Merge mte_check1, mte_checkN
` [PATCH v5 7/9] target/arm: Rename mte_probe1 to mte_probe
` [PATCH v5 8/9] target/arm: Simplify sve mte checking
` [PATCH v5 9/9] target/arm: Remove log2_esize parameter to gen_mte_checkN

[PATCH for-6.0? 0/6] extern "C" overhaul for C++ files
 2021-04-16 18:31 UTC  (16+ messages)
` [PATCH for-6.0? 1/6] osdep: include glib-compat.h before other QEMU headers
` [PATCH for-6.0? 2/6] osdep: protect qemu/osdep.h with extern "C"
` [PATCH for-6.0? 3/6] include/qemu/osdep.h: Move system includes to top
` [PATCH for-6.0? 4/6] osdep: Make os-win32.h and os-posix.h handle 'extern "C"' themselves
` [PATCH for-6.0? 5/6] include/qemu/bswap.h: Handle being included outside extern "C" block
` [PATCH for-6.0? 6/6] include/disas/dis-asm.h: Handle being included outside 'extern "C"'

[PATCH v2 0/8] qapi: static typing conversion, pt4
 2021-04-16 18:24 UTC  (12+ messages)
` [PATCH v2 1/8] qapi/error: Repurpose QAPIError as a generic exception base class
` [PATCH v2 4/8] qapi/error: Change assertion

[PATCH v4 00/12] qtests: Check accelerator available at runtime via QMP 'query-accels'
 2021-04-16 18:21 UTC  (4+ messages)
` [PATCH v4 01/12] MAINTAINERS: Add qtest/arm-cpu-features.c to ARM TCG CPUs section

[PATCH for-6.1 0/4] Remove more superfluous include statements
 2021-04-16 18:04 UTC  (7+ messages)
` [PATCH 1/4] Do not include sysemu/sysemu.h if it's not really necessary
` [PATCH 2/4] Do not include hw/boards.h "
` [PATCH 3/4] Do not include cpu.h "
` [PATCH 4/4] Do not include exec/address-spaces.h "

[PATCH 0/8] Tests: introduce custom jobs
 2021-04-16 17:46 UTC  (7+ messages)
` [PATCH 3/8] tests/acceptance/linux_ssh_mips_malta.py: drop identical setUp

[PATCH v5] i386/cpu_dump: support AVX512 ZMM regs dump
 2021-04-16 17:27 UTC  (2+ messages)

[PATCH] aspeed: Add support for the quanta-q7l1-bmc board
 2021-04-16 17:38 UTC  (3+ messages)

[PATCH v2] target/arm: drop CF_LAST_IO/dc->condjump check
 2021-04-16 17:02 UTC 

[RFC v14 00/80] arm cleanup experiment for kvm-only build
 2021-04-16 16:28 UTC  (60+ messages)
` [RFC v14 12/80] target/arm: move physical address translation to cpu-mmu
` [RFC v14 18/80] target/arm: move cpsr_read, cpsr_write to cpu_common
` [RFC v14 19/80] target/arm: add temporary stub for arm_rebuild_hflags
` [RFC v14 22/80] target/arm: move arm_mmu_idx* to cpu-mmu
` [RFC v14 24/80] target/arm: move arm_sctlr away from tcg helpers
` [RFC v14 25/80] target/arm: move arm_cpu_list to common_cpu
` [RFC v14 26/80] target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code
` [RFC v14 29/80] target/arm: move a15 cpu model away from the TCG-only models
` [RFC v14 30/80] target/arm: fixup sve_exception_el code style before move
` [RFC v14 31/80] target/arm: move sve_exception_el out of TCG helpers
` [RFC v14 32/80] target/arm: fix comments style of fp_exception_el before moving it
` [RFC v14 33/80] target/arm: move fp_exception_el out of TCG helpers
` [RFC v14 34/80] target/arm: remove now useless ifndef from fp_exception_el
` [RFC v14 35/80] target/arm: make further preparation for the exception code to move
` [RFC v14 36/80] target/arm: fix style of arm_cpu_do_interrupt functions before move
` [RFC v14 37/80] target/arm: move exception code out of tcg/helper.c
` [RFC v14 38/80] target/arm: rename handle_semihosting to tcg_handle_semihosting
` [RFC v14 39/80] target/arm: replace CONFIG_TCG with tcg_enabled
` [RFC v14 40/80] target/arm: move TCGCPUOps to tcg/tcg-cpu.c
` [RFC v14 41/80] target/arm: move cpu_tcg to tcg/tcg-cpu-models.c
` [RFC v14 42/80] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()
` [RFC v14 43/80] target/arm: remove kvm include file for PSCI and arm-powerctl
` [RFC v14 44/80] target/arm: move kvm-const.h, kvm.c, kvm64.c, kvm_arm.h to kvm/
` [RFC v14 45/80] MAINTAINERS: update arm kvm maintained files to all in target/arm/kvm/
` [RFC v14 46/80] target/arm: cleanup cpu includes
` [RFC v14 47/80] target/arm: remove broad "else" statements when checking accels
` [RFC v14 48/80] target/arm: remove kvm-stub.c
` [RFC v14 49/80] tests/qtest: skip bios-tables-test test_acpi_oem_fields_virt for KVM
` [RFC v14 50/80] tests: restrict TCG-only arm-cpu-features tests to TCG builds
` [RFC v14 51/80] tests: do not run test-hmp on all machines for ARM KVM-only
` [RFC v14 52/80] tests: device-introspect-test: cope with ARM TCG-only devices
` [RFC v14 53/80] tests: do not run qom-test on all machines for ARM KVM-only
` [RFC v14 54/80] Revert "target/arm: Restrict v8M IDAU to TCG"
` [RFC v14 55/80] target/arm: create kvm cpu accel class
` [RFC v14 56/80] target/arm: move kvm post init initialization to kvm cpu accel
` [RFC v14 57/80] target/arm: add tcg cpu accel class
` [RFC v14 58/80] target/arm: move TCG gt timer creation code in tcg/
` [RFC v14 59/80] target/arm: cpu-sve: new module
` [RFC v14 60/80] target/arm: cpu-sve: rename functions according to module prefix
` [RFC v14 61/80] target/arm: cpu-sve: split TCG and KVM functionality
` [RFC v14 62/80] target/arm: cpu-sve: make cpu_sve_finalize_features return bool
` [RFC v14 63/80] target/arm: make is_aa64 and arm_el_is_aa64 a macro for !TARGET_AARCH64
` [RFC v14 64/80] target/arm: restrict rebuild_hflags_a64 to TARGET_AARCH64
` [RFC v14 65/80] target/arm: arch_dump: restrict ELFCLASS64 to AArch64
` [RFC v14 66/80] target/arm: cpu-exceptions, cpu-exceptions-aa64: new modules
` [RFC v14 67/80] target/arm: tcg: restrict ZCR cpregs to TARGET_AARCH64
` [RFC v14 68/80] target/arm: tcg-sve: import narrow_vq and change_el functions
` [RFC v14 69/80] target/arm: tcg-sve: rename the "
` [RFC v14 70/80] target/arm: move sve_zcr_len_for_el to TARGET_AARCH64-only cpu-sve
` [RFC v14 71/80] cpu-sve: rename sve_zcr_len_for_el to cpu_sve_get_zcr_len_for_el
` [RFC v14 72/80] target/arm: cpu-common: wrap a64-only check with is_a64
` [RFC v14 73/80] target/arm: cpu-pauth: new module for ARMv8.3 Pointer Authentication
` [RFC v14 74/80] target/arm: cpu-pauth: change arm_cpu_pauth_finalize name and sig
` [RFC v14 75/80] target/arm: move arm_cpu_finalize_features into cpu64
` [RFC v14 76/80] target/arm: cpu64: rename arm_cpu_finalize_features
` [RFC v14 77/80] target/arm: cpu64: some final cleanup on aarch64_cpu_finalize_features
` [RFC v14 78/80] XXX target/arm: experiment refactoring cpu "max"
` [RFC v14 79/80] target/arm: tcg: remove superfluous CONFIG_TCG check
` [RFC v14 80/80] target/arm: remove v7m stub function for !CONFIG_TCG