qemu-devel.nongnu.org archive mirror

 messages from 2021-08-18 20:00:10 to 2021-08-19 11:03:53 UTC [more...]

[qemu-web PATCH] Add a blog post about FUSE block exports
 2021-08-19 11:00 UTC  (3+ messages)

[PATCH v3 00/21] target/riscv: Use tcg_constant_*
 2021-08-19 11:00 UTC  (23+ messages)
` [PATCH v3 01/21] "
` [PATCH v3 02/21] target/riscv: Clean up division helpers
` [PATCH v3 03/21] target/riscv: Add DisasContext to gen_get_gpr, gen_set_gpr
` [PATCH v3 04/21] target/riscv: Introduce DisasExtend and new helpers
` [PATCH v3 05/21] target/riscv: Add DisasExtend to gen_arith*
` [PATCH v3 06/21] target/riscv: Remove gen_arith_div*
` [PATCH v3 07/21] target/riscv: Use gen_arith for mulh and mulhu
` [PATCH v3 08/21] target/riscv: Move gen_* helpers for RVM
` [PATCH v3 09/21] target/riscv: Move gen_* helpers for RVB
` [PATCH v3 10/21] target/riscv: Add DisasExtend to gen_unary
` [PATCH v3 11/21] target/riscv: Use DisasExtend in shift operations
` [PATCH v3 12/21] target/riscv: Add gen_greviw
` [PATCH v3 13/21] target/riscv: Use get_gpr in branches
` [PATCH v3 14/21] target/riscv: Use {get, dest}_gpr for integer load/store
` [PATCH v3 15/21] target/riscv: Reorg csr instructions
` [PATCH v3 16/21] target/riscv: Use {get,dest}_gpr for RVA
` [PATCH v3 17/21] target/riscv: Use gen_shift_imm_fn for slli_uw
` [PATCH v3 18/21] target/riscv: Use {get,dest}_gpr for RVF
` [PATCH v3 19/21] target/riscv: Use {get,dest}_gpr for RVD
` [PATCH v3 20/21] target/riscv: Tidy trans_rvh.c.inc
` [PATCH v3 21/21] target/riscv: Use {get,dest}_gpr for RVV

[PATCH] qemu-img: Allow target be aligned to sector size
 2021-08-19 10:12 UTC 

Is QEMU's vmxnet3 still being used?
 2021-08-19  9:37 UTC  (5+ messages)

[PATCH RFC v2 00/16] vfio-user implementation
 2021-08-19  9:28 UTC  (4+ messages)
` [PATCH RFC v2 01/16] vfio-user: introduce vfio-user protocol specification

[PATCH v2 0/5] target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian()
 2021-08-19  9:16 UTC  (10+ messages)
` [PATCH v2 1/5] target/mips: Call cpu_is_bigendian & inline GET_OFFSET in ld/st helpers
` [PATCH v2 2/5] target/mips: Replace GET_LMASK() macro by get_lmask(32) function
` [PATCH v2 3/5] target/mips: Replace GET_LMASK64() macro by get_lmask(64) function
` [PATCH v2 4/5] target/mips: Store CP0_Config0 in DisasContext
` [PATCH v2 5/5] target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian()

[PULL 6/7] meson: fix meson 0.58 warning with libvhost-user subproject
 2021-08-19  8:43 UTC  (2+ messages)

[RFC PATCH 00/13] Add support for Mirror VM
 2021-08-19  8:22 UTC  (16+ messages)

[PATCH v2 00/21] target/riscv: Use tcg_constant_*
 2021-08-19  8:04 UTC  (35+ messages)
` [PATCH v2 03/21] target/riscv: Add DisasContext to gen_get_gpr, gen_set_gpr
` [PATCH v2 04/21] target/riscv: Introduce DisasExtend and new helpers
` [PATCH v2 05/21] target/riscv: Add DisasExtend to gen_arith*
` [PATCH v2 06/21] target/riscv: Remove gen_arith_div*
` [PATCH v2 07/21] target/riscv: Use gen_arith for mulh and mulhu
` [PATCH v2 08/21] target/riscv: Move gen_* helpers for RVM
` [PATCH v2 09/21] target/riscv: Move gen_* helpers for RVB
` [PATCH v2 11/21] target/riscv: Use DisasExtend in shift operations
` [PATCH v2 13/21] target/riscv: Use get_gpr in branches
` [PATCH v2 14/21] target/riscv: Use {get, dest}_gpr for integer load/store
` [PATCH v2 15/21] target/riscv: Reorg csr instructions
` [PATCH v2 16/21] target/riscv: Use {get,dest}_gpr for RVA
` [PATCH v2 18/21] target/riscv: Use {get,dest}_gpr for RVF
` [PATCH v2 19/21] target/riscv: Use {get,dest}_gpr for RVD

[Patch 0/2] hw/arm/xlnx-versal: hw/arm/xlnx-zynqmp: Add unimplemented mmio
 2021-08-19  6:32 UTC  (5+ messages)
` [Patch 1/2] hw/arm/xlnx-versal: Add unimplemented APU mmio
` [Patch 2/2] hw/arm/xlnx-zynqmp: "

[PATCH v3 00/66] Unaligned access for user-only
 2021-08-19  6:18 UTC  (32+ messages)
` [PATCH v3 02/66] hw/core: Make do_unaligned_access noreturn
` [PATCH v3 22/66] accel/tcg: Drop signness in tracing in cputlb.c
` [PATCH v3 23/66] tcg: Expand MO_SIZE to 3 bits
` [PATCH v3 24/66] tcg: Rename TCGMemOpIdx to MemOpIdx
` [PATCH v3 34/66] target/hexagon: Implement cpu_mmu_index
` [PATCH v3 35/66] accel/tcg: Add cpu_{ld,st}*_mmu interfaces
` [PATCH v3 38/66] target/mips: Use 8-byte memory ops for msa load/store
` [PATCH v3 43/66] tcg: Add helper_unaligned_{ld, st} for user-only sigbus
` [PATCH v3 44/66] tcg/i386: Support raising sigbus for user-only
` [PATCH v3 48/66] hw/core/cpu: Re-sort the non-pointers to the end of CPUClass
` [PATCH v3 49/66] linux-user: Add code for PR_GET/SET_UNALIGN
` [PATCH v3 50/66] hw/core/cpu: Move cpu properties to cpu-sysemu.c
` [PATCH v3 52/66] target/alpha: Reorg fp memory operations
` [PATCH v3 53/66] target/alpha: Reorg integer "
` [PATCH v3 57/66] accel/tcg/user-exec: Convert DEBUG_SIGNAL to tracepoint
` [PATCH v3 58/66] include/exec: Move cpu_signal_handler declaration
` [PATCH v3 59/66] accel/tcg: Handle SIGBUS in handle_cpu_signal
` [PATCH v3 63/66] tcg/tci: Support raising sigbus for user-only
` [PATCH v3 64/66] tcg: Canonicalize alignment flags in MemOp
` [PATCH v3 65/66] tcg/riscv: Support raising sigbus for user-only
` [PATCH v3 66/66] tcg/riscv: Remove add with zero on user-only memory access

[PATCH RFC v6 00/12] Add riscv kvm accel support
 2021-08-19  6:13 UTC  (3+ messages)
` [PATCH RFC v6 08/12] target/riscv: Handle KVM_EXIT_RISCV_SBI exit

[PATCH v3] hw/intc/sifive_clint: Fix overflow in sifive_clint_write_timecmp()
 2021-08-19  5:12 UTC 

[PATCH v4 1/3] target-arm: Add support for Fujitsu A64FX
 2021-08-19  5:17 UTC  (12+ messages)

[PATCH 0/9] hw/nvram: hw/arm: Introduce Xilinx eFUSE and BBRAM
 2021-08-19  4:03 UTC  (10+ messages)
` [PATCH 1/9] docs/system/arm: xlnx-versal-virt: BBRAM and eFUSE Usage
` [PATCH 2/9] hw/nvram: Introduce Xilinx eFuse QOM
` [PATCH 3/9] hw/nvram: Introduce Xilinx Versal eFuse device
` [PATCH 4/9] hw/nvram: Introduce Xilinx ZynqMP "
` [PATCH 5/9] hw/nvram: Introduce Xilinx battery-backed ram
` [PATCH 6/9] hw/arm: xlnx-versal: Add Xilinx BBRAM device
` [PATCH 7/9] hw/arm: xlnx-versal: Add Xilinx eFUSE device
` [PATCH 8/9] hw/arm: xlnx-zynqmp: Add Xilinx BBRAM device
` [PATCH 9/9] hw/arm: xlnx-zynqmp: Add Xilinx eFUSE device

[PATCH v6 00/16] machine: smp parsing fixes and improvement
 2021-08-19  3:10 UTC  (17+ messages)
` [PATCH v6 01/16] docs/about/removed-features: Remove duplicated doc about -smp
` [PATCH v6 02/16] machine: Deprecate "parameter=0" SMP configurations
` [PATCH v6 03/16] machine: Minor refactor/fix for the smp parsers
` [PATCH v6 04/16] machine: Uniformly use maxcpus to calculate the omitted parameters
` [PATCH v6 05/16] machine: Set the value of cpus to match maxcpus if it's omitted
` [PATCH v6 06/16] machine: Improve the error reporting of smp parsing
` [PATCH v6 07/16] hw: Add compat machines for 6.2
` [PATCH v6 08/16] machine: Prefer cores over sockets in smp parsing since 6.2
` [PATCH v6 09/16] machine: Use ms instead of global current_machine in sanity-check
` [PATCH v6 10/16] machine: Tweak the order of topology members in struct CpuTopology
` [PATCH v6 11/16] machine: Make smp_parse generic enough for all arches
` [PATCH v6 12/16] machine: Remove smp_parse callback from MachineClass
` [PATCH v6 13/16] machine: Move smp_prefer_sockets to struct SMPCompatProps
` [PATCH v6 14/16] machine: Put all sanity-check in the generic SMP parser
` [PATCH v6 15/16] machine: Split out the smp parsing code
` [PATCH v6 16/16] tests/unit: Add a unit test for smp parsing

[PATCH v2] net/colo: check vnet_hdr_support flag when using virtio-net
 2021-08-19  1:27 UTC 

[PATCH v2 0/3] target/riscv: Update QEmu for Zb[abcs] 1.0.0
 2021-08-19  1:09 UTC  (7+ messages)
` [PATCH v2 1/3] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties
` [PATCH v2 2/3] target/riscv: update Zb[abcs] to 1.0.0 (public review) specification
` [PATCH v2 3/3] disas/riscv: Add Zb[abcs] instructions

[PATCH v2] hw/intc/sifive_clint: Fix overflow in sifive_clint_write_timecmp()
 2021-08-19  0:13 UTC  (3+ messages)

[PATCH 0/5] target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian()
 2021-08-18 22:29 UTC  (8+ messages)
` [PATCH 1/5] target/mips: Replace GET_OFFSET() macro by get_offset() function
` [PATCH 2/5] target/mips: Replace GET_LMASK() macro by get_lmask(32) function

[PATCH v3 00/16] tcg/mips: Unaligned access and other cleanup
 2021-08-18 22:19 UTC  (24+ messages)
` [PATCH v3 01/16] tcg/mips: Support unaligned access for user-only
` [PATCH v3 02/16] tcg/mips: Support unaligned access for softmmu
` [PATCH v3 03/16] tcg/mips: Drop inline markers
` [PATCH v3 04/16] tcg/mips: Move TCG_AREG0 to S8
` [PATCH v3 05/16] tcg/mips: Move TCG_GUEST_BASE_REG to S7
` [PATCH v3 06/16] tcg/mips: Unify TCG_GUEST_BASE_REG tests
` [PATCH v3 07/16] tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr
` [PATCH v3 08/16] tcg/mips: Unset TCG_TARGET_HAS_direct_jump
` [PATCH v3 09/16] tcg/mips: Drop special alignment for code_gen_buffer
` [PATCH v3 10/16] tcg/mips: Create and use TCG_REG_TB
` [PATCH v3 11/16] tcg/mips: Split out tcg_out_movi_one
` [PATCH v3 12/16] tcg/mips: Split out tcg_out_movi_two
` [PATCH v3 13/16] tcg/mips: Use the constant pool for 64-bit constants
` [PATCH v3 14/16] tcg/mips: Aggressively use the constant pool for n64 calls
` [PATCH v3 15/16] tcg/mips: Try tb-relative addresses in tcg_out_movi
` [PATCH v3 16/16] tcg/mips: Try three insns with shift and add "

[PATCH v3 00/14] tcg/arm: Unaligned access and other cleanup
 2021-08-18 22:05 UTC  (20+ messages)
` [PATCH v3 01/14] tcg/arm: Remove fallback definition of __ARM_ARCH
` [PATCH v3 02/14] tcg/arm: Standardize on tcg_out_<branch>_{reg,imm}
` [PATCH v3 03/14] tcg/arm: Simplify use_armvt5_instructions
` [PATCH v3 04/14] tcg/arm: Support armv4t in tcg_out_goto and tcg_out_call
` [PATCH v3 05/14] tcg/arm: Examine QEMU_TCG_DEBUG environment variable
` [PATCH v3 06/14] tcg/arm: Support unaligned access for softmmu
` [PATCH v3 07/14] tcg/arm: Split out tcg_out_ldstm
` [PATCH v3 08/14] tcg/arm: Simplify usage of encode_imm
` [PATCH v3 09/14] tcg/arm: Drop inline markers
` [PATCH v3 10/14] tcg/arm: Give enum arm_cond_code_e a typedef and use it
` [PATCH v3 11/14] tcg/arm: More use of the ARMInsn enum
` [PATCH v3 12/14] tcg/arm: More use of the TCGReg enum
` [PATCH v3 13/14] tcg/arm: Reserve a register for guest_base
` [PATCH v3 14/14] tcg/arm: Support raising sigbus for user-only

[PATCH v3 0/7] tcg/sparc: Unaligned access and other cleanup
 2021-08-18 21:08 UTC  (10+ messages)
` [PATCH v3 1/7] tcg/sparc: Drop inline markers
` [PATCH v3 2/7] tcg/sparc: Introduce tcg_out_mov_delay
` [PATCH v3 3/7] tcg/sparc: Add scratch argument to tcg_out_movi_int
` [PATCH v3 4/7] tcg/sparc: Improve code gen for shifted 32-bit constants
` [PATCH v3 5/7] tcg/sparc: Use the constant pool for 64-bit constants
` [PATCH v3 6/7] tcg/sparc: Add tcg_out_jmpl_const for better tail calls
` [PATCH v3 7/7] tcg/sparc: Support unaligned access for user-only

[PATCH 0/3] target/riscv: Update QEmu for Zb[abcs] 1.0.0
 2021-08-18 20:08 UTC  (4+ messages)
` [PATCH 1/3] target/riscv: Add x-zba, x-zbb, x-zbc and x-zbs properties
` [PATCH 2/3] target/riscv: update Zb[abcs] to 1.0.0 (public review) specification
` [PATCH 3/3] disas/riscv: Add Zb[abcs] instructions

[PATCH 0/4] vl: Prioritize device realizations
 2021-08-18 19:43 UTC  (4+ messages)
` [PATCH 1/4] qdev-monitor: Trace qdev creation
` [PATCH 3/4] qdev: Export qdev_get_device_class()
` [PATCH 4/4] vl: Prioritize realizations of devices

[PATCH v3 00/13] AQMP TUI Draft
 2021-08-18 19:45 UTC  (10+ messages)
` [PATCH v3 04/13] python/aqmp-tui: Add AQMP TUI draft
` [PATCH v3 09/13] python/aqmp-tui: Add QMP connection manager