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 messages from 2021-10-16 03:06:27 to 2021-10-18 05:48:26 UTC [more...]

[PATCH v8 00/78] support vector extension v1.0
 2021-10-18  5:46 UTC  (9+ messages)
` [PATCH v8 01/78] target/riscv: fix TB_FLAGS bits overlapping bug for rvv/rvh
` [PATCH v8 18/78] target/riscv: rvv-1.0: remove amo operations instructions
` [PATCH v8 29/78] target/riscv: rvv-1.0: count population in mask instruction

[PATCH v3 00/14] target/riscv: Rationalize XLEN and operand length
 2021-10-18  5:38 UTC  (21+ messages)
` [PATCH v3 01/14] target/riscv: Move cpu_get_tb_cpu_state out of line
` [PATCH v3 02/14] target/riscv: Create RISCVMXL enumeration
` [PATCH v3 03/14] target/riscv: Split misa.mxl and misa.ext
` [PATCH v3 04/14] target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl
` [PATCH v3 05/14] target/riscv: Add MXL/SXL/UXL to TB_FLAGS
` [PATCH v3 06/14] target/riscv: Use REQUIRE_64BIT in amo_check64
` [PATCH v3 07/14] target/riscv: Properly check SEW in amo_op
` [PATCH v3 08/14] target/riscv: Replace is_32bit with get_xl/get_xlen
` [PATCH v3 09/14] target/riscv: Replace DisasContext.w with DisasContext.ol
` [PATCH v3 10/14] target/riscv: Use gen_arith_per_ol for RVM
` [PATCH v3 11/14] target/riscv: Adjust trans_rev8_32 for riscv64
` [PATCH v3 12/14] target/riscv: Use gen_unary_per_ol for RVB
` [PATCH v3 13/14] target/riscv: Use gen_shift*_per_ol for RVB, RVI
` [PATCH v3 14/14] target/riscv: Compute mstatus.sd on demand

[RFC PATCH 0/5] Make Intel PT configurable
 2021-10-18  5:37 UTC  (9+ messages)
` [RFC PATCH 2/5] target/i386: Introduce FeatureWordInfo for Intel PT CPUID leaf 0xD
` [RFC PATCH 3/5] target/i386: Enable host pass through of Intel PT

[PATCH v2 00/15] bsd-user: misc cleanup for aarch64 import
 2021-10-18  5:26 UTC  (30+ messages)
` [PATCH v2 01/15] meson: *-user: only descend into *-user when configured
` [PATCH v2 04/15] bsd-user: TARGET_RESET define is unused, remove it
` [PATCH v2 05/15] bsd-user: export get_errno and is_error from syscall.c
` [PATCH v2 06/15] bsd-user/errno_defs.h: Add internal error numbers
` [PATCH v2 07/15] bsd-user: move TARGET_MC_GET_CLEAR_RET to target_os_signal.h
` [PATCH v2 08/15] bsd-user/target_os_elf.h: Remove fallback ELF_HWCAP and reorder
` [PATCH v2 09/15] bsd-user/target_os_elf: If ELF_HWCAP2 is defined, publish it
` [PATCH v2 10/15] bsd-user: Remove used from TaskState
` [PATCH v2 11/15] bsd-user: Add stop_all_tasks
` [PATCH v2 12/15] bsd-user/sysarch: Move to using do_freebsd_arch_sysarch interface
` [PATCH v2 13/15] bsd-user/sysarch: Provide a per-arch framework for sysarch syscall
` [PATCH v2 14/15] bsd-user: Rename sigqueue to qemu_sigqueue
` [PATCH v2 15/15] bsd-user/signal: Create a dummy signal queueing function

gitlab build-edk2 failures
 2021-10-18  5:23 UTC  (4+ messages)

[PATCH v3 0/6] target/riscv: support Zfh, Zfhmin extension v0.1
 2021-10-18  4:28 UTC  (17+ messages)
` [PATCH v3 1/6] target/riscv: zfh: half-precision load and store
` [PATCH v3 2/6] target/riscv: zfh: half-precision computational
` [PATCH v3 3/6] target/riscv: zfh: half-precision convert and move
` [PATCH v3 4/6] target/riscv: zfh: half-precision floating-point compare
` [PATCH v3 5/6] target/riscv: zfh: half-precision floating-point classify
` [PATCH v3 6/6] target/riscv: zfh: implement zfhmin extension

[PATCH v1 1/2] target/riscv: Remove some unused macros
 2021-10-18  4:32 UTC  (2+ messages)
` [PATCH v1 2/2] target/riscv: Organise the CPU properties

[PATCH v3 0/9] bsd-user mmap fixes
 2021-10-18  3:44 UTC  (5+ messages)
` [PATCH v3 6/9] bsd-user/mmap.c: Convert to qemu_log logging for mmap debugging
` [PATCH v3 7/9] bsd-user/mmap.c: Don't mmap fd == -1 independently from MAP_ANON flag

[PATCH RESEND v3 0/2] add APIs to handle alternative sNaN propagation for fmax/fmin
 2021-10-18  3:51 UTC  (12+ messages)
` [PATCH v3 1/2] softfloat: "
` [PATCH v3 2/2] target/riscv: change the api for single/double fmin/fmax

[PATCH v4 00/15] PPC64/TCG: Implement 'rfebb' instruction
 2021-10-18  3:13 UTC  (17+ messages)
` [PATCH v4 01/15] target/ppc: add MMCR0 PMCC bits to hflags
` [PATCH v4 02/15] target/ppc: add user read/write functions for MMCR0
` [PATCH v4 03/15] target/ppc: add user read/write functions for MMCR2
` [PATCH v4 04/15] target/ppc: adding user read/write functions for PMCs
` [PATCH v4 05/15] target/ppc: introduce PMU events
` [PATCH v4 06/15] target/ppc: initialize PMUEvents on MMCR1 write
` [PATCH v4 07/15] target/ppc: PMU basic cycle count for pseries TCG
` [PATCH v4 08/15] target/ppc: enable PMU counter overflow with cycle events
` [PATCH v4 09/15] target/ppc: enable PMU instruction count
` [PATCH v4 10/15] target/ppc/power8-pmu.c: add PM_RUN_INST_CMPL (0xFA) event
` [PATCH v4 11/15] target/ppc: PMU: handle setting of PMCs while running
` [PATCH v4 12/15] target/ppc/power8-pmu.c: handle overflow bits when PMU is running
` [PATCH v4 13/15] PPC64/TCG: Implement 'rfebb' instruction
` [PATCH v4 14/15] target/ppc: PMU Event-Based exception support
` [PATCH v4 15/15] target/ppc/excp_helper.c: EBB handling adjustments

[PATCH] target/ppc: Filter mtmsr[d] input before setting MSR
 2021-10-18  1:23 UTC  (2+ messages)

[PATCH v1 1/9] hw/riscv: opentitan: Update to the latest build
 2021-10-18  2:40 UTC  (9+ messages)
` [PATCH v1 2/9] hw/intc: Remove the Ibex PLIC
` [PATCH v1 3/9] hw/intc: sifive_plic: Move the properties
` [PATCH v1 4/9] hw/intc: sifive_plic: Cleanup the realize function
` [PATCH v1 5/9] hw/intc: sifive_plic: Cleanup the irq_request function
` [PATCH v1 6/9] hw/intc: sifive_plic: Add a reset function
` [PATCH v1 7/9] hw/intc: sifive_plic: Cleanup the write function
` [PATCH v1 8/9] hw/intc: sifive_plic: Cleanup the read function
` [PATCH v1 9/9] hw/intc: sifive_plic: Cleanup remaining functions

[PATCH v2] hw/riscv: virt: bugfix the memory-backend-file command is invalid
 2021-10-18  2:17 UTC  (6+ messages)

[PATCH] via-ide: Avoid expensive operations in irq handler
 2021-10-18  1:36 UTC 

[PATCH v3] target/riscv: fix VS interrupts forwarding to HS
 2021-10-18  1:13 UTC  (6+ messages)

[PATCH 1/2] hw/misc/bcm2835_property: Fix framebuffer with recent RPi kernels
 2021-10-18  0:41 UTC  (3+ messages)

[PATCH v3] hw/riscv: virt: Use machine->ram as the system memory
 2021-10-17 23:25 UTC  (2+ messages)

[PULL 00/17] MIPS patches for 2021-10-18
 2021-10-17 22:52 UTC  (18+ messages)
` [PULL 01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
` [PULL 02/17] hw/mips/boston: Massage memory map information
` [PULL 03/17] hw/mips/boston: Allow loading elf kernel and dtb
` [PULL 04/17] hw/mips/boston: Add FDT generator
` [PULL 05/17] target/mips: Remove unused register from MSA 2R/2RF instruction format
` [PULL 06/17] target/mips: Use tcg_constant_i32() in gen_msa_elm_df()
` [PULL 07/17] target/mips: Use tcg_constant_i32() in gen_msa_2rf()
` [PULL 08/17] target/mips: Use tcg_constant_i32() in gen_msa_2r()
` [PULL 09/17] target/mips: Use tcg_constant_i32() in gen_msa_3rf()
` [PULL 10/17] target/mips: Use explicit extract32() calls in gen_msa_i5()
` [PULL 11/17] target/mips: Use tcg_constant_tl() in gen_compute_compact_branch()
` [PULL 12/17] target/mips: Fix DEXTRV_S.H DSP opcode
` [PULL 13/17] target/mips: Remove unused TCG temporary in gen_mipsdsp_accinsn()
` [PULL 14/17] via-ide: Set user_creatable to false
` [PULL 15/17] vt82c686: Move common code to via_isa_realize
` [PULL 16/17] vt82c686: Add a method to VIA_ISA to raise ISA interrupts
` [PULL 17/17] via-ide: Avoid using isa_get_irq()

[PATCH 0/4] Avoid using isa_get_irq in vt82c686 model
 2021-10-17 20:34 UTC  (17+ messages)
` [PATCH 1/4] vt82c686: Move common code to via_isa_realize
` [PATCH 4/4] via-ide: Avoid using isa_get_irq()
` [PATCH 2/4] vt82c686: Add a method to VIA_ISA to raise ISA interrupts
` [PATCH 3/4] hw/usb/vt82c686-uhci-pci: Avoid using isa_get_irq()
` [PATCH] via-ide: Set user_creatable to false

[PATCH v14 0/8] RISC-V Pointer Masking implementation
 2021-10-17 17:27 UTC  (9+ messages)
` [PATCH v14 1/8] [RISCV_PM] Add J-extension into RISC-V
` [PATCH v14 2/8] [RISCV_PM] Add CSR defines for RISC-V PM extension
` [PATCH v14 3/8] [RISCV_PM] Support CSRs required for RISC-V PM extension except for the h-mode
` [PATCH v14 4/8] [RISCV_PM] Add J extension state description
` [PATCH v14 5/8] [RISCV_PM] Print new PM CSRs in QEMU logs
` [PATCH v14 6/8] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions
` [PATCH v14 7/8] [RISCV_PM] Implement address masking functions required for RISC-V Pointer Masking extension
` [PATCH v14 8/8] [RISCV_PM] Allow experimental J-ext to be turned on

[PATCH v13 0/7] RISC-V Pointer Masking implementatio
 2021-10-17 17:21 UTC  (7+ messages)
` [PATCH v13 5/7] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions
` [PATCH v13 6/7] [RISCV_PM] Implement address masking functions required for RISC-V Pointer Masking extension

[PATCH 0/8] q800: GLUE updates for A/UX mode
 2021-10-17 16:56 UTC  (25+ messages)
` [PATCH 3/8] q800: use GLUE IRQ numbers instead of IRQ level for GLUE IRQs
` [PATCH 4/8] mac_via: add GPIO for A/UX mode
` [PATCH 5/8] q800: wire up auxmode GPIO to GLUE
` [PATCH 6/8] q800: route SONIC on-board Ethernet IRQ via nubus IRQ 9 in classic mode
` [PATCH 7/8] q800: wire up remaining IRQs "
` [PATCH 8/8] q800: add NMI handler

[PATCH V5] block/rbd: implement bdrv_co_block_status
 2021-10-17 16:46 UTC  (2+ messages)

TCP/IP connections sometimes stop retransmitting packets (in nested virtualization case)
 2021-10-17 10:50 UTC 

[PATCH 2/2] hw/misc/bcm2835_property: Add dummy Get/Set GPIO virt buf messages
 2021-10-17  7:48 UTC 

[PULL 00/24] tcg patch queue
 2021-10-16 23:49 UTC  (26+ messages)
` [PULL 01/24] accel/tcg: Handle gdb singlestep in cpu_tb_exec
` [PULL 02/24] target/alpha: Drop checks for singlestep_enabled
` [PULL 03/24] target/avr: "
` [PULL 04/24] target/cris: "
` [PULL 05/24] target/hexagon: "
` [PULL 06/24] target/arm: "
` [PULL 07/24] target/hppa: "
` [PULL 08/24] target/i386: Check CF_NO_GOTO_TB for dc->jmp_opt
` [PULL 09/24] target/i386: Drop check for singlestep_enabled
` [PULL 10/24] target/m68k: Drop checks "
` [PULL 11/24] target/microblaze: Check CF_NO_GOTO_TB for DISAS_JUMP
` [PULL 12/24] target/microblaze: Drop checks for singlestep_enabled
` [PULL 13/24] target/mips: Fix single stepping
` [PULL 14/24] target/mips: Drop exit checks for singlestep_enabled
` [PULL 15/24] target/openrisc: Drop "
` [PULL 16/24] target/ppc: Drop exit "
` [PULL 17/24] target/riscv: Remove dead code after exception
` [PULL 18/24] target/riscv: Remove exit_tb and lookup_and_goto_ptr
` [PULL 19/24] target/rx: Drop checks for singlestep_enabled
` [PULL 20/24] target/s390x: Drop check "
` [PULL 21/24] target/sh4: "
` [PULL 22/24] target/tricore: "
` [PULL 23/24] target/xtensa: "
` [PULL 24/24] Revert "cpu: Move cpu_common_props to hw/core/cpu.c"

[PATCH] tests/vm: update openbsd to release 7.0
 2021-10-16 22:56 UTC 

[PATCH] tests/vm/openbsd: Move timezone set to after disk setup
 2021-10-16 22:24 UTC  (2+ messages)

[PATCH v4 0/2] add APIs to handle alternative sNaN propagation for fmax/fmin
 2021-10-16 17:59 UTC  (4+ messages)
` [PATCH v4 1/2] softfloat: "
` [PATCH v4 2/2] target/riscv: change the api for RVF/RVD fmin/fmax

Host-PCI-Device mapping
 2021-10-16  5:58 UTC  (2+ messages)


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