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Fri, 31 Jul 2020 13:21:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw2esJr1VoqQxP+Ei/ypNeU4tt/2qpmHLMbH5SiNUEAAsaWlqbGjOBc8P6GecU5XnBS73Di8DQ5H06ymzqFq2E= X-Received: by 2002:a17:906:82c1:: with SMTP id a1mr5722414ejy.172.1596226882863; Fri, 31 Jul 2020 13:21:22 -0700 (PDT) MIME-Version: 1.0 References: <20200731125127.30866-1-robert.foley@linaro.org> <20200731125127.30866-3-robert.foley@linaro.org> <67497c73-d2b9-941e-471d-de0ccd61bb7f@redhat.com> In-Reply-To: From: Paolo Bonzini Date: Fri, 31 Jul 2020 22:21:11 +0200 Message-ID: Subject: Re: [PATCH 2/2] accel/tcg: interrupt/exception handling uses bql_interrupt flag To: Robert Foley X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: multipart/alternative; boundary="000000000000559eaa05abc28853" Received-SPF: pass client-ip=205.139.110.61; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/31 12:28:14 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Puhov , "Emilio G. Cota" , =?UTF-8?B?QWxleCBCZW5uw6ll?= , QEMU Developers , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --000000000000559eaa05abc28853 Content-Type: text/plain; charset="UTF-8" Yes, that is correct. It's more work but also more maintainable. Thanks, Paolo Il ven 31 lug 2020, 22:09 Robert Foley ha scritto: > On Fri, 31 Jul 2020 at 14:02, Paolo Bonzini wrote: > > > > On 31/07/20 14:51, Robert Foley wrote: > > > This change removes the implied BQL from the cpu_handle_interrupt, > > > and cpu_handle_exception paths. We can now select per-arch if > > > the BQL is needed or not by using the bql_interrupt flag. > > > By default, the core code holds the BQL. > > > One benefit of this change is that it leaves it up to the arch > > > to make the change to remove BQL when it makes sense. > > > > > > Signed-off-by: Robert Foley > > > > No, please just modify all implementation to do lock/unlock. It's a > > simpler patch than this on. > > Sure, we will update the patch based on this. > > To clarify, the suggestion here is to remove the bql_interrupt flag > that we added and change all the per-arch interrupt callback code to > do the lock/unlock of the BQL? So for example change > x86_cpu_exec_interrupt, and arm_cpu_exec_interrupt, etc to lock/unlock BQL? > > Thanks, > -Rob > > > > > > Paolo > > > > > --- > > > accel/tcg/cpu-exec.c | 34 ++++++++++++++++++++++++++-------- > > > 1 file changed, 26 insertions(+), 8 deletions(-) > > > > > > diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c > > > index 80d0e649b2..cde27ee0bf 100644 > > > --- a/accel/tcg/cpu-exec.c > > > +++ b/accel/tcg/cpu-exec.c > > > @@ -517,9 +517,13 @@ static inline bool cpu_handle_exception(CPUState > *cpu, int *ret) > > > #else > > > if (replay_exception()) { > > > CPUClass *cc = CPU_GET_CLASS(cpu); > > > - qemu_mutex_lock_iothread(); > > > + if (cc->bql_interrupt) { > > > + qemu_mutex_lock_iothread(); > > > + } > > > cc->do_interrupt(cpu); > > > - qemu_mutex_unlock_iothread(); > > > + if (cc->bql_interrupt) { > > > + qemu_mutex_unlock_iothread(); > > > + } > > > cpu->exception_index = -1; > > > > > > if (unlikely(cpu->singlestep_enabled)) { > > > @@ -558,7 +562,7 @@ static inline bool cpu_handle_interrupt(CPUState > *cpu, > > > if (unlikely(cpu_interrupt_request(cpu))) { > > > int interrupt_request; > > > > > > - qemu_mutex_lock_iothread(); > > > + cpu_mutex_lock(cpu); > > > interrupt_request = cpu_interrupt_request(cpu); > > > if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { > > > /* Mask out external interrupts for this step. */ > > > @@ -567,7 +571,7 @@ static inline bool cpu_handle_interrupt(CPUState > *cpu, > > > if (interrupt_request & CPU_INTERRUPT_DEBUG) { > > > cpu_reset_interrupt(cpu, CPU_INTERRUPT_DEBUG); > > > cpu->exception_index = EXCP_DEBUG; > > > - qemu_mutex_unlock_iothread(); > > > + cpu_mutex_unlock(cpu); > > > return true; > > > } > > > if (replay_mode == REPLAY_MODE_PLAY && > !replay_has_interrupt()) { > > > @@ -577,13 +581,15 @@ static inline bool cpu_handle_interrupt(CPUState > *cpu, > > > cpu_reset_interrupt(cpu, CPU_INTERRUPT_HALT); > > > cpu_halted_set(cpu, 1); > > > cpu->exception_index = EXCP_HLT; > > > - qemu_mutex_unlock_iothread(); > > > + cpu_mutex_unlock(cpu); > > > return true; > > > } > > > #if defined(TARGET_I386) > > > else if (interrupt_request & CPU_INTERRUPT_INIT) { > > > X86CPU *x86_cpu = X86_CPU(cpu); > > > CPUArchState *env = &x86_cpu->env; > > > + cpu_mutex_unlock(cpu); > > > + qemu_mutex_lock_iothread(); > > > replay_interrupt(); > > > cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0); > > > do_cpu_init(x86_cpu); > > > @@ -595,7 +601,7 @@ static inline bool cpu_handle_interrupt(CPUState > *cpu, > > > else if (interrupt_request & CPU_INTERRUPT_RESET) { > > > replay_interrupt(); > > > cpu_reset(cpu); > > > - qemu_mutex_unlock_iothread(); > > > + cpu_mutex_unlock(cpu); > > > return true; > > > } > > > #endif > > > @@ -604,7 +610,15 @@ static inline bool cpu_handle_interrupt(CPUState > *cpu, > > > True when it is, and we should restart on a new TB, > > > and via longjmp via cpu_loop_exit. */ > > > else { > > > + cpu_mutex_unlock(cpu); > > > + if (cc->bql_interrupt) { > > > + qemu_mutex_lock_iothread(); > > > + } > > > if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { > > > + if (cc->bql_interrupt) { > > > + qemu_mutex_unlock_iothread(); > > > + } > > > + cpu_mutex_lock(cpu); > > > replay_interrupt(); > > > /* > > > * After processing the interrupt, ensure an > EXCP_DEBUG is > > > @@ -614,6 +628,11 @@ static inline bool cpu_handle_interrupt(CPUState > *cpu, > > > cpu->exception_index = > > > (cpu->singlestep_enabled ? EXCP_DEBUG : -1); > > > *last_tb = NULL; > > > + } else { > > > + if (cc->bql_interrupt) { > > > + qemu_mutex_unlock_iothread(); > > > + } > > > + cpu_mutex_lock(cpu); > > > } > > > /* The target hook may have updated the > 'cpu->interrupt_request'; > > > * reload the 'interrupt_request' value */ > > > @@ -627,7 +646,7 @@ static inline bool cpu_handle_interrupt(CPUState > *cpu, > > > } > > > > > > /* If we exit via cpu_loop_exit/longjmp it is reset in > cpu_exec */ > > > - qemu_mutex_unlock_iothread(); > > > + cpu_mutex_unlock(cpu); > > > } > > > > > > /* Finally, check if we need to exit to the main loop. */ > > > @@ -691,7 +710,6 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, > TranslationBlock *tb, > > > } > > > #endif > > > } > > > - > > > /* main execution loop */ > > > > > > int cpu_exec(CPUState *cpu) > > > > > > > --000000000000559eaa05abc28853 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Yes, that is correct. It's more work but also more ma= intainable.

Thanks,

Paolo

Il ven 31 lug 2020, 22:= 09 Robert Foley <robert.foley= @linaro.org> ha scritto:
On = Fri, 31 Jul 2020 at 14:02, Paolo Bonzini <pbonzini@redhat.com> w= rote:
>
> On 31/07/20 14:51, Robert Foley wrote:
> > This change removes the implied BQL from the cpu_handle_interrupt= ,
> > and cpu_handle_exception paths. We can now select per-arch if
> > the BQL is needed or not by using the bql_interrupt flag.
> > By default, the core code holds the BQL.
> > One benefit of this change is that it leaves it up to the arch > > to make the change to remove BQL when it makes sense.
> >
> > Signed-off-by: Robert Foley <robert.foley@linaro.org&= gt;
>
> No, please just modify all implementation to do lock/unlock.=C2=A0 It&= #39;s a
> simpler patch than this on.

Sure, we will update the patch based on this.

To clarify, the suggestion here is to remove the bql_interrupt flag
that we added and change all the per-arch interrupt callback code to
do the lock/unlock of the BQL?=C2=A0 So for example change
x86_cpu_exec_interrupt, and arm_cpu_exec_interrupt, etc to lock/unlock BQL?=

Thanks,
-Rob


>
> Paolo
>
> > ---
> >=C2=A0 accel/tcg/cpu-exec.c | 34 ++++++++++++++++++++++++++-------= -
> >=C2=A0 1 file changed, 26 insertions(+), 8 deletions(-)
> >
> > diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
> > index 80d0e649b2..cde27ee0bf 100644
> > --- a/accel/tcg/cpu-exec.c
> > +++ b/accel/tcg/cpu-exec.c
> > @@ -517,9 +517,13 @@ static inline bool cpu_handle_exception(CPUS= tate *cpu, int *ret)
> >=C2=A0 #else
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (replay_exception()) {
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 CPUClass *cc =3D = CPU_GET_CLASS(cpu);
> > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_mutex_lock_iothre= ad();
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (cc->bql_interru= pt) {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_mut= ex_lock_iothread();
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cc->do_interru= pt(cpu);
> > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_mutex_unlock_ioth= read();
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (cc->bql_interru= pt) {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_mut= ex_unlock_iothread();
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu->exception= _index =3D -1;
> >
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (unlikely(cpu-= >singlestep_enabled)) {
> > @@ -558,7 +562,7 @@ static inline bool cpu_handle_interrupt(CPUSt= ate *cpu,
> >=C2=A0 =C2=A0 =C2=A0 if (unlikely(cpu_interrupt_request(cpu))) { > >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 int interrupt_request;
> >
> > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_mutex_lock_iothread();
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_mutex_lock(cpu);
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 interrupt_request =3D cpu_inter= rupt_request(cpu);
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (unlikely(cpu->singlestep= _enabled & SSTEP_NOIRQ)) {
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Mask out exter= nal interrupts for this step. */
> > @@ -567,7 +571,7 @@ static inline bool cpu_handle_interrupt(CPUSt= ate *cpu,
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (interrupt_request & CPU= _INTERRUPT_DEBUG) {
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_reset_interru= pt(cpu, CPU_INTERRUPT_DEBUG);
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu->exception= _index =3D EXCP_DEBUG;
> > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_mutex_unlock_ioth= read();
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_mutex_unlock(cpu);=
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return true;
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (replay_mode =3D=3D REPLAY_M= ODE_PLAY && !replay_has_interrupt()) {
> > @@ -577,13 +581,15 @@ static inline bool cpu_handle_interrupt(CPU= State *cpu,
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_reset_interru= pt(cpu, CPU_INTERRUPT_HALT);
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_halted_set(cp= u, 1);
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu->exception= _index =3D EXCP_HLT;
> > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_mutex_unlock_ioth= read();
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_mutex_unlock(cpu);=
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return true;
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >=C2=A0 #if defined(TARGET_I386)
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 else if (interrupt_request &= ; CPU_INTERRUPT_INIT) {
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 X86CPU *x86_cpu = =3D X86_CPU(cpu);
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 CPUArchState *env= =3D &x86_cpu->env;
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_mutex_unlock(cpu);=
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_mutex_lock_iothre= ad();
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 replay_interrupt(= );
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_svm_check_int= ercept_param(env, SVM_EXIT_INIT, 0, 0);
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 do_cpu_init(x86_c= pu);
> > @@ -595,7 +601,7 @@ static inline bool cpu_handle_interrupt(CPUSt= ate *cpu,
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 else if (interrupt_request &= ; CPU_INTERRUPT_RESET) {
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 replay_interrupt(= );
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_reset(cpu); > > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_mutex_unlock_ioth= read();
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_mutex_unlock(cpu);=
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return true;
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >=C2=A0 #endif
> > @@ -604,7 +610,15 @@ static inline bool cpu_handle_interrupt(CPUS= tate *cpu,
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0True when it is, a= nd we should restart on a new TB,
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0and via longjmp vi= a cpu_loop_exit.=C2=A0 */
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 else {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_mutex_unlock(cpu);=
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (cc->bql_interru= pt) {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_mut= ex_lock_iothread();
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (cc->cpu_ex= ec_interrupt(cpu, interrupt_request)) {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (cc-&= gt;bql_interrupt) {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 qemu_mutex_unlock_iothread();
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_mute= x_lock(cpu);
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 rep= lay_interrupt();
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /*<= br> > >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0* After processing the interrupt, ensure an EXCP_DEBUG is
> > @@ -614,6 +628,11 @@ static inline bool cpu_handle_interrupt(CPUS= tate *cpu,
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu= ->exception_index =3D
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 (cpu->singlestep_enabled ? EXCP_DEBUG : -1);
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 *la= st_tb =3D NULL;
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 } else {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (cc-&= gt;bql_interrupt) {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 qemu_mutex_unlock_iothread();
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_mute= x_lock(cpu);
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* The target hoo= k may have updated the 'cpu->interrupt_request';
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0* reload th= e 'interrupt_request' value */
> > @@ -627,7 +646,7 @@ static inline bool cpu_handle_interrupt(CPUSt= ate *cpu,
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> >
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* If we exit via cpu_loop_exit= /longjmp it is reset in cpu_exec */
> > -=C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_mutex_unlock_iothread();
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 cpu_mutex_unlock(cpu);
> >=C2=A0 =C2=A0 =C2=A0 }
> >
> >=C2=A0 =C2=A0 =C2=A0 /* Finally, check if we need to exit to the m= ain loop.=C2=A0 */
> > @@ -691,7 +710,6 @@ static inline void cpu_loop_exec_tb(CPUState = *cpu, TranslationBlock *tb,
> >=C2=A0 =C2=A0 =C2=A0 }
> >=C2=A0 #endif
> >=C2=A0 }
> > -
> >=C2=A0 /* main execution loop */
> >
> >=C2=A0 int cpu_exec(CPUState *cpu)
> >
>

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