From: Laurent Desnogues <laurent.desnogues@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>,
qemu-arm <qemu-arm@nongnu.org>
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Alex Bennée" <alex.bennee@linaro.org>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Subject: Re: [PULL 04/10] target/arm: Use tcg_gen_gvec_dup_imm
Date: Thu, 7 May 2020 16:39:02 +0200 [thread overview]
Message-ID: <CABoDooPCvC4Y+G4CGBUhPT_ce3rY6_ZZvTnvv8M+sXPkpN4raQ@mail.gmail.com> (raw)
In-Reply-To: <20200506183002.3192-5-richard.henderson@linaro.org>
Hello,
On Wed, May 6, 2020 at 8:30 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> In a few cases, we're able to remove some manual replication.
>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/arm/translate-a64.c | 10 +++++-----
> target/arm/translate-sve.c | 12 +++++-------
> target/arm/translate.c | 9 ++++++---
> 3 files changed, 16 insertions(+), 15 deletions(-)
>
> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
> index a896f9c4b8..62e5729904 100644
> --- a/target/arm/translate-a64.c
> +++ b/target/arm/translate-a64.c
[...]
> @@ -2044,7 +2044,7 @@ static bool trans_DUP_x(DisasContext *s, arg_DUP_x *a)
> unsigned nofs = vec_reg_offset(s, a->rn, index, esz);
> tcg_gen_gvec_dup_mem(esz, dofs, nofs, vsz, vsz);
> } else {
> - tcg_gen_gvec_dup64i(dofs, vsz, vsz, 0);
> + tcg_gen_gvec_dup_imm(esz, dofs, vsz, vsz, 0);
For an indexed DUP, size can be 128-bit so that will fail the first
assert in tcg-op-gvec.c:do_dup.
Thanks,
Laurent
next prev parent reply other threads:[~2020-05-07 14:41 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-06 18:29 [PULL 00/10] tcg patch queue Richard Henderson
2020-05-06 18:29 ` [PULL 01/10] tcg: Add tcg_gen_gvec_dup_imm Richard Henderson
2020-05-06 18:29 ` [PULL 02/10] target/s390x: Use tcg_gen_gvec_dup_imm Richard Henderson
2020-05-06 18:29 ` [PULL 03/10] target/ppc: " Richard Henderson
2020-05-06 18:29 ` [PULL 04/10] target/arm: " Richard Henderson
2020-05-07 14:39 ` Laurent Desnogues [this message]
2020-05-07 17:16 ` Richard Henderson
2020-05-06 18:29 ` [PULL 05/10] tcg: Use tcg_gen_gvec_dup_imm in logical simplifications Richard Henderson
2020-05-06 18:29 ` [PULL 06/10] tcg: Remove tcg_gen_gvec_dup{8,16,32,64}i Richard Henderson
2020-05-06 18:29 ` [PULL 07/10] tcg: Add tcg_gen_gvec_dup_tl Richard Henderson
2020-05-06 18:30 ` [PULL 08/10] tcg: Improve vector tail clearing Richard Henderson
2020-05-06 18:30 ` [PULL 09/10] tcg: Add load_dest parameter to GVecGen2 Richard Henderson
2020-05-06 18:30 ` [PULL 10/10] tcg: Fix integral argument type to tcg_gen_rot[rl]i_i{32, 64} Richard Henderson
2020-05-07 9:54 ` [PULL 00/10] tcg patch queue Peter Maydell
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