From: Jose Martins <josemartins90@gmail.com>
To: Alistair Francis <alistair23@gmail.com>
Cc: "open list:RISC-V TCG CPUs" <qemu-riscv@nongnu.org>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Alistair Francis <Alistair.Francis@wdc.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
LIU Zhiwei <zhiwei_liu@c-sky.com>
Subject: Re: [PATCH v3] target/riscv: fix VS interrupts forwarding to HS
Date: Mon, 25 Oct 2021 10:47:58 +0100 [thread overview]
Message-ID: <CAC41xo2yWzJgttwEn6rG_wmkarN58OLmV0nh1ksbbjRG1gpuYw@mail.gmail.com> (raw)
In-Reply-To: <CAKmqyKMb-VNiQZv-ZFeCMwPQ3hkm1ODn_w55pGdBgpxtwg8tnw@mail.gmail.com>
> From your last response I thought you sent a different series that
> replaces this patch. If that's not the case do you mind sending this
> patch again?
I already sent the patch series here:
https://lists.gnu.org/archive/html/qemu-devel/2021-06/msg00553.html. I
got confused, I should have raised this issue in that thread. Let me
know if you still want me to resend it.
Jose
next prev parent reply other threads:[~2021-10-25 9:49 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-22 15:44 [PATCH v3] target/riscv: fix VS interrupts forwarding to HS Jose Martins
2021-05-26 7:02 ` LIU Zhiwei
2021-05-26 11:50 ` Jose Martins
2021-05-27 8:40 ` LIU Zhiwei
2021-05-27 22:34 ` Alistair Francis
2021-05-28 0:36 ` LIU Zhiwei
2021-06-02 19:14 ` Jose Martins
2021-10-17 20:30 ` Jose Martins
2021-10-18 1:13 ` Alistair Francis
2021-10-25 9:47 ` Jose Martins [this message]
2021-10-26 6:57 ` Alistair Francis
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