Hi Peter,

Thanks a lot for the information.=

Can you please help me with the cortex-a7 CPU def= initions/configuration that I need to add in QEMU. Thanks,

Best Regards,

-Deepak=C2=A0

On M= on, Feb 8, 2016 at 9:24 PM, Peter Maydell <peter.maydell@linaro.org= > wrote:

> On Mon,= Feb 8, 2016 at 2:21 PM, Deepak kumar Raju <raju.deepakkumar@gmail.com> wrote:
>> I am Deepak. I have a Cortex-A7 board and I am using = qemu code from Linaro.
>> In Qemu-linaro.git, under .../target-arm/cpu.c, I do not see CPU d= efinitions for Cortex-A7.
>> I have few questions:
>>
>> a)Can you please point to Cortex-A7 CPU definitions?

We don't implement a Cortex-A7 in QEMU, because we have no board=
models that need it.

>> b) Can we use the CPU definitions of Cortex-A15 for Cortex-A7?

Typically guest code doesn't care about the exact CPU type betwe= en
the A15 and the A7. If you wanted to add A7 support then starting
with the A15 would be a good start.

>> c) What would be the diff of Cortex-A7 definitions compared to Cor= tex-A15?

You need to look at the Technical Reference Manual for the two CPUs<= br> to determine the difference. As far as QEMU is concerned the things
to look at are:
=C2=A0* ID register values
=C2=A0* supported CPU features
=C2=A0* any implementation-specific coprocessor registers

...in other words, all the things we set in the
cortex_a15_initfn().

thanks
-- PMM

--001a11401eda0dce7f052b517a64-- From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41241) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aTChp-0001as-C3 for qemu-devel@nongnu.org; Tue, 09 Feb 2016 13:08:06 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aTCho-0007Qz-FQ for qemu-devel@nongnu.org; Tue, 09 Feb 2016 13:08:05 -0500 Received: from mail-lb0-x234.google.com ([2a00:1450:4010:c04::234]:35317) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aTCho-0007Qa-21 for qemu-devel@nongnu.org; Tue, 09 Feb 2016 13:08:04 -0500 Received: by mail-lb0-x234.google.com with SMTP id bc4so104880637lbc.2 for ; Tue, 09 Feb 2016 10:08:03 -0800 (PST) MIME-Version: 1.0 In-Reply-To: References:

Date: Tue, 9 Feb 2016 23:38:02 +0530 Message-ID: From: Deepak kumar Raju Content-Type: multipart/alternative; boundary=001a11c3277ecd889c052b5a321a Subject: Re: [Qemu-devel] Regarding Cortex-A7 CPU definition List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: QEMU Developers --001a11c3277ecd889c052b5a321a Content-Type: text/plain; charset=UTF-8 Thanks Peter, will follow your suggestions to add CPU definitions for Cortex-A7. I need to enable GIC & Generic timer in QEMU for Cortex-A7. Can you please let me know how to go about enabling GIC & Generic timer in QEMU. Thanks in advance, Best Regards, -Deepak On Tue, Feb 9, 2016 at 3:01 PM, Peter Maydell wrote: > On 9 February 2016 at 07:43, Deepak kumar Raju > wrote: > > Can you please help me with the cortex-a7 CPU definitions/configuration > that > > I need to add in QEMU. Thanks, > > I'm afraid I don't have time to do this myself. I suggested > below how you can go about doing this yourself if you need it: > > >> You need to look at the Technical Reference Manual for the two CPUs > >> to determine the difference. As far as QEMU is concerned the things > >> to look at are: > >> * ID register values > >> * supported CPU features > >> * any implementation-specific coprocessor registers > >> > >> ...in other words, all the things we set in the > >> cortex_a15_initfn(). > > thanks > -- PMM > --001a11c3277ecd889c052b5a321a Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable

Thanks Peter, will follow your suggestions to add CPU= definitions for Cortex-A7.

I need to enable GIC &= amp; Generic timer in QEMU for Cortex-A7. Can you please let me know how to= go about enabling GIC & Generic timer in QEMU.

Thanks in advance,

Best Regards,

-Deep= ak