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From: Peter Maydell <peter.maydell@linaro.org>
To: Eric Auger <eric.auger@redhat.com>
Cc: Jean-Philippe Brucker <jean-philippe@linaro.org>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Robin Murphy <robin.murphy@arm.com>,
	zhangfei.gao@foxmail.com, QEMU Developers <qemu-devel@nongnu.org>,
	Peter Xu <peterx@redhat.com>, qemu-arm <qemu-arm@nongnu.org>,
	Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>,
	Will Deacon <will@kernel.org>, Rob Herring <robh@kernel.org>,
	Eric Auger <eric.auger.pro@gmail.com>
Subject: Re: [PATCH for-5.2 v4 05/11] hw/arm/smmu-common: Manage IOTLB block entries
Date: Thu, 30 Jul 2020 14:38:53 +0100	[thread overview]
Message-ID: <CAFEAcA-gMh43545mnHRoRLuAV63o3r-GWFBF+zYZfd4apfw_mQ@mail.gmail.com> (raw)
In-Reply-To: <20200728150815.11446-6-eric.auger@redhat.com>

On Tue, 28 Jul 2020 at 16:09, Eric Auger <eric.auger@redhat.com> wrote:
>
> At the moment each entry in the IOTLB corresponds to a page sized
> mapping (4K, 16K or 64K), even if the page belongs to a mapped
> block. In case of block mapping this unefficiently consumes IOTLB
> entries.
>
> Change the value of the entry so that it reflects the actual
> mapping it belongs to (block or page start address and size).
>
> Also the level/tg of the entry is encoded in the key. In subsequent
> patches we will enable range invalidation. This latter is able
> to provide the level/tg of the entry.
>
> Encoding the level/tg directly in the key will allow to invalidate
> using g_hash_table_remove() when num_pages equals to 1.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
> v3 -> v4:
> - also use the tg field when computing the hash
> - in the key equal function, compare the fields instead of
>   using memcmp()
> - fixed a couple of indents
> - added Peter's R-b

You say that, but you didn't :-)

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM


  reply	other threads:[~2020-07-30 13:39 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-28 15:08 [PATCH for-5.2 v4 00/11] SMMUv3.2 Range-based TLB Invalidation Support Eric Auger
2020-07-28 15:08 ` [PATCH for-5.2 v4 01/11] hw/arm/smmu-common: Factorize some code in smmu_ptw_64() Eric Auger
2020-07-28 15:08 ` [PATCH for-5.2 v4 02/11] hw/arm/smmu-common: Add IOTLB helpers Eric Auger
2020-07-28 15:08 ` [PATCH for-5.2 v4 03/11] hw/arm/smmu: Introduce smmu_get_iotlb_key() Eric Auger
2020-07-28 15:08 ` [PATCH for-5.2 v4 04/11] hw/arm/smmu: Introduce SMMUTLBEntry for PTW and IOTLB value Eric Auger
2020-07-28 15:08 ` [PATCH for-5.2 v4 05/11] hw/arm/smmu-common: Manage IOTLB block entries Eric Auger
2020-07-30 13:38   ` Peter Maydell [this message]
2020-07-31  9:35     ` Auger Eric
2020-07-28 15:08 ` [PATCH for-5.2 v4 06/11] hw/arm/smmuv3: Introduce smmuv3_s1_range_inval() helper Eric Auger
2020-07-28 15:08 ` [PATCH for-5.2 v4 07/11] hw/arm/smmuv3: Get prepared for range invalidation Eric Auger
2020-07-28 15:08 ` [PATCH for-5.2 v4 08/11] hw/arm/smmuv3: Fix IIDR offset Eric Auger
2020-07-28 15:08 ` [PATCH for-5.2 v4 09/11] hw/arm/smmuv3: Let AIDR advertise SMMUv3.0 support Eric Auger
2020-07-28 15:08 ` [PATCH for-5.2 v4 10/11] hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 support Eric Auger
2020-07-28 15:08 ` [PATCH for-5.2 v4 11/11] hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation Eric Auger
2020-07-30 13:39 ` [PATCH for-5.2 v4 00/11] SMMUv3.2 Range-based TLB Invalidation Support Peter Maydell
2020-08-06 12:55   ` Peter Maydell

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