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From: Peter Maydell <peter.maydell@linaro.org>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: Richard Henderson <richard.henderson@linaro.org>,
	QEMU Developers <qemu-devel@nongnu.org>,
	Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PATCH v1 5/7] fpu/softfloat: avoid undefined behaviour when normalising empty sigs
Date: Fri, 27 Mar 2020 10:09:43 +0000
Message-ID: <CAFEAcA8RvbdHMWCe101CyTWcA7T28-MtYwMFNZ5Fnh2=SuKcDw@mail.gmail.com> (raw)
In-Reply-To: <20200327094945.23768-6-alex.bennee@linaro.org>

On Fri, 27 Mar 2020 at 09:49, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> The undefined behaviour checker pointed out that a shift of 64 would
> lead to undefined behaviour.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  fpu/softfloat.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index 301ce3b537b..444d35920dd 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -3834,9 +3834,14 @@ void normalizeFloatx80Subnormal(uint64_t aSig, int32_t *zExpPtr,
>  {
>      int8_t shiftCount;
>
> -    shiftCount = clz64(aSig);
> -    *zSigPtr = aSig<<shiftCount;
> -    *zExpPtr = 1 - shiftCount;
> +    if (aSig) {
> +        shiftCount = clz64(aSig);
> +        *zSigPtr = aSig << shiftCount;
> +        *zExpPtr = 1 - shiftCount;
> +    } else {
> +        *zSigPtr = 0;
> +        *zExpPtr = 1 - 64;
> +    }
>  }

Ah yes, I saw this one in Coverity: CID 1421991.

RTH marked the Coverity issue as a false positive with the rationale
"We assume an out-of-range shift count is merely IMPLEMENTATION DEFINED
 and not UNDEFINED (in the Arm ARM sense), and so cannot turn a 0 value
 into a non-zero value."
but I think I disagree with that. We can assume that for the TCG IR
where we get to define shift semantics because we're doing the codegen,
but we can't assume it in C code, because it's not included in the set
of extended guarantees provided by -fwrapv as far as I know.

That said, is it valid for this function to be called with a zero
aSig value ? I think all these normalizeFloat*Subnormal() functions
assume non-zero sig input, and the only callsite where it's not clearly
obvious that this is obvious that the sig input is non-zero is the call to
normalizeFloatx80Subnormal() from addFloatx80Sigs(). So perhaps we
just need to check and fix that callsite ??

thanks
-- PMM


  reply index

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-27  9:49 [PATCH for 5.0 v1 0/7] A selection of sanitiser fixes Alex Bennée
2020-03-27  9:49 ` [PATCH v1 1/7] elf-ops: bail out if we have no function symbols Alex Bennée
2020-03-27 10:53   ` Philippe Mathieu-Daudé
2020-03-27 11:10     ` Philippe Mathieu-Daudé
2020-03-27 11:45   ` Peter Maydell
2020-03-27 22:09   ` Richard Henderson
2020-03-27  9:49 ` [PATCH v1 2/7] linux-user: protect fcntl64 with an #ifdef Alex Bennée
2020-03-27 10:40   ` Laurent Vivier
2020-03-27 22:10   ` Richard Henderson
2020-03-27  9:49 ` [PATCH v1 3/7] tests/tcg: remove extraneous pasting macros Alex Bennée
2020-03-27 10:54   ` Philippe Mathieu-Daudé
2020-03-27 22:11   ` Richard Henderson
2020-03-27  9:49 ` [PATCH v1 4/7] linux-user: more debug for init_guest_space Alex Bennée
2020-03-27 10:50   ` Laurent Vivier
2020-03-27  9:49 ` [PATCH v1 5/7] fpu/softfloat: avoid undefined behaviour when normalising empty sigs Alex Bennée
2020-03-27 10:09   ` Peter Maydell [this message]
2020-03-27 22:27     ` Richard Henderson
2020-03-27 22:33       ` Peter Maydell
2020-03-27 10:13   ` Aleksandar Markovic
2020-03-27 10:31     ` Alex Bennée
2020-03-27  9:49 ` [PATCH v1 6/7] target/xtensa: add FIXME for translation memory leak Alex Bennée
2020-03-27  9:49 ` [PATCH v1 7/7] gdbstub: fix compiler complaining Alex Bennée
2020-03-27 10:56   ` Philippe Mathieu-Daudé
2020-03-27 10:53 ` [PATCH for 5.0 v1 0/7] A selection of sanitiser fixes no-reply

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